1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2020 Krzysztof Kozlowski <krzk@kernel.org>
8 #include "imx8mm-var-som.dtsi"
11 model = "Variscite VAR-SOM-MX8MM Symphony evaluation board";
12 compatible = "variscite,var-som-mx8mm-symphony", "variscite,var-som-mx8mm", "fsl,imx8mm";
14 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
15 compatible = "regulator-fixed";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
18 regulator-name = "VSD_3V3";
19 regulator-min-microvolt = <3300000>;
20 regulator-max-microvolt = <3300000>;
21 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
25 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
26 compatible = "regulator-fixed";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_reg_usb_otg2_vbus>;
29 regulator-name = "usb_otg2_vbus";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
32 gpio = <&gpio5 1 GPIO_ACTIVE_HIGH>;
37 compatible = "gpio-keys";
41 gpios = <&pca9534 1 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_BACK>;
47 gpios = <&pca9534 2 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_HOME>;
53 gpios = <&pca9534 3 GPIO_ACTIVE_LOW>;
54 linux,code = <KEY_MENU>;
59 compatible = "gpio-leds";
63 gpios = <&pca9534 0 GPIO_ACTIVE_LOW>;
64 linux,default-trigger = "heartbeat";
70 reset-gpios = <&pca9534 5 GPIO_ACTIVE_HIGH>;
74 clock-frequency = <400000>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_i2c2>;
80 compatible = "nxp,pca9534";
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_pca9534>;
85 interrupt-parent = <&gpio1>;
86 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
90 /* USB 3.0 OTG (usbotg1) / SATA port switch, set to USB 3.0 */
93 gpios = <4 GPIO_ACTIVE_HIGH>;
95 line-name = "usb3_sata_sel";
100 gpios = <6 GPIO_ACTIVE_HIGH>;
102 line-name = "som_vselect";
107 gpios = <7 GPIO_ACTIVE_HIGH>;
109 line-name = "enet_sel";
113 extcon_usbotg1: typec@3d {
114 compatible = "nxp,ptn5150";
116 interrupt-parent = <&gpio1>;
117 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
118 pinctrl-names = "default";
119 pinctrl-0 = <&pinctrl_ptn5150>;
125 /* Capacitive touch controller */
126 ft5x06_ts: touchscreen@38 {
127 compatible = "edt,edt-ft5406";
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_captouch>;
131 interrupt-parent = <&gpio5>;
132 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
134 touchscreen-size-x = <800>;
135 touchscreen-size-y = <480>;
136 touchscreen-inverted-x;
137 touchscreen-inverted-y;
141 compatible = "dallas,ds1337";
148 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_uart1>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_uart3>;
161 disable-over-current;
162 extcon = <&extcon_usbotg1>, <&extcon_usbotg1>;
167 vbus-supply = <®_usb_otg2_vbus>;
171 disable-over-current;
172 /delete-property/ usb-role-switch;
174 * FIXME: having USB2 enabled hangs the boot just after:
175 * [ 1.943365] ci_hdrc ci_hdrc.1: EHCI Host Controller
176 * [ 1.948287] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 1
177 * [ 1.971006] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00
178 * [ 1.977203] hub 1-0:1.0: USB hub found
179 * [ 1.980987] hub 1-0:1.0: 1 port detected
186 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
187 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
188 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
189 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
190 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
191 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
192 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
193 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
194 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
195 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
196 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
197 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
198 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
199 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
200 /* Remove the MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 as not used */
205 pinctrl_captouch: captouchgrp {
207 MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x16
211 pinctrl_i2c2: i2c2grp {
213 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
214 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
218 pinctrl_pca9534: pca9534grp {
220 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x16
224 pinctrl_ptn5150: ptn5150grp {
226 MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x16
230 pinctrl_reg_usb_otg2_vbus: regusbotg2vbusgrp {
232 MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x16
236 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
238 MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
242 pinctrl_uart1: uart1grp {
244 MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
245 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
249 pinctrl_uart3: uart3grp {
251 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
252 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140