| blob | 83523916d3605c442e5e180e35f0a11f47f1c688 |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the r8a774b1 SoC
4 *
5 * Copyright (C) 2019 Renesas Electronics Corp.
6 */
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774b1-sysc.h>
13 #define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4
15 / {
16 compatible = "renesas,r8a774b1";
17 #address-cells = <2>;
18 #size-cells = <2>;
20 /*
21 * The external audio clocks are configured as 0 Hz fixed frequency
22 * clocks by default.
23 * Boards that provide audio clocks should override them.
24 */
25 audio_clk_a: audio_clk_a {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
29 };
31 audio_clk_b: audio_clk_b {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
35 };
37 audio_clk_c: audio_clk_c {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <0>;
41 };
43 /* External CAN clock - to be overridden by boards that provide it */
44 can_clk: can {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
50 cluster0_opp: opp_table0 {
51 compatible = "operating-points-v2";
52 opp-shared;
54 opp-500000000 {
55 opp-hz = /bits/ 64 <500000000>;
56 opp-microvolt = <830000>;
57 clock-latency-ns = <300000>;
58 };
59 opp-1000000000 {
60 opp-hz = /bits/ 64 <1000000000>;
61 opp-microvolt = <830000>;
62 clock-latency-ns = <300000>;
63 };
64 opp-1500000000 {
65 opp-hz = /bits/ 64 <1500000000>;
66 opp-microvolt = <830000>;
67 clock-latency-ns = <300000>;
68 opp-suspend;
69 };
70 };
72 cpus {
73 #address-cells = <1>;
74 #size-cells = <0>;
76 a57_0: cpu@0 {
77 compatible = "arm,cortex-a57";
78 reg = <0x0>;
79 device_type = "cpu";
80 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>;
81 next-level-cache = <&L2_CA57>;
82 enable-method = "psci";
83 #cooling-cells = <2>;
84 dynamic-power-coefficient = <854>;
85 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
86 operating-points-v2 = <&cluster0_opp>;
87 };
89 a57_1: cpu@1 {
90 compatible = "arm,cortex-a57";
91 reg = <0x1>;
92 device_type = "cpu";
93 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>;
94 next-level-cache = <&L2_CA57>;
95 enable-method = "psci";
96 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
97 operating-points-v2 = <&cluster0_opp>;
98 };
100 L2_CA57: cache-controller-0 {
101 compatible = "cache";
102 power-domains = <&sysc R8A774B1_PD_CA57_SCU>;
103 cache-unified;
104 cache-level = <2>;
105 };
106 };
108 extal_clk: extal {
109 compatible = "fixed-clock";
110 #clock-cells = <0>;
111 /* This value must be overridden by the board */
112 clock-frequency = <0>;
113 };
115 extalr_clk: extalr {
116 compatible = "fixed-clock";
117 #clock-cells = <0>;
118 /* This value must be overridden by the board */
119 clock-frequency = <0>;
120 };
122 /* External PCIe clock - can be overridden by the board */
123 pcie_bus_clk: pcie_bus {
124 compatible = "fixed-clock";
125 #clock-cells = <0>;
126 clock-frequency = <0>;
127 };
129 pmu_a57 {
130 compatible = "arm,cortex-a57-pmu";
131 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
132 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
133 interrupt-affinity = <&a57_0>, <&a57_1>;
134 };
136 psci {
137 compatible = "arm,psci-1.0", "arm,psci-0.2";
138 method = "smc";
139 };
141 /* External SCIF clock - to be overridden by boards that provide it */
142 scif_clk: scif {
143 compatible = "fixed-clock";
144 #clock-cells = <0>;
145 clock-frequency = <0>;
146 };
148 soc {
149 compatible = "simple-bus";
150 interrupt-parent = <&gic>;
151 #address-cells = <2>;
152 #size-cells = <2>;
153 ranges;
155 rwdt: watchdog@e6020000 {
156 compatible = "renesas,r8a774b1-wdt",
157 "renesas,rcar-gen3-wdt";
158 reg = <0 0xe6020000 0 0x0c>;
159 clocks = <&cpg CPG_MOD 402>;
160 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
161 resets = <&cpg 402>;
162 status = "disabled";
163 };
165 gpio0: gpio@e6050000 {
166 compatible = "renesas,gpio-r8a774b1",
167 "renesas,rcar-gen3-gpio";
168 reg = <0 0xe6050000 0 0x50>;
169 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
170 #gpio-cells = <2>;
171 gpio-controller;
172 gpio-ranges = <&pfc 0 0 16>;
173 #interrupt-cells = <2>;
174 interrupt-controller;
175 clocks = <&cpg CPG_MOD 912>;
176 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
177 resets = <&cpg 912>;
178 };
180 gpio1: gpio@e6051000 {
181 compatible = "renesas,gpio-r8a774b1",
182 "renesas,rcar-gen3-gpio";
183 reg = <0 0xe6051000 0 0x50>;
184 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
185 #gpio-cells = <2>;
186 gpio-controller;
187 gpio-ranges = <&pfc 0 32 29>;
188 #interrupt-cells = <2>;
189 interrupt-controller;
190 clocks = <&cpg CPG_MOD 911>;
191 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
192 resets = <&cpg 911>;
193 };
195 gpio2: gpio@e6052000 {
196 compatible = "renesas,gpio-r8a774b1",
197 "renesas,rcar-gen3-gpio";
198 reg = <0 0xe6052000 0 0x50>;
199 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
200 #gpio-cells = <2>;
201 gpio-controller;
202 gpio-ranges = <&pfc 0 64 15>;
203 #interrupt-cells = <2>;
204 interrupt-controller;
205 clocks = <&cpg CPG_MOD 910>;
206 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
207 resets = <&cpg 910>;
208 };
210 gpio3: gpio@e6053000 {
211 compatible = "renesas,gpio-r8a774b1",
212 "renesas,rcar-gen3-gpio";
213 reg = <0 0xe6053000 0 0x50>;
214 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
215 #gpio-cells = <2>;
216 gpio-controller;
217 gpio-ranges = <&pfc 0 96 16>;
218 #interrupt-cells = <2>;
219 interrupt-controller;
220 clocks = <&cpg CPG_MOD 909>;
221 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
222 resets = <&cpg 909>;
223 };
225 gpio4: gpio@e6054000 {
226 compatible = "renesas,gpio-r8a774b1",
227 "renesas,rcar-gen3-gpio";
228 reg = <0 0xe6054000 0 0x50>;
229 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
230 #gpio-cells = <2>;
231 gpio-controller;
232 gpio-ranges = <&pfc 0 128 18>;
233 #interrupt-cells = <2>;
234 interrupt-controller;
235 clocks = <&cpg CPG_MOD 908>;
236 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
237 resets = <&cpg 908>;
238 };
240 gpio5: gpio@e6055000 {
241 compatible = "renesas,gpio-r8a774b1",
242 "renesas,rcar-gen3-gpio";
243 reg = <0 0xe6055000 0 0x50>;
244 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
245 #gpio-cells = <2>;
246 gpio-controller;
247 gpio-ranges = <&pfc 0 160 26>;
248 #interrupt-cells = <2>;
249 interrupt-controller;
250 clocks = <&cpg CPG_MOD 907>;
251 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
252 resets = <&cpg 907>;
253 };
255 gpio6: gpio@e6055400 {
256 compatible = "renesas,gpio-r8a774b1",
257 "renesas,rcar-gen3-gpio";
258 reg = <0 0xe6055400 0 0x50>;
259 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
260 #gpio-cells = <2>;
261 gpio-controller;
262 gpio-ranges = <&pfc 0 192 32>;
263 #interrupt-cells = <2>;
264 interrupt-controller;
265 clocks = <&cpg CPG_MOD 906>;
266 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
267 resets = <&cpg 906>;
268 };
270 gpio7: gpio@e6055800 {
271 compatible = "renesas,gpio-r8a774b1",
272 "renesas,rcar-gen3-gpio";
273 reg = <0 0xe6055800 0 0x50>;
274 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
275 #gpio-cells = <2>;
276 gpio-controller;
277 gpio-ranges = <&pfc 0 224 4>;
278 #interrupt-cells = <2>;
279 interrupt-controller;
280 clocks = <&cpg CPG_MOD 905>;
281 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
282 resets = <&cpg 905>;
283 };
285 pfc: pinctrl@e6060000 {
286 compatible = "renesas,pfc-r8a774b1";
287 reg = <0 0xe6060000 0 0x50c>;
288 };
290 cmt0: timer@e60f0000 {
291 compatible = "renesas,r8a774b1-cmt0",
292 "renesas,rcar-gen3-cmt0";
293 reg = <0 0xe60f0000 0 0x1004>;
294 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
295 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
296 clocks = <&cpg CPG_MOD 303>;
297 clock-names = "fck";
298 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
299 resets = <&cpg 303>;
300 status = "disabled";
301 };
303 cmt1: timer@e6130000 {
304 compatible = "renesas,r8a774b1-cmt1",
305 "renesas,rcar-gen3-cmt1";
306 reg = <0 0xe6130000 0 0x1004>;
307 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
308 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
309 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
310 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
311 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
312 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
313 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
314 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
315 clocks = <&cpg CPG_MOD 302>;
316 clock-names = "fck";
317 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
318 resets = <&cpg 302>;
319 status = "disabled";
320 };
322 cmt2: timer@e6140000 {
323 compatible = "renesas,r8a774b1-cmt1",
324 "renesas,rcar-gen3-cmt1";
325 reg = <0 0xe6140000 0 0x1004>;
326 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
327 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
328 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
329 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
334 clocks = <&cpg CPG_MOD 301>;
335 clock-names = "fck";
336 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
337 resets = <&cpg 301>;
338 status = "disabled";
339 };
341 cmt3: timer@e6148000 {
342 compatible = "renesas,r8a774b1-cmt1",
343 "renesas,rcar-gen3-cmt1";
344 reg = <0 0xe6148000 0 0x1004>;
345 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
350 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
351 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
353 clocks = <&cpg CPG_MOD 300>;
354 clock-names = "fck";
355 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
356 resets = <&cpg 300>;
357 status = "disabled";
358 };
360 cpg: clock-controller@e6150000 {
361 compatible = "renesas,r8a774b1-cpg-mssr";
362 reg = <0 0xe6150000 0 0x1000>;
363 clocks = <&extal_clk>, <&extalr_clk>;
364 clock-names = "extal", "extalr";
365 #clock-cells = <2>;
366 #power-domain-cells = <0>;
367 #reset-cells = <1>;
368 };
370 rst: reset-controller@e6160000 {
371 compatible = "renesas,r8a774b1-rst";
372 reg = <0 0xe6160000 0 0x0200>;
373 };
375 sysc: system-controller@e6180000 {
376 compatible = "renesas,r8a774b1-sysc";
377 reg = <0 0xe6180000 0 0x0400>;
378 #power-domain-cells = <1>;
379 };
381 tsc: thermal@e6198000 {
382 compatible = "renesas,r8a774b1-thermal";
383 reg = <0 0xe6198000 0 0x100>,
384 <0 0xe61a0000 0 0x100>,
385 <0 0xe61a8000 0 0x100>;
386 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
388 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
389 clocks = <&cpg CPG_MOD 522>;
390 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
391 resets = <&cpg 522>;
392 #thermal-sensor-cells = <1>;
393 };
395 intc_ex: interrupt-controller@e61c0000 {
396 compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc";
397 #interrupt-cells = <2>;
398 interrupt-controller;
399 reg = <0 0xe61c0000 0 0x200>;
400 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
401 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
402 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
403 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
404 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
405 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
406 clocks = <&cpg CPG_MOD 407>;
407 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
408 resets = <&cpg 407>;
409 };
411 tmu0: timer@e61e0000 {
412 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
413 reg = <0 0xe61e0000 0 0x30>;
414 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
415 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
416 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
417 clocks = <&cpg CPG_MOD 125>;
418 clock-names = "fck";
419 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
420 resets = <&cpg 125>;
421 status = "disabled";
422 };
424 tmu1: timer@e6fc0000 {
425 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
426 reg = <0 0xe6fc0000 0 0x30>;
427 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
428 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
429 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
430 clocks = <&cpg CPG_MOD 124>;
431 clock-names = "fck";
432 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
433 resets = <&cpg 124>;
434 status = "disabled";
435 };
437 tmu2: timer@e6fd0000 {
438 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
439 reg = <0 0xe6fd0000 0 0x30>;
440 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
441 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
442 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
443 clocks = <&cpg CPG_MOD 123>;
444 clock-names = "fck";
445 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
446 resets = <&cpg 123>;
447 status = "disabled";
448 };
450 tmu3: timer@e6fe0000 {
451 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
452 reg = <0 0xe6fe0000 0 0x30>;
453 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
454 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
455 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
456 clocks = <&cpg CPG_MOD 122>;
457 clock-names = "fck";
458 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
459 resets = <&cpg 122>;
460 status = "disabled";
461 };
463 tmu4: timer@ffc00000 {
464 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
465 reg = <0 0xffc00000 0 0x30>;
466 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
467 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
468 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
469 clocks = <&cpg CPG_MOD 121>;
470 clock-names = "fck";
471 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
472 resets = <&cpg 121>;
473 status = "disabled";
474 };
476 i2c0: i2c@e6500000 {
477 #address-cells = <1>;
478 #size-cells = <0>;
479 compatible = "renesas,i2c-r8a774b1",
480 "renesas,rcar-gen3-i2c";
481 reg = <0 0xe6500000 0 0x40>;
482 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
483 clocks = <&cpg CPG_MOD 931>;
484 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
485 resets = <&cpg 931>;
486 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
487 <&dmac2 0x91>, <&dmac2 0x90>;
488 dma-names = "tx", "rx", "tx", "rx";
489 i2c-scl-internal-delay-ns = <110>;
490 status = "disabled";
491 };
493 i2c1: i2c@e6508000 {
494 #address-cells = <1>;
495 #size-cells = <0>;
496 compatible = "renesas,i2c-r8a774b1",
497 "renesas,rcar-gen3-i2c";
498 reg = <0 0xe6508000 0 0x40>;
499 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
500 clocks = <&cpg CPG_MOD 930>;
501 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
502 resets = <&cpg 930>;
503 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
504 <&dmac2 0x93>, <&dmac2 0x92>;
505 dma-names = "tx", "rx", "tx", "rx";
506 i2c-scl-internal-delay-ns = <6>;
507 status = "disabled";
508 };
510 i2c2: i2c@e6510000 {
511 #address-cells = <1>;
512 #size-cells = <0>;
513 compatible = "renesas,i2c-r8a774b1",
514 "renesas,rcar-gen3-i2c";
515 reg = <0 0xe6510000 0 0x40>;
516 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
517 clocks = <&cpg CPG_MOD 929>;
518 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
519 resets = <&cpg 929>;
520 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
521 <&dmac2 0x95>, <&dmac2 0x94>;
522 dma-names = "tx", "rx", "tx", "rx";
523 i2c-scl-internal-delay-ns = <6>;
524 status = "disabled";
525 };
527 i2c3: i2c@e66d0000 {
528 #address-cells = <1>;
529 #size-cells = <0>;
530 compatible = "renesas,i2c-r8a774b1",
531 "renesas,rcar-gen3-i2c";
532 reg = <0 0xe66d0000 0 0x40>;
533 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
534 clocks = <&cpg CPG_MOD 928>;
535 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
536 resets = <&cpg 928>;
537 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
538 dma-names = "tx", "rx";
539 i2c-scl-internal-delay-ns = <110>;
540 status = "disabled";
541 };
543 i2c4: i2c@e66d8000 {
544 #address-cells = <1>;
545 #size-cells = <0>;
546 compatible = "renesas,i2c-r8a774b1",
547 "renesas,rcar-gen3-i2c";
548 reg = <0 0xe66d8000 0 0x40>;
549 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
550 clocks = <&cpg CPG_MOD 927>;
551 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
552 resets = <&cpg 927>;
553 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
554 dma-names = "tx", "rx";
555 i2c-scl-internal-delay-ns = <110>;
556 status = "disabled";
557 };
559 i2c5: i2c@e66e0000 {
560 #address-cells = <1>;
561 #size-cells = <0>;
562 compatible = "renesas,i2c-r8a774b1",
563 "renesas,rcar-gen3-i2c";
564 reg = <0 0xe66e0000 0 0x40>;
565 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
566 clocks = <&cpg CPG_MOD 919>;
567 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
568 resets = <&cpg 919>;
569 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
570 dma-names = "tx", "rx";
571 i2c-scl-internal-delay-ns = <110>;
572 status = "disabled";
573 };
575 i2c6: i2c@e66e8000 {
576 #address-cells = <1>;
577 #size-cells = <0>;
578 compatible = "renesas,i2c-r8a774b1",
579 "renesas,rcar-gen3-i2c";
580 reg = <0 0xe66e8000 0 0x40>;
581 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
582 clocks = <&cpg CPG_MOD 918>;
583 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
584 resets = <&cpg 918>;
585 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
586 dma-names = "tx", "rx";
587 i2c-scl-internal-delay-ns = <6>;
588 status = "disabled";
589 };
591 i2c_dvfs: i2c@e60b0000 {
592 #address-cells = <1>;
593 #size-cells = <0>;
594 compatible = "renesas,iic-r8a774b1",
595 "renesas,rcar-gen3-iic",
596 "renesas,rmobile-iic";
597 reg = <0 0xe60b0000 0 0x425>;
598 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
599 clocks = <&cpg CPG_MOD 926>;
600 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
601 resets = <&cpg 926>;
602 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
603 dma-names = "tx", "rx";
604 status = "disabled";
605 };
607 hscif0: serial@e6540000 {
608 compatible = "renesas,hscif-r8a774b1",
609 "renesas,rcar-gen3-hscif",
610 "renesas,hscif";
611 reg = <0 0xe6540000 0 0x60>;
612 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&cpg CPG_MOD 520>,
614 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
615 <&scif_clk>;
616 clock-names = "fck", "brg_int", "scif_clk";
617 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
618 <&dmac2 0x31>, <&dmac2 0x30>;
619 dma-names = "tx", "rx", "tx", "rx";
620 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
621 resets = <&cpg 520>;
622 status = "disabled";
623 };
625 hscif1: serial@e6550000 {
626 compatible = "renesas,hscif-r8a774b1",
627 "renesas,rcar-gen3-hscif",
628 "renesas,hscif";
629 reg = <0 0xe6550000 0 0x60>;
630 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&cpg CPG_MOD 519>,
632 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
633 <&scif_clk>;
634 clock-names = "fck", "brg_int", "scif_clk";
635 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
636 <&dmac2 0x33>, <&dmac2 0x32>;
637 dma-names = "tx", "rx", "tx", "rx";
638 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
639 resets = <&cpg 519>;
640 status = "disabled";
641 };
643 hscif2: serial@e6560000 {
644 compatible = "renesas,hscif-r8a774b1",
645 "renesas,rcar-gen3-hscif",
646 "renesas,hscif";
647 reg = <0 0xe6560000 0 0x60>;
648 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
649 clocks = <&cpg CPG_MOD 518>,
650 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
651 <&scif_clk>;
652 clock-names = "fck", "brg_int", "scif_clk";
653 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
654 <&dmac2 0x35>, <&dmac2 0x34>;
655 dma-names = "tx", "rx", "tx", "rx";
656 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
657 resets = <&cpg 518>;
658 status = "disabled";
659 };
661 hscif3: serial@e66a0000 {
662 compatible = "renesas,hscif-r8a774b1",
663 "renesas,rcar-gen3-hscif",
664 "renesas,hscif";
665 reg = <0 0xe66a0000 0 0x60>;
666 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
667 clocks = <&cpg CPG_MOD 517>,
668 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
669 <&scif_clk>;
670 clock-names = "fck", "brg_int", "scif_clk";
671 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
672 dma-names = "tx", "rx";
673 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
674 resets = <&cpg 517>;
675 status = "disabled";
676 };
678 hscif4: serial@e66b0000 {
679 compatible = "renesas,hscif-r8a774b1",
680 "renesas,rcar-gen3-hscif",
681 "renesas,hscif";
682 reg = <0 0xe66b0000 0 0x60>;
683 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
684 clocks = <&cpg CPG_MOD 516>,
685 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
686 <&scif_clk>;
687 clock-names = "fck", "brg_int", "scif_clk";
688 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
689 dma-names = "tx", "rx";
690 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
691 resets = <&cpg 516>;
692 status = "disabled";
693 };
695 hsusb: usb@e6590000 {
696 compatible = "renesas,usbhs-r8a774b1",
697 "renesas,rcar-gen3-usbhs";
698 reg = <0 0xe6590000 0 0x200>;
699 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
700 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
701 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
702 <&usb_dmac1 0>, <&usb_dmac1 1>;
703 dma-names = "ch0", "ch1", "ch2", "ch3";
704 renesas,buswait = <11>;
705 phys = <&usb2_phy0 3>;
706 phy-names = "usb";
707 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
708 resets = <&cpg 704>, <&cpg 703>;
709 status = "disabled";
710 };
712 usb_dmac0: dma-controller@e65a0000 {
713 compatible = "renesas,r8a774b1-usb-dmac",
714 "renesas,usb-dmac";
715 reg = <0 0xe65a0000 0 0x100>;
716 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
717 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
718 interrupt-names = "ch0", "ch1";
719 clocks = <&cpg CPG_MOD 330>;
720 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
721 resets = <&cpg 330>;
722 #dma-cells = <1>;
723 dma-channels = <2>;
724 };
726 usb_dmac1: dma-controller@e65b0000 {
727 compatible = "renesas,r8a774b1-usb-dmac",
728 "renesas,usb-dmac";
729 reg = <0 0xe65b0000 0 0x100>;
730 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
731 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
732 interrupt-names = "ch0", "ch1";
733 clocks = <&cpg CPG_MOD 331>;
734 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
735 resets = <&cpg 331>;
736 #dma-cells = <1>;
737 dma-channels = <2>;
738 };
740 usb3_phy0: usb-phy@e65ee000 {
741 compatible = "renesas,r8a774b1-usb3-phy",
742 "renesas,rcar-gen3-usb3-phy";
743 reg = <0 0xe65ee000 0 0x90>;
744 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
745 <&usb_extal_clk>;
746 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
747 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
748 resets = <&cpg 328>;
749 #phy-cells = <0>;
750 status = "disabled";
751 };
753 dmac0: dma-controller@e6700000 {
754 compatible = "renesas,dmac-r8a774b1",
755 "renesas,rcar-dmac";
756 reg = <0 0xe6700000 0 0x10000>;
757 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
758 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
765 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
766 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
768 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
769 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
774 interrupt-names = "error",
775 "ch0", "ch1", "ch2", "ch3",
776 "ch4", "ch5", "ch6", "ch7",
777 "ch8", "ch9", "ch10", "ch11",
778 "ch12", "ch13", "ch14", "ch15";
779 clocks = <&cpg CPG_MOD 219>;
780 clock-names = "fck";
781 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
782 resets = <&cpg 219>;
783 #dma-cells = <1>;
784 dma-channels = <16>;
785 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
786 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
787 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
788 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
789 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
790 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
791 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
792 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
793 };
795 dmac1: dma-controller@e7300000 {
796 compatible = "renesas,dmac-r8a774b1",
797 "renesas,rcar-dmac";
798 reg = <0 0xe7300000 0 0x10000>;
799 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
800 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
801 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
807 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
808 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
816 interrupt-names = "error",
817 "ch0", "ch1", "ch2", "ch3",
818 "ch4", "ch5", "ch6", "ch7",
819 "ch8", "ch9", "ch10", "ch11",
820 "ch12", "ch13", "ch14", "ch15";
821 clocks = <&cpg CPG_MOD 218>;
822 clock-names = "fck";
823 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
824 resets = <&cpg 218>;
825 #dma-cells = <1>;
826 dma-channels = <16>;
827 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
828 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
829 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
830 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
831 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
832 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
833 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
834 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
835 };
837 dmac2: dma-controller@e7310000 {
838 compatible = "renesas,dmac-r8a774b1",
839 "renesas,rcar-dmac";
840 reg = <0 0xe7310000 0 0x10000>;
841 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
842 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
843 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
849 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
850 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
858 interrupt-names = "error",
859 "ch0", "ch1", "ch2", "ch3",
860 "ch4", "ch5", "ch6", "ch7",
861 "ch8", "ch9", "ch10", "ch11",
862 "ch12", "ch13", "ch14", "ch15";
863 clocks = <&cpg CPG_MOD 217>;
864 clock-names = "fck";
865 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
866 resets = <&cpg 217>;
867 #dma-cells = <1>;
868 dma-channels = <16>;
869 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
870 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
871 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
872 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
873 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
874 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
875 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
876 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
877 };
879 ipmmu_ds0: iommu@e6740000 {
880 compatible = "renesas,ipmmu-r8a774b1";
881 reg = <0 0xe6740000 0 0x1000>;
882 renesas,ipmmu-main = <&ipmmu_mm 0>;
883 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
884 #iommu-cells = <1>;
885 };
887 ipmmu_ds1: iommu@e7740000 {
888 compatible = "renesas,ipmmu-r8a774b1";
889 reg = <0 0xe7740000 0 0x1000>;
890 renesas,ipmmu-main = <&ipmmu_mm 1>;
891 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
892 #iommu-cells = <1>;
893 };
895 ipmmu_hc: iommu@e6570000 {
896 compatible = "renesas,ipmmu-r8a774b1";
897 reg = <0 0xe6570000 0 0x1000>;
898 renesas,ipmmu-main = <&ipmmu_mm 2>;
899 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
900 #iommu-cells = <1>;
901 };
903 ipmmu_mm: iommu@e67b0000 {
904 compatible = "renesas,ipmmu-r8a774b1";
905 reg = <0 0xe67b0000 0 0x1000>;
906 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
908 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
909 #iommu-cells = <1>;
910 };
912 ipmmu_mp: iommu@ec670000 {
913 compatible = "renesas,ipmmu-r8a774b1";
914 reg = <0 0xec670000 0 0x1000>;
915 renesas,ipmmu-main = <&ipmmu_mm 4>;
916 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
917 #iommu-cells = <1>;
918 };
920 ipmmu_pv0: iommu@fd800000 {
921 compatible = "renesas,ipmmu-r8a774b1";
922 reg = <0 0xfd800000 0 0x1000>;
923 renesas,ipmmu-main = <&ipmmu_mm 6>;
924 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
925 #iommu-cells = <1>;
926 };
928 ipmmu_vc0: iommu@fe6b0000 {
929 compatible = "renesas,ipmmu-r8a774b1";
930 reg = <0 0xfe6b0000 0 0x1000>;
931 renesas,ipmmu-main = <&ipmmu_mm 12>;
932 power-domains = <&sysc R8A774B1_PD_A3VC>;
933 #iommu-cells = <1>;
934 };
936 ipmmu_vi0: iommu@febd0000 {
937 compatible = "renesas,ipmmu-r8a774b1";
938 reg = <0 0xfebd0000 0 0x1000>;
939 renesas,ipmmu-main = <&ipmmu_mm 14>;
940 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
941 #iommu-cells = <1>;
942 };
944 ipmmu_vp0: iommu@fe990000 {
945 compatible = "renesas,ipmmu-r8a774b1";
946 reg = <0 0xfe990000 0 0x1000>;
947 renesas,ipmmu-main = <&ipmmu_mm 16>;
948 power-domains = <&sysc R8A774B1_PD_A3VP>;
949 #iommu-cells = <1>;
950 };
952 avb: ethernet@e6800000 {
953 compatible = "renesas,etheravb-r8a774b1",
954 "renesas,etheravb-rcar-gen3";
955 reg = <0 0xe6800000 0 0x800>;
956 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
957 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
959 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
960 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
961 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
962 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
963 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
964 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
965 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
966 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
979 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
980 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
981 interrupt-names = "ch0", "ch1", "ch2", "ch3",
982 "ch4", "ch5", "ch6", "ch7",
983 "ch8", "ch9", "ch10", "ch11",
984 "ch12", "ch13", "ch14", "ch15",
985 "ch16", "ch17", "ch18", "ch19",
986 "ch20", "ch21", "ch22", "ch23",
987 "ch24";
988 clocks = <&cpg CPG_MOD 812>;
989 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
990 resets = <&cpg 812>;
991 phy-mode = "rgmii";
992 rx-internal-delay-ps = <0>;
993 tx-internal-delay-ps = <0>;
994 iommus = <&ipmmu_ds0 16>;
995 #address-cells = <1>;
996 #size-cells = <0>;
997 status = "disabled";
998 };
1000 can0: can@e6c30000 {
1001 compatible = "renesas,can-r8a774b1",
1002 "renesas,rcar-gen3-can";
1003 reg = <0 0xe6c30000 0 0x1000>;
1004 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1005 clocks = <&cpg CPG_MOD 916>,
1006 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1007 <&can_clk>;
1008 clock-names = "clkp1", "clkp2", "can_clk";
1009 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1010 assigned-clock-rates = <40000000>;
1011 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1012 resets = <&cpg 916>;
1013 status = "disabled";
1014 };
1016 can1: can@e6c38000 {
1017 compatible = "renesas,can-r8a774b1",
1018 "renesas,rcar-gen3-can";
1019 reg = <0 0xe6c38000 0 0x1000>;
1020 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1021 clocks = <&cpg CPG_MOD 915>,
1022 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1023 <&can_clk>;
1024 clock-names = "clkp1", "clkp2", "can_clk";
1025 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1026 assigned-clock-rates = <40000000>;
1027 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1028 resets = <&cpg 915>;
1029 status = "disabled";
1030 };
1032 canfd: can@e66c0000 {
1033 compatible = "renesas,r8a774b1-canfd",
1034 "renesas,rcar-gen3-canfd";
1035 reg = <0 0xe66c0000 0 0x8000>;
1036 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1038 clocks = <&cpg CPG_MOD 914>,
1039 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1040 <&can_clk>;
1041 clock-names = "fck", "canfd", "can_clk";
1042 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1043 assigned-clock-rates = <40000000>;
1044 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1045 resets = <&cpg 914>;
1046 status = "disabled";
1048 channel0 {
1049 status = "disabled";
1050 };
1052 channel1 {
1053 status = "disabled";
1054 };
1055 };
1057 pwm0: pwm@e6e30000 {
1058 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1059 reg = <0 0xe6e30000 0 0x8>;
1060 #pwm-cells = <2>;
1061 clocks = <&cpg CPG_MOD 523>;
1062 resets = <&cpg 523>;
1063 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1064 status = "disabled";
1065 };
1067 pwm1: pwm@e6e31000 {
1068 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1069 reg = <0 0xe6e31000 0 0x8>;
1070 #pwm-cells = <2>;
1071 clocks = <&cpg CPG_MOD 523>;
1072 resets = <&cpg 523>;
1073 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1074 status = "disabled";
1075 };
1077 pwm2: pwm@e6e32000 {
1078 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1079 reg = <0 0xe6e32000 0 0x8>;
1080 #pwm-cells = <2>;
1081 clocks = <&cpg CPG_MOD 523>;
1082 resets = <&cpg 523>;
1083 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1084 status = "disabled";
1085 };
1087 pwm3: pwm@e6e33000 {
1088 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1089 reg = <0 0xe6e33000 0 0x8>;
1090 #pwm-cells = <2>;
1091 clocks = <&cpg CPG_MOD 523>;
1092 resets = <&cpg 523>;
1093 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1094 status = "disabled";
1095 };
1097 pwm4: pwm@e6e34000 {
1098 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1099 reg = <0 0xe6e34000 0 0x8>;
1100 #pwm-cells = <2>;
1101 clocks = <&cpg CPG_MOD 523>;
1102 resets = <&cpg 523>;
1103 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1104 status = "disabled";
1105 };
1107 pwm5: pwm@e6e35000 {
1108 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1109 reg = <0 0xe6e35000 0 0x8>;
1110 #pwm-cells = <2>;
1111 clocks = <&cpg CPG_MOD 523>;
1112 resets = <&cpg 523>;
1113 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1114 status = "disabled";
1115 };
1117 pwm6: pwm@e6e36000 {
1118 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1119 reg = <0 0xe6e36000 0 0x8>;
1120 #pwm-cells = <2>;
1121 clocks = <&cpg CPG_MOD 523>;
1122 resets = <&cpg 523>;
1123 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1124 status = "disabled";
1125 };
1127 scif0: serial@e6e60000 {
1128 compatible = "renesas,scif-r8a774b1",
1129 "renesas,rcar-gen3-scif", "renesas,scif";
1130 reg = <0 0xe6e60000 0 0x40>;
1131 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1132 clocks = <&cpg CPG_MOD 207>,
1133 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1134 <&scif_clk>;
1135 clock-names = "fck", "brg_int", "scif_clk";
1136 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1137 <&dmac2 0x51>, <&dmac2 0x50>;
1138 dma-names = "tx", "rx", "tx", "rx";
1139 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1140 resets = <&cpg 207>;
1141 status = "disabled";
1142 };
1144 scif1: serial@e6e68000 {
1145 compatible = "renesas,scif-r8a774b1",
1146 "renesas,rcar-gen3-scif", "renesas,scif";
1147 reg = <0 0xe6e68000 0 0x40>;
1148 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1149 clocks = <&cpg CPG_MOD 206>,
1150 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1151 <&scif_clk>;
1152 clock-names = "fck", "brg_int", "scif_clk";
1153 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1154 <&dmac2 0x53>, <&dmac2 0x52>;
1155 dma-names = "tx", "rx", "tx", "rx";
1156 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1157 resets = <&cpg 206>;
1158 status = "disabled";
1159 };
1161 scif2: serial@e6e88000 {
1162 compatible = "renesas,scif-r8a774b1",
1163 "renesas,rcar-gen3-scif", "renesas,scif";
1164 reg = <0 0xe6e88000 0 0x40>;
1165 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1166 clocks = <&cpg CPG_MOD 310>,
1167 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1168 <&scif_clk>;
1169 clock-names = "fck", "brg_int", "scif_clk";
1170 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1171 <&dmac2 0x13>, <&dmac2 0x12>;
1172 dma-names = "tx", "rx", "tx", "rx";
1173 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1174 resets = <&cpg 310>;
1175 status = "disabled";
1176 };
1178 scif3: serial@e6c50000 {
1179 compatible = "renesas,scif-r8a774b1",
1180 "renesas,rcar-gen3-scif", "renesas,scif";
1181 reg = <0 0xe6c50000 0 0x40>;
1182 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1183 clocks = <&cpg CPG_MOD 204>,
1184 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1185 <&scif_clk>;
1186 clock-names = "fck", "brg_int", "scif_clk";
1187 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1188 dma-names = "tx", "rx";
1189 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1190 resets = <&cpg 204>;
1191 status = "disabled";
1192 };
1194 scif4: serial@e6c40000 {
1195 compatible = "renesas,scif-r8a774b1",
1196 "renesas,rcar-gen3-scif", "renesas,scif";
1197 reg = <0 0xe6c40000 0 0x40>;
1198 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1199 clocks = <&cpg CPG_MOD 203>,
1200 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1201 <&scif_clk>;
1202 clock-names = "fck", "brg_int", "scif_clk";
1203 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1204 dma-names = "tx", "rx";
1205 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1206 resets = <&cpg 203>;
1207 status = "disabled";
1208 };
1210 scif5: serial@e6f30000 {
1211 compatible = "renesas,scif-r8a774b1",
1212 "renesas,rcar-gen3-scif", "renesas,scif";
1213 reg = <0 0xe6f30000 0 0x40>;
1214 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1215 clocks = <&cpg CPG_MOD 202>,
1216 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1217 <&scif_clk>;
1218 clock-names = "fck", "brg_int", "scif_clk";
1219 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1220 <&dmac2 0x5b>, <&dmac2 0x5a>;
1221 dma-names = "tx", "rx", "tx", "rx";
1222 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1223 resets = <&cpg 202>;
1224 status = "disabled";
1225 };
1227 msiof0: spi@e6e90000 {
1228 compatible = "renesas,msiof-r8a774b1",
1229 "renesas,rcar-gen3-msiof";
1230 reg = <0 0xe6e90000 0 0x0064>;
1231 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1232 clocks = <&cpg CPG_MOD 211>;
1233 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1234 <&dmac2 0x41>, <&dmac2 0x40>;
1235 dma-names = "tx", "rx", "tx", "rx";
1236 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1237 resets = <&cpg 211>;
1238 #address-cells = <1>;
1239 #size-cells = <0>;
1240 status = "disabled";
1241 };
1243 msiof1: spi@e6ea0000 {
1244 compatible = "renesas,msiof-r8a774b1",
1245 "renesas,rcar-gen3-msiof";
1246 reg = <0 0xe6ea0000 0 0x0064>;
1247 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1248 clocks = <&cpg CPG_MOD 210>;
1249 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1250 <&dmac2 0x43>, <&dmac2 0x42>;
1251 dma-names = "tx", "rx", "tx", "rx";
1252 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1253 resets = <&cpg 210>;
1254 #address-cells = <1>;
1255 #size-cells = <0>;
1256 status = "disabled";
1257 };
1259 msiof2: spi@e6c00000 {
1260 compatible = "renesas,msiof-r8a774b1",
1261 "renesas,rcar-gen3-msiof";
1262 reg = <0 0xe6c00000 0 0x0064>;
1263 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1264 clocks = <&cpg CPG_MOD 209>;
1265 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1266 dma-names = "tx", "rx";
1267 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1268 resets = <&cpg 209>;
1269 #address-cells = <1>;
1270 #size-cells = <0>;
1271 status = "disabled";
1272 };
1274 msiof3: spi@e6c10000 {
1275 compatible = "renesas,msiof-r8a774b1",
1276 "renesas,rcar-gen3-msiof";
1277 reg = <0 0xe6c10000 0 0x0064>;
1278 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1279 clocks = <&cpg CPG_MOD 208>;
1280 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1281 dma-names = "tx", "rx";
1282 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1283 resets = <&cpg 208>;
1284 #address-cells = <1>;
1285 #size-cells = <0>;
1286 status = "disabled";
1287 };
1289 vin0: video@e6ef0000 {
1290 compatible = "renesas,vin-r8a774b1";
1291 reg = <0 0xe6ef0000 0 0x1000>;
1292 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1293 clocks = <&cpg CPG_MOD 811>;
1294 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1295 resets = <&cpg 811>;
1296 renesas,id = <0>;
1297 status = "disabled";
1299 ports {
1300 #address-cells = <1>;
1301 #size-cells = <0>;
1303 port@1 {
1304 #address-cells = <1>;
1305 #size-cells = <0>;
1307 reg = <1>;
1309 vin0csi20: endpoint@0 {
1310 reg = <0>;
1311 remote-endpoint = <&csi20vin0>;
1312 };
1313 vin0csi40: endpoint@2 {
1314 reg = <2>;
1315 remote-endpoint = <&csi40vin0>;
1316 };
1317 };
1318 };
1319 };
1321 vin1: video@e6ef1000 {
1322 compatible = "renesas,vin-r8a774b1";
1323 reg = <0 0xe6ef1000 0 0x1000>;
1324 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1325 clocks = <&cpg CPG_MOD 810>;
1326 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1327 resets = <&cpg 810>;
1328 renesas,id = <1>;
1329 status = "disabled";
1331 ports {
1332 #address-cells = <1>;
1333 #size-cells = <0>;
1335 port@1 {
1336 #address-cells = <1>;
1337 #size-cells = <0>;
1339 reg = <1>;
1341 vin1csi20: endpoint@0 {
1342 reg = <0>;
1343 remote-endpoint = <&csi20vin1>;
1344 };
1345 vin1csi40: endpoint@2 {
1346 reg = <2>;
1347 remote-endpoint = <&csi40vin1>;
1348 };
1349 };
1350 };
1351 };
1353 vin2: video@e6ef2000 {
1354 compatible = "renesas,vin-r8a774b1";
1355 reg = <0 0xe6ef2000 0 0x1000>;
1356 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1357 clocks = <&cpg CPG_MOD 809>;
1358 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1359 resets = <&cpg 809>;
1360 renesas,id = <2>;
1361 status = "disabled";
1363 ports {
1364 #address-cells = <1>;
1365 #size-cells = <0>;
1367 port@1 {
1368 #address-cells = <1>;
1369 #size-cells = <0>;
1371 reg = <1>;
1373 vin2csi20: endpoint@0 {
1374 reg = <0>;
1375 remote-endpoint = <&csi20vin2>;
1376 };
1377 vin2csi40: endpoint@2 {
1378 reg = <2>;
1379 remote-endpoint = <&csi40vin2>;
1380 };
1381 };
1382 };
1383 };
1385 vin3: video@e6ef3000 {
1386 compatible = "renesas,vin-r8a774b1";
1387 reg = <0 0xe6ef3000 0 0x1000>;
1388 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1389 clocks = <&cpg CPG_MOD 808>;
1390 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1391 resets = <&cpg 808>;
1392 renesas,id = <3>;
1393 status = "disabled";
1395 ports {
1396 #address-cells = <1>;
1397 #size-cells = <0>;
1399 port@1 {
1400 #address-cells = <1>;
1401 #size-cells = <0>;
1403 reg = <1>;
1405 vin3csi20: endpoint@0 {
1406 reg = <0>;
1407 remote-endpoint = <&csi20vin3>;
1408 };
1409 vin3csi40: endpoint@2 {
1410 reg = <2>;
1411 remote-endpoint = <&csi40vin3>;
1412 };
1413 };
1414 };
1415 };
1417 vin4: video@e6ef4000 {
1418 compatible = "renesas,vin-r8a774b1";
1419 reg = <0 0xe6ef4000 0 0x1000>;
1420 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1421 clocks = <&cpg CPG_MOD 807>;
1422 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1423 resets = <&cpg 807>;
1424 renesas,id = <4>;
1425 status = "disabled";
1427 ports {
1428 #address-cells = <1>;
1429 #size-cells = <0>;
1431 port@1 {
1432 #address-cells = <1>;
1433 #size-cells = <0>;
1435 reg = <1>;
1437 vin4csi20: endpoint@0 {
1438 reg = <0>;
1439 remote-endpoint = <&csi20vin4>;
1440 };
1441 vin4csi40: endpoint@2 {
1442 reg = <2>;
1443 remote-endpoint = <&csi40vin4>;
1444 };
1445 };
1446 };
1447 };
1449 vin5: video@e6ef5000 {
1450 compatible = "renesas,vin-r8a774b1";
1451 reg = <0 0xe6ef5000 0 0x1000>;
1452 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1453 clocks = <&cpg CPG_MOD 806>;
1454 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1455 resets = <&cpg 806>;
1456 renesas,id = <5>;
1457 status = "disabled";
1459 ports {
1460 #address-cells = <1>;
1461 #size-cells = <0>;
1463 port@1 {
1464 #address-cells = <1>;
1465 #size-cells = <0>;
1467 reg = <1>;
1469 vin5csi20: endpoint@0 {
1470 reg = <0>;
1471 remote-endpoint = <&csi20vin5>;
1472 };
1473 vin5csi40: endpoint@2 {
1474 reg = <2>;
1475 remote-endpoint = <&csi40vin5>;
1476 };
1477 };
1478 };
1479 };
1481 vin6: video@e6ef6000 {
1482 compatible = "renesas,vin-r8a774b1";
1483 reg = <0 0xe6ef6000 0 0x1000>;
1484 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1485 clocks = <&cpg CPG_MOD 805>;
1486 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1487 resets = <&cpg 805>;
1488 renesas,id = <6>;
1489 status = "disabled";
1491 ports {
1492 #address-cells = <1>;
1493 #size-cells = <0>;
1495 port@1 {
1496 #address-cells = <1>;
1497 #size-cells = <0>;
1499 reg = <1>;
1501 vin6csi20: endpoint@0 {
1502 reg = <0>;
1503 remote-endpoint = <&csi20vin6>;
1504 };
1505 vin6csi40: endpoint@2 {
1506 reg = <2>;
1507 remote-endpoint = <&csi40vin6>;
1508 };
1509 };
1510 };
1511 };
1513 vin7: video@e6ef7000 {
1514 compatible = "renesas,vin-r8a774b1";
1515 reg = <0 0xe6ef7000 0 0x1000>;
1516 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1517 clocks = <&cpg CPG_MOD 804>;
1518 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1519 resets = <&cpg 804>;
1520 renesas,id = <7>;
1521 status = "disabled";
1523 ports {
1524 #address-cells = <1>;
1525 #size-cells = <0>;
1527 port@1 {
1528 #address-cells = <1>;
1529 #size-cells = <0>;
1531 reg = <1>;
1533 vin7csi20: endpoint@0 {
1534 reg = <0>;
1535 remote-endpoint = <&csi20vin7>;
1536 };
1537 vin7csi40: endpoint@2 {
1538 reg = <2>;
1539 remote-endpoint = <&csi40vin7>;
1540 };
1541 };
1542 };
1543 };
1545 rcar_sound: sound@ec500000 {
1546 /*
1547 * #sound-dai-cells is required
1548 *
1549 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1550 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1551 */
1552 /*
1553 * #clock-cells is required for audio_clkout0/1/2/3
1554 *
1555 * clkout : #clock-cells = <0>; <&rcar_sound>;
1556 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1557 */
1558 compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
1559 reg = <0 0xec500000 0 0x1000>, /* SCU */
1560 <0 0xec5a0000 0 0x100>, /* ADG */
1561 <0 0xec540000 0 0x1000>, /* SSIU */
1562 <0 0xec541000 0 0x280>, /* SSI */
1563 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1564 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1566 clocks = <&cpg CPG_MOD 1005>,
1567 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1568 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1569 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1570 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1571 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1572 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1573 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1574 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1575 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1576 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1577 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1578 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1579 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1580 <&audio_clk_a>, <&audio_clk_b>,
1581 <&audio_clk_c>,
1582 <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
1583 clock-names = "ssi-all",
1584 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1585 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1586 "ssi.1", "ssi.0",
1587 "src.9", "src.8", "src.7", "src.6",
1588 "src.5", "src.4", "src.3", "src.2",
1589 "src.1", "src.0",
1590 "mix.1", "mix.0",
1591 "ctu.1", "ctu.0",
1592 "dvc.0", "dvc.1",
1593 "clk_a", "clk_b", "clk_c", "clk_i";
1594 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1595 resets = <&cpg 1005>,
1596 <&cpg 1006>, <&cpg 1007>,
1597 <&cpg 1008>, <&cpg 1009>,
1598 <&cpg 1010>, <&cpg 1011>,
1599 <&cpg 1012>, <&cpg 1013>,
1600 <&cpg 1014>, <&cpg 1015>;
1601 reset-names = "ssi-all",
1602 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1603 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1604 "ssi.1", "ssi.0";
1605 status = "disabled";
1607 rcar_sound,ctu {
1608 ctu00: ctu-0 { };
1609 ctu01: ctu-1 { };
1610 ctu02: ctu-2 { };
1611 ctu03: ctu-3 { };
1612 ctu10: ctu-4 { };
1613 ctu11: ctu-5 { };
1614 ctu12: ctu-6 { };
1615 ctu13: ctu-7 { };
1616 };
1618 rcar_sound,dvc {
1619 dvc0: dvc-0 {
1620 dmas = <&audma1 0xbc>;
1621 dma-names = "tx";
1622 };
1623 dvc1: dvc-1 {
1624 dmas = <&audma1 0xbe>;
1625 dma-names = "tx";
1626 };
1627 };
1629 rcar_sound,mix {
1630 mix0: mix-0 { };
1631 mix1: mix-1 { };
1632 };
1634 rcar_sound,src {
1635 src0: src-0 {
1636 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1637 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1638 dma-names = "rx", "tx";
1639 };
1640 src1: src-1 {
1641 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1642 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1643 dma-names = "rx", "tx";
1644 };
1645 src2: src-2 {
1646 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1647 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1648 dma-names = "rx", "tx";
1649 };
1650 src3: src-3 {
1651 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1652 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1653 dma-names = "rx", "tx";
1654 };
1655 src4: src-4 {
1656 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1657 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1658 dma-names = "rx", "tx";
1659 };
1660 src5: src-5 {
1661 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1662 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1663 dma-names = "rx", "tx";
1664 };
1665 src6: src-6 {
1666 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1667 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1668 dma-names = "rx", "tx";
1669 };
1670 src7: src-7 {
1671 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1672 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1673 dma-names = "rx", "tx";
1674 };
1675 src8: src-8 {
1676 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1677 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1678 dma-names = "rx", "tx";
1679 };
1680 src9: src-9 {
1681 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1682 dmas = <&audma0 0x97>, <&audma1 0xba>;
1683 dma-names = "rx", "tx";
1684 };
1685 };
1687 rcar_sound,ssi {
1688 ssi0: ssi-0 {
1689 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1690 dmas = <&audma0 0x01>, <&audma1 0x02>;
1691 dma-names = "rx", "tx";
1692 };
1693 ssi1: ssi-1 {
1694 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1695 dmas = <&audma0 0x03>, <&audma1 0x04>;
1696 dma-names = "rx", "tx";
1697 };
1698 ssi2: ssi-2 {
1699 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1700 dmas = <&audma0 0x05>, <&audma1 0x06>;
1701 dma-names = "rx", "tx";
1702 };
1703 ssi3: ssi-3 {
1704 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1705 dmas = <&audma0 0x07>, <&audma1 0x08>;
1706 dma-names = "rx", "tx";
1707 };
1708 ssi4: ssi-4 {
1709 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1710 dmas = <&audma0 0x09>, <&audma1 0x0a>;
1711 dma-names = "rx", "tx";
1712 };
1713 ssi5: ssi-5 {
1714 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1715 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1716 dma-names = "rx", "tx";
1717 };
1718 ssi6: ssi-6 {
1719 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1720 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1721 dma-names = "rx", "tx";
1722 };
1723 ssi7: ssi-7 {
1724 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1725 dmas = <&audma0 0x0f>, <&audma1 0x10>;
1726 dma-names = "rx", "tx";
1727 };
1728 ssi8: ssi-8 {
1729 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1730 dmas = <&audma0 0x11>, <&audma1 0x12>;
1731 dma-names = "rx", "tx";
1732 };
1733 ssi9: ssi-9 {
1734 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1735 dmas = <&audma0 0x13>, <&audma1 0x14>;
1736 dma-names = "rx", "tx";
1737 };
1738 };
1740 rcar_sound,ssiu {
1741 ssiu00: ssiu-0 {
1742 dmas = <&audma0 0x15>, <&audma1 0x16>;
1743 dma-names = "rx", "tx";
1744 };
1745 ssiu01: ssiu-1 {
1746 dmas = <&audma0 0x35>, <&audma1 0x36>;
1747 dma-names = "rx", "tx";
1748 };
1749 ssiu02: ssiu-2 {
1750 dmas = <&audma0 0x37>, <&audma1 0x38>;
1751 dma-names = "rx", "tx";
1752 };
1753 ssiu03: ssiu-3 {
1754 dmas = <&audma0 0x47>, <&audma1 0x48>;
1755 dma-names = "rx", "tx";
1756 };
1757 ssiu04: ssiu-4 {
1758 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1759 dma-names = "rx", "tx";
1760 };
1761 ssiu05: ssiu-5 {
1762 dmas = <&audma0 0x43>, <&audma1 0x44>;
1763 dma-names = "rx", "tx";
1764 };
1765 ssiu06: ssiu-6 {
1766 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1767 dma-names = "rx", "tx";
1768 };
1769 ssiu07: ssiu-7 {
1770 dmas = <&audma0 0x53>, <&audma1 0x54>;
1771 dma-names = "rx", "tx";
1772 };
1773 ssiu10: ssiu-8 {
1774 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1775 dma-names = "rx", "tx";
1776 };
1777 ssiu11: ssiu-9 {
1778 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1779 dma-names = "rx", "tx";
1780 };
1781 ssiu12: ssiu-10 {
1782 dmas = <&audma0 0x57>, <&audma1 0x58>;
1783 dma-names = "rx", "tx";
1784 };
1785 ssiu13: ssiu-11 {
1786 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1787 dma-names = "rx", "tx";
1788 };
1789 ssiu14: ssiu-12 {
1790 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1791 dma-names = "rx", "tx";
1792 };
1793 ssiu15: ssiu-13 {
1794 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1795 dma-names = "rx", "tx";
1796 };
1797 ssiu16: ssiu-14 {
1798 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1799 dma-names = "rx", "tx";
1800 };
1801 ssiu17: ssiu-15 {
1802 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1803 dma-names = "rx", "tx";
1804 };
1805 ssiu20: ssiu-16 {
1806 dmas = <&audma0 0x63>, <&audma1 0x64>;
1807 dma-names = "rx", "tx";
1808 };
1809 ssiu21: ssiu-17 {
1810 dmas = <&audma0 0x67>, <&audma1 0x68>;
1811 dma-names = "rx", "tx";
1812 };
1813 ssiu22: ssiu-18 {
1814 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1815 dma-names = "rx", "tx";
1816 };
1817 ssiu23: ssiu-19 {
1818 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1819 dma-names = "rx", "tx";
1820 };
1821 ssiu24: ssiu-20 {
1822 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1823 dma-names = "rx", "tx";
1824 };
1825 ssiu25: ssiu-21 {
1826 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1827 dma-names = "rx", "tx";
1828 };
1829 ssiu26: ssiu-22 {
1830 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1831 dma-names = "rx", "tx";
1832 };
1833 ssiu27: ssiu-23 {
1834 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1835 dma-names = "rx", "tx";
1836 };
1837 ssiu30: ssiu-24 {
1838 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1839 dma-names = "rx", "tx";
1840 };
1841 ssiu31: ssiu-25 {
1842 dmas = <&audma0 0x21>, <&audma1 0x22>;
1843 dma-names = "rx", "tx";
1844 };
1845 ssiu32: ssiu-26 {
1846 dmas = <&audma0 0x23>, <&audma1 0x24>;
1847 dma-names = "rx", "tx";
1848 };
1849 ssiu33: ssiu-27 {
1850 dmas = <&audma0 0x25>, <&audma1 0x26>;
1851 dma-names = "rx", "tx";
1852 };
1853 ssiu34: ssiu-28 {
1854 dmas = <&audma0 0x27>, <&audma1 0x28>;
1855 dma-names = "rx", "tx";
1856 };
1857 ssiu35: ssiu-29 {
1858 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1859 dma-names = "rx", "tx";
1860 };
1861 ssiu36: ssiu-30 {
1862 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1863 dma-names = "rx", "tx";
1864 };
1865 ssiu37: ssiu-31 {
1866 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1867 dma-names = "rx", "tx";
1868 };
1869 ssiu40: ssiu-32 {
1870 dmas = <&audma0 0x71>, <&audma1 0x72>;
1871 dma-names = "rx", "tx";
1872 };
1873 ssiu41: ssiu-33 {
1874 dmas = <&audma0 0x17>, <&audma1 0x18>;
1875 dma-names = "rx", "tx";
1876 };
1877 ssiu42: ssiu-34 {
1878 dmas = <&audma0 0x19>, <&audma1 0x1A>;
1879 dma-names = "rx", "tx";
1880 };
1881 ssiu43: ssiu-35 {
1882 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1883 dma-names = "rx", "tx";
1884 };
1885 ssiu44: ssiu-36 {
1886 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1887 dma-names = "rx", "tx";
1888 };
1889 ssiu45: ssiu-37 {
1890 dmas = <&audma0 0x1F>, <&audma1 0x20>;
1891 dma-names = "rx", "tx";
1892 };
1893 ssiu46: ssiu-38 {
1894 dmas = <&audma0 0x31>, <&audma1 0x32>;
1895 dma-names = "rx", "tx";
1896 };
1897 ssiu47: ssiu-39 {
1898 dmas = <&audma0 0x33>, <&audma1 0x34>;
1899 dma-names = "rx", "tx";
1900 };
1901 ssiu50: ssiu-40 {
1902 dmas = <&audma0 0x73>, <&audma1 0x74>;
1903 dma-names = "rx", "tx";
1904 };
1905 ssiu60: ssiu-41 {
1906 dmas = <&audma0 0x75>, <&audma1 0x76>;
1907 dma-names = "rx", "tx";
1908 };
1909 ssiu70: ssiu-42 {
1910 dmas = <&audma0 0x79>, <&audma1 0x7a>;
1911 dma-names = "rx", "tx";
1912 };
1913 ssiu80: ssiu-43 {
1914 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1915 dma-names = "rx", "tx";
1916 };
1917 ssiu90: ssiu-44 {
1918 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1919 dma-names = "rx", "tx";
1920 };
1921 ssiu91: ssiu-45 {
1922 dmas = <&audma0 0x7F>, <&audma1 0x80>;
1923 dma-names = "rx", "tx";
1924 };
1925 ssiu92: ssiu-46 {
1926 dmas = <&audma0 0x81>, <&audma1 0x82>;
1927 dma-names = "rx", "tx";
1928 };
1929 ssiu93: ssiu-47 {
1930 dmas = <&audma0 0x83>, <&audma1 0x84>;
1931 dma-names = "rx", "tx";
1932 };
1933 ssiu94: ssiu-48 {
1934 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
1935 dma-names = "rx", "tx";
1936 };
1937 ssiu95: ssiu-49 {
1938 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
1939 dma-names = "rx", "tx";
1940 };
1941 ssiu96: ssiu-50 {
1942 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
1943 dma-names = "rx", "tx";
1944 };
1945 ssiu97: ssiu-51 {
1946 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
1947 dma-names = "rx", "tx";
1948 };
1949 };
1950 };
1952 audma0: dma-controller@ec700000 {
1953 compatible = "renesas,dmac-r8a774b1",
1954 "renesas,rcar-dmac";
1955 reg = <0 0xec700000 0 0x10000>;
1956 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1957 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1958 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1959 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1960 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1961 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1962 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1963 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1964 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1965 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1966 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1967 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1968 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1969 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1970 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1971 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1972 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1973 interrupt-names = "error",
1974 "ch0", "ch1", "ch2", "ch3",
1975 "ch4", "ch5", "ch6", "ch7",
1976 "ch8", "ch9", "ch10", "ch11",
1977 "ch12", "ch13", "ch14", "ch15";
1978 clocks = <&cpg CPG_MOD 502>;
1979 clock-names = "fck";
1980 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1981 resets = <&cpg 502>;
1982 #dma-cells = <1>;
1983 dma-channels = <16>;
1984 };
1986 audma1: dma-controller@ec720000 {
1987 compatible = "renesas,dmac-r8a774b1",
1988 "renesas,rcar-dmac";
1989 reg = <0 0xec720000 0 0x10000>;
1990 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
1991 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1992 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1993 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1994 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1995 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1996 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1997 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1998 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1999 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2000 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2001 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2002 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2003 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2004 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2005 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2006 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2007 interrupt-names = "error",
2008 "ch0", "ch1", "ch2", "ch3",
2009 "ch4", "ch5", "ch6", "ch7",
2010 "ch8", "ch9", "ch10", "ch11",
2011 "ch12", "ch13", "ch14", "ch15";
2012 clocks = <&cpg CPG_MOD 501>;
2013 clock-names = "fck";
2014 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2015 resets = <&cpg 501>;
2016 #dma-cells = <1>;
2017 dma-channels = <16>;
2018 };
2020 xhci0: usb@ee000000 {
2021 compatible = "renesas,xhci-r8a774b1",
2022 "renesas,rcar-gen3-xhci";
2023 reg = <0 0xee000000 0 0xc00>;
2024 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2025 clocks = <&cpg CPG_MOD 328>;
2026 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2027 resets = <&cpg 328>;
2028 status = "disabled";
2029 };
2031 usb3_peri0: usb@ee020000 {
2032 compatible = "renesas,r8a774b1-usb3-peri",
2033 "renesas,rcar-gen3-usb3-peri";
2034 reg = <0 0xee020000 0 0x400>;
2035 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2036 clocks = <&cpg CPG_MOD 328>;
2037 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2038 resets = <&cpg 328>;
2039 status = "disabled";
2040 };
2042 ohci0: usb@ee080000 {
2043 compatible = "generic-ohci";
2044 reg = <0 0xee080000 0 0x100>;
2045 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2046 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2047 phys = <&usb2_phy0 1>;
2048 phy-names = "usb";
2049 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2050 resets = <&cpg 703>, <&cpg 704>;
2051 status = "disabled";
2052 };
2054 ohci1: usb@ee0a0000 {
2055 compatible = "generic-ohci";
2056 reg = <0 0xee0a0000 0 0x100>;
2057 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2058 clocks = <&cpg CPG_MOD 702>;
2059 phys = <&usb2_phy1 1>;
2060 phy-names = "usb";
2061 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2062 resets = <&cpg 702>;
2063 status = "disabled";
2064 };
2066 ehci0: usb@ee080100 {
2067 compatible = "generic-ehci";
2068 reg = <0 0xee080100 0 0x100>;
2069 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2070 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2071 phys = <&usb2_phy0 2>;
2072 phy-names = "usb";
2073 companion = <&ohci0>;
2074 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2075 resets = <&cpg 703>, <&cpg 704>;
2076 status = "disabled";
2077 };
2079 ehci1: usb@ee0a0100 {
2080 compatible = "generic-ehci";
2081 reg = <0 0xee0a0100 0 0x100>;
2082 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2083 clocks = <&cpg CPG_MOD 702>;
2084 phys = <&usb2_phy1 2>;
2085 phy-names = "usb";
2086 companion = <&ohci1>;
2087 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2088 resets = <&cpg 702>;
2089 status = "disabled";
2090 };
2092 usb2_phy0: usb-phy@ee080200 {
2093 compatible = "renesas,usb2-phy-r8a774b1",
2094 "renesas,rcar-gen3-usb2-phy";
2095 reg = <0 0xee080200 0 0x700>;
2096 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2097 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2098 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2099 resets = <&cpg 703>, <&cpg 704>;
2100 #phy-cells = <1>;
2101 status = "disabled";
2102 };
2104 usb2_phy1: usb-phy@ee0a0200 {
2105 compatible = "renesas,usb2-phy-r8a774b1",
2106 "renesas,rcar-gen3-usb2-phy";
2107 reg = <0 0xee0a0200 0 0x700>;
2108 clocks = <&cpg CPG_MOD 702>;
2109 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2110 resets = <&cpg 702>;
2111 #phy-cells = <1>;
2112 status = "disabled";
2113 };
2115 sdhi0: mmc@ee100000 {
2116 compatible = "renesas,sdhi-r8a774b1",
2117 "renesas,rcar-gen3-sdhi";
2118 reg = <0 0xee100000 0 0x2000>;
2119 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2120 clocks = <&cpg CPG_MOD 314>;
2121 max-frequency = <200000000>;
2122 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2123 resets = <&cpg 314>;
2124 status = "disabled";
2125 };
2127 sdhi1: mmc@ee120000 {
2128 compatible = "renesas,sdhi-r8a774b1",
2129 "renesas,rcar-gen3-sdhi";
2130 reg = <0 0xee120000 0 0x2000>;
2131 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2132 clocks = <&cpg CPG_MOD 313>;
2133 max-frequency = <200000000>;
2134 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2135 resets = <&cpg 313>;
2136 status = "disabled";
2137 };
2139 sdhi2: mmc@ee140000 {
2140 compatible = "renesas,sdhi-r8a774b1",
2141 "renesas,rcar-gen3-sdhi";
2142 reg = <0 0xee140000 0 0x2000>;
2143 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2144 clocks = <&cpg CPG_MOD 312>;
2145 max-frequency = <200000000>;
2146 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2147 resets = <&cpg 312>;
2148 status = "disabled";
2149 };
2151 sdhi3: mmc@ee160000 {
2152 compatible = "renesas,sdhi-r8a774b1",
2153 "renesas,rcar-gen3-sdhi";
2154 reg = <0 0xee160000 0 0x2000>;
2155 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2156 clocks = <&cpg CPG_MOD 311>;
2157 max-frequency = <200000000>;
2158 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2159 resets = <&cpg 311>;
2160 status = "disabled";
2161 };
2163 sata: sata@ee300000 {
2164 compatible = "renesas,sata-r8a774b1",
2165 "renesas,rcar-gen3-sata";
2166 reg = <0 0xee300000 0 0x200000>;
2167 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2168 clocks = <&cpg CPG_MOD 815>;
2169 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2170 resets = <&cpg 815>;
2171 status = "disabled";
2172 };
2174 gic: interrupt-controller@f1010000 {
2175 compatible = "arm,gic-400";
2176 #interrupt-cells = <3>;
2177 #address-cells = <0>;
2178 interrupt-controller;
2179 reg = <0x0 0xf1010000 0 0x1000>,
2180 <0x0 0xf1020000 0 0x20000>,
2181 <0x0 0xf1040000 0 0x20000>,
2182 <0x0 0xf1060000 0 0x20000>;
2183 interrupts = <GIC_PPI 9
2184 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2185 clocks = <&cpg CPG_MOD 408>;
2186 clock-names = "clk";
2187 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2188 resets = <&cpg 408>;
2189 };
2191 pciec0: pcie@fe000000 {
2192 compatible = "renesas,pcie-r8a774b1",
2193 "renesas,pcie-rcar-gen3";
2194 reg = <0 0xfe000000 0 0x80000>;
2195 #address-cells = <3>;
2196 #size-cells = <2>;
2197 bus-range = <0x00 0xff>;
2198 device_type = "pci";
2199 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2200 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2201 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2202 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2203 /* Map all possible DDR as inbound ranges */
2204 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2205 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2208 #interrupt-cells = <1>;
2209 interrupt-map-mask = <0 0 0 0>;
2210 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2211 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2212 clock-names = "pcie", "pcie_bus";
2213 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2214 resets = <&cpg 319>;
2215 status = "disabled";
2216 };
2218 pciec1: pcie@ee800000 {
2219 compatible = "renesas,pcie-r8a774b1",
2220 "renesas,pcie-rcar-gen3";
2221 reg = <0 0xee800000 0 0x80000>;
2222 #address-cells = <3>;
2223 #size-cells = <2>;
2224 bus-range = <0x00 0xff>;
2225 device_type = "pci";
2226 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2227 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2228 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2229 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2230 /* Map all possible DDR as inbound ranges */
2231 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2232 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2233 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2234 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2235 #interrupt-cells = <1>;
2236 interrupt-map-mask = <0 0 0 0>;
2237 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2238 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2239 clock-names = "pcie", "pcie_bus";
2240 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2241 resets = <&cpg 318>;
2242 status = "disabled";
2243 };
2245 pciec0_ep: pcie-ep@fe000000 {
2246 compatible = "renesas,r8a774b1-pcie-ep",
2247 "renesas,rcar-gen3-pcie-ep";
2248 reg = <0x0 0xfe000000 0 0x80000>,
2249 <0x0 0xfe100000 0 0x100000>,
2250 <0x0 0xfe200000 0 0x200000>,
2251 <0x0 0x30000000 0 0x8000000>,
2252 <0x0 0x38000000 0 0x8000000>;
2253 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2254 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2255 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2256 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2257 clocks = <&cpg CPG_MOD 319>;
2258 clock-names = "pcie";
2259 resets = <&cpg 319>;
2260 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2261 status = "disabled";
2262 };
2264 pciec1_ep: pcie-ep@ee800000 {
2265 compatible = "renesas,r8a774b1-pcie-ep",
2266 "renesas,rcar-gen3-pcie-ep";
2267 reg = <0x0 0xee800000 0 0x80000>,
2268 <0x0 0xee900000 0 0x100000>,
2269 <0x0 0xeea00000 0 0x200000>,
2270 <0x0 0xc0000000 0 0x8000000>,
2271 <0x0 0xc8000000 0 0x8000000>;
2272 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2273 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2274 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2275 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2276 clocks = <&cpg CPG_MOD 318>;
2277 clock-names = "pcie";
2278 resets = <&cpg 318>;
2279 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2280 status = "disabled";
2281 };
2283 fdp1@fe940000 {
2284 compatible = "renesas,fdp1";
2285 reg = <0 0xfe940000 0 0x2400>;
2286 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2287 clocks = <&cpg CPG_MOD 119>;
2288 power-domains = <&sysc R8A774B1_PD_A3VP>;
2289 resets = <&cpg 119>;
2290 renesas,fcp = <&fcpf0>;
2291 };
2293 fcpf0: fcp@fe950000 {
2294 compatible = "renesas,fcpf";
2295 reg = <0 0xfe950000 0 0x200>;
2296 clocks = <&cpg CPG_MOD 615>;
2297 power-domains = <&sysc R8A774B1_PD_A3VP>;
2298 resets = <&cpg 615>;
2299 };
2301 vspb: vsp@fe960000 {
2302 compatible = "renesas,vsp2";
2303 reg = <0 0xfe960000 0 0x8000>;
2304 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2305 clocks = <&cpg CPG_MOD 626>;
2306 power-domains = <&sysc R8A774B1_PD_A3VP>;
2307 resets = <&cpg 626>;
2309 renesas,fcp = <&fcpvb0>;
2310 };
2312 vspi0: vsp@fe9a0000 {
2313 compatible = "renesas,vsp2";
2314 reg = <0 0xfe9a0000 0 0x8000>;
2315 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2316 clocks = <&cpg CPG_MOD 631>;
2317 power-domains = <&sysc R8A774B1_PD_A3VP>;
2318 resets = <&cpg 631>;
2320 renesas,fcp = <&fcpvi0>;
2321 };
2323 vspd0: vsp@fea20000 {
2324 compatible = "renesas,vsp2";
2325 reg = <0 0xfea20000 0 0x5000>;
2326 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2327 clocks = <&cpg CPG_MOD 623>;
2328 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2329 resets = <&cpg 623>;
2331 renesas,fcp = <&fcpvd0>;
2332 };
2334 vspd1: vsp@fea28000 {
2335 compatible = "renesas,vsp2";
2336 reg = <0 0xfea28000 0 0x5000>;
2337 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2338 clocks = <&cpg CPG_MOD 622>;
2339 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2340 resets = <&cpg 622>;
2342 renesas,fcp = <&fcpvd1>;
2343 };
2345 fcpvb0: fcp@fe96f000 {
2346 compatible = "renesas,fcpv";
2347 reg = <0 0xfe96f000 0 0x200>;
2348 clocks = <&cpg CPG_MOD 607>;
2349 power-domains = <&sysc R8A774B1_PD_A3VP>;
2350 resets = <&cpg 607>;
2351 };
2353 fcpvd0: fcp@fea27000 {
2354 compatible = "renesas,fcpv";
2355 reg = <0 0xfea27000 0 0x200>;
2356 clocks = <&cpg CPG_MOD 603>;
2357 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2358 resets = <&cpg 603>;
2359 };
2361 fcpvd1: fcp@fea2f000 {
2362 compatible = "renesas,fcpv";
2363 reg = <0 0xfea2f000 0 0x200>;
2364 clocks = <&cpg CPG_MOD 602>;
2365 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2366 resets = <&cpg 602>;
2367 };
2369 fcpvi0: fcp@fe9af000 {
2370 compatible = "renesas,fcpv";
2371 reg = <0 0xfe9af000 0 0x200>;
2372 clocks = <&cpg CPG_MOD 611>;
2373 power-domains = <&sysc R8A774B1_PD_A3VP>;
2374 resets = <&cpg 611>;
2375 };
2377 csi20: csi2@fea80000 {
2378 compatible = "renesas,r8a774b1-csi2";
2379 reg = <0 0xfea80000 0 0x10000>;
2380 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2381 clocks = <&cpg CPG_MOD 714>;
2382 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2383 resets = <&cpg 714>;
2384 status = "disabled";
2386 ports {
2387 #address-cells = <1>;
2388 #size-cells = <0>;
2390 port@1 {
2391 #address-cells = <1>;
2392 #size-cells = <0>;
2394 reg = <1>;
2396 csi20vin0: endpoint@0 {
2397 reg = <0>;
2398 remote-endpoint = <&vin0csi20>;
2399 };
2400 csi20vin1: endpoint@1 {
2401 reg = <1>;
2402 remote-endpoint = <&vin1csi20>;
2403 };
2404 csi20vin2: endpoint@2 {
2405 reg = <2>;
2406 remote-endpoint = <&vin2csi20>;
2407 };
2408 csi20vin3: endpoint@3 {
2409 reg = <3>;
2410 remote-endpoint = <&vin3csi20>;
2411 };
2412 csi20vin4: endpoint@4 {
2413 reg = <4>;
2414 remote-endpoint = <&vin4csi20>;
2415 };
2416 csi20vin5: endpoint@5 {
2417 reg = <5>;
2418 remote-endpoint = <&vin5csi20>;
2419 };
2420 csi20vin6: endpoint@6 {
2421 reg = <6>;
2422 remote-endpoint = <&vin6csi20>;
2423 };
2424 csi20vin7: endpoint@7 {
2425 reg = <7>;
2426 remote-endpoint = <&vin7csi20>;
2427 };
2428 };
2429 };
2430 };
2432 csi40: csi2@feaa0000 {
2433 compatible = "renesas,r8a774b1-csi2";
2434 reg = <0 0xfeaa0000 0 0x10000>;
2435 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2436 clocks = <&cpg CPG_MOD 716>;
2437 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2438 resets = <&cpg 716>;
2439 status = "disabled";
2441 ports {
2442 #address-cells = <1>;
2443 #size-cells = <0>;
2445 port@1 {
2446 #address-cells = <1>;
2447 #size-cells = <0>;
2449 reg = <1>;
2451 csi40vin0: endpoint@0 {
2452 reg = <0>;
2453 remote-endpoint = <&vin0csi40>;
2454 };
2455 csi40vin1: endpoint@1 {
2456 reg = <1>;
2457 remote-endpoint = <&vin1csi40>;
2458 };
2459 csi40vin2: endpoint@2 {
2460 reg = <2>;
2461 remote-endpoint = <&vin2csi40>;
2462 };
2463 csi40vin3: endpoint@3 {
2464 reg = <3>;
2465 remote-endpoint = <&vin3csi40>;
2466 };
2467 csi40vin4: endpoint@4 {
2468 reg = <4>;
2469 remote-endpoint = <&vin4csi40>;
2470 };
2471 csi40vin5: endpoint@5 {
2472 reg = <5>;
2473 remote-endpoint = <&vin5csi40>;
2474 };
2475 csi40vin6: endpoint@6 {
2476 reg = <6>;
2477 remote-endpoint = <&vin6csi40>;
2478 };
2479 csi40vin7: endpoint@7 {
2480 reg = <7>;
2481 remote-endpoint = <&vin7csi40>;
2482 };
2483 };
2484 };
2485 };
2487 hdmi0: hdmi@fead0000 {
2488 compatible = "renesas,r8a774b1-hdmi",
2489 "renesas,rcar-gen3-hdmi";
2490 reg = <0 0xfead0000 0 0x10000>;
2491 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2492 clocks = <&cpg CPG_MOD 729>,
2493 <&cpg CPG_CORE R8A774B1_CLK_HDMI>;
2494 clock-names = "iahb", "isfr";
2495 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2496 resets = <&cpg 729>;
2497 status = "disabled";
2499 ports {
2500 #address-cells = <1>;
2501 #size-cells = <0>;
2503 port@0 {
2504 reg = <0>;
2505 dw_hdmi0_in: endpoint {
2506 remote-endpoint = <&du_out_hdmi0>;
2507 };
2508 };
2509 port@1 {
2510 reg = <1>;
2511 };
2512 port@2 {
2513 /* HDMI sound */
2514 reg = <2>;
2515 };
2516 };
2517 };
2519 du: display@feb00000 {
2520 compatible = "renesas,du-r8a774b1";
2521 reg = <0 0xfeb00000 0 0x80000>;
2522 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2523 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2524 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2525 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2526 <&cpg CPG_MOD 721>;
2527 clock-names = "du.0", "du.1", "du.3";
2528 resets = <&cpg 724>, <&cpg 722>;
2529 reset-names = "du.0", "du.3";
2530 status = "disabled";
2532 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2534 ports {
2535 #address-cells = <1>;
2536 #size-cells = <0>;
2538 port@0 {
2539 reg = <0>;
2540 du_out_rgb: endpoint {
2541 };
2542 };
2543 port@1 {
2544 reg = <1>;
2545 du_out_hdmi0: endpoint {
2546 remote-endpoint = <&dw_hdmi0_in>;
2547 };
2548 };
2549 port@2 {
2550 reg = <2>;
2551 du_out_lvds0: endpoint {
2552 remote-endpoint = <&lvds0_in>;
2553 };
2554 };
2555 };
2556 };
2558 lvds0: lvds@feb90000 {
2559 compatible = "renesas,r8a774b1-lvds";
2560 reg = <0 0xfeb90000 0 0x14>;
2561 clocks = <&cpg CPG_MOD 727>;
2562 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2563 resets = <&cpg 727>;
2564 status = "disabled";
2566 ports {
2567 #address-cells = <1>;
2568 #size-cells = <0>;
2570 port@0 {
2571 reg = <0>;
2572 lvds0_in: endpoint {
2573 remote-endpoint = <&du_out_lvds0>;
2574 };
2575 };
2576 port@1 {
2577 reg = <1>;
2578 lvds0_out: endpoint {
2579 };
2580 };
2581 };
2582 };
2584 prr: chipid@fff00044 {
2585 compatible = "renesas,prr";
2586 reg = <0 0xfff00044 0 4>;
2587 };
2588 };
2590 thermal-zones {
2591 sensor_thermal1: sensor-thermal1 {
2592 polling-delay-passive = <250>;
2593 polling-delay = <1000>;
2594 thermal-sensors = <&tsc 0>;
2595 sustainable-power = <2439>;
2597 trips {
2598 sensor1_crit: sensor1-crit {
2599 temperature = <120000>;
2600 hysteresis = <1000>;
2601 type = "critical";
2602 };
2603 };
2604 };
2606 sensor_thermal2: sensor-thermal2 {
2607 polling-delay-passive = <250>;
2608 polling-delay = <1000>;
2609 thermal-sensors = <&tsc 1>;
2610 sustainable-power = <2439>;
2612 trips {
2613 sensor2_crit: sensor2-crit {
2614 temperature = <120000>;
2615 hysteresis = <1000>;
2616 type = "critical";
2617 };
2618 };
2619 };
2621 sensor_thermal3: sensor-thermal3 {
2622 polling-delay-passive = <250>;
2623 polling-delay = <1000>;
2624 thermal-sensors = <&tsc 2>;
2625 sustainable-power = <2439>;
2627 cooling-maps {
2628 map0 {
2629 trip = <&target>;
2630 cooling-device = <&a57_0 0 2>;
2631 contribution = <1024>;
2632 };
2633 };
2634 trips {
2635 target: trip-point1 {
2636 temperature = <100000>;
2637 hysteresis = <1000>;
2638 type = "passive";
2639 };
2641 sensor3_crit: sensor3-crit {
2642 temperature = <120000>;
2643 hysteresis = <1000>;
2644 type = "critical";
2645 };
2646 };
2647 };
2648 };
2650 timer {
2651 compatible = "arm,armv8-timer";
2652 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2653 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2654 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2655 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2656 };
2658 /* External USB clocks - can be overridden by the board */
2659 usb3s0_clk: usb3s0 {
2660 compatible = "fixed-clock";
2661 #clock-cells = <0>;
2662 clock-frequency = <0>;
2663 };
2665 usb_extal_clk: usb_extal {
2666 compatible = "fixed-clock";
2667 #clock-cells = <0>;
2668 clock-frequency = <0>;
2669 };
2670 };