| blob | 9d60bcf69e4f52ce5456d59118a4c693934865c5 |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
4 *
5 * Copyright (C) 2015 Renesas Electronics Corp.
6 */
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
12 #define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
14 / {
15 compatible = "renesas,r8a7795";
16 #address-cells = <2>;
17 #size-cells = <2>;
19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 i2c7 = &i2c_dvfs;
28 };
30 /*
31 * The external audio clocks are configured as 0 Hz fixed frequency
32 * clocks by default.
33 * Boards that provide audio clocks should override them.
34 */
35 audio_clk_a: audio_clk_a {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
39 };
41 audio_clk_b: audio_clk_b {
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <0>;
45 };
47 audio_clk_c: audio_clk_c {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <0>;
51 };
53 /* External CAN clock - to be overridden by boards that provide it */
54 can_clk: can {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
60 cluster0_opp: opp_table0 {
61 compatible = "operating-points-v2";
62 opp-shared;
64 opp-500000000 {
65 opp-hz = /bits/ 64 <500000000>;
66 opp-microvolt = <830000>;
67 clock-latency-ns = <300000>;
68 };
69 opp-1000000000 {
70 opp-hz = /bits/ 64 <1000000000>;
71 opp-microvolt = <830000>;
72 clock-latency-ns = <300000>;
73 };
74 opp-1500000000 {
75 opp-hz = /bits/ 64 <1500000000>;
76 opp-microvolt = <830000>;
77 clock-latency-ns = <300000>;
78 opp-suspend;
79 };
80 opp-1600000000 {
81 opp-hz = /bits/ 64 <1600000000>;
82 opp-microvolt = <900000>;
83 clock-latency-ns = <300000>;
84 turbo-mode;
85 };
86 opp-1700000000 {
87 opp-hz = /bits/ 64 <1700000000>;
88 opp-microvolt = <960000>;
89 clock-latency-ns = <300000>;
90 turbo-mode;
91 };
92 };
94 cluster1_opp: opp_table1 {
95 compatible = "operating-points-v2";
96 opp-shared;
98 opp-800000000 {
99 opp-hz = /bits/ 64 <800000000>;
100 opp-microvolt = <820000>;
101 clock-latency-ns = <300000>;
102 };
103 opp-1000000000 {
104 opp-hz = /bits/ 64 <1000000000>;
105 opp-microvolt = <820000>;
106 clock-latency-ns = <300000>;
107 };
108 opp-1200000000 {
109 opp-hz = /bits/ 64 <1200000000>;
110 opp-microvolt = <820000>;
111 clock-latency-ns = <300000>;
112 };
113 };
115 cpus {
116 #address-cells = <1>;
117 #size-cells = <0>;
119 cpu-map {
120 cluster0 {
121 core0 {
122 cpu = <&a57_0>;
123 };
124 core1 {
125 cpu = <&a57_1>;
126 };
127 core2 {
128 cpu = <&a57_2>;
129 };
130 core3 {
131 cpu = <&a57_3>;
132 };
133 };
135 cluster1 {
136 core0 {
137 cpu = <&a53_0>;
138 };
139 core1 {
140 cpu = <&a53_1>;
141 };
142 core2 {
143 cpu = <&a53_2>;
144 };
145 core3 {
146 cpu = <&a53_3>;
147 };
148 };
149 };
151 a57_0: cpu@0 {
152 compatible = "arm,cortex-a57";
153 reg = <0x0>;
154 device_type = "cpu";
155 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
156 next-level-cache = <&L2_CA57>;
157 enable-method = "psci";
158 cpu-idle-states = <&CPU_SLEEP_0>;
159 dynamic-power-coefficient = <854>;
160 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
161 operating-points-v2 = <&cluster0_opp>;
162 capacity-dmips-mhz = <1024>;
163 #cooling-cells = <2>;
164 };
166 a57_1: cpu@1 {
167 compatible = "arm,cortex-a57";
168 reg = <0x1>;
169 device_type = "cpu";
170 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
171 next-level-cache = <&L2_CA57>;
172 enable-method = "psci";
173 cpu-idle-states = <&CPU_SLEEP_0>;
174 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
175 operating-points-v2 = <&cluster0_opp>;
176 capacity-dmips-mhz = <1024>;
177 #cooling-cells = <2>;
178 };
180 a57_2: cpu@2 {
181 compatible = "arm,cortex-a57";
182 reg = <0x2>;
183 device_type = "cpu";
184 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
185 next-level-cache = <&L2_CA57>;
186 enable-method = "psci";
187 cpu-idle-states = <&CPU_SLEEP_0>;
188 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
189 operating-points-v2 = <&cluster0_opp>;
190 capacity-dmips-mhz = <1024>;
191 #cooling-cells = <2>;
192 };
194 a57_3: cpu@3 {
195 compatible = "arm,cortex-a57";
196 reg = <0x3>;
197 device_type = "cpu";
198 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
199 next-level-cache = <&L2_CA57>;
200 enable-method = "psci";
201 cpu-idle-states = <&CPU_SLEEP_0>;
202 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
203 operating-points-v2 = <&cluster0_opp>;
204 capacity-dmips-mhz = <1024>;
205 #cooling-cells = <2>;
206 };
208 a53_0: cpu@100 {
209 compatible = "arm,cortex-a53";
210 reg = <0x100>;
211 device_type = "cpu";
212 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
213 next-level-cache = <&L2_CA53>;
214 enable-method = "psci";
215 cpu-idle-states = <&CPU_SLEEP_1>;
216 #cooling-cells = <2>;
217 dynamic-power-coefficient = <277>;
218 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
219 operating-points-v2 = <&cluster1_opp>;
220 capacity-dmips-mhz = <535>;
221 };
223 a53_1: cpu@101 {
224 compatible = "arm,cortex-a53";
225 reg = <0x101>;
226 device_type = "cpu";
227 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
228 next-level-cache = <&L2_CA53>;
229 enable-method = "psci";
230 cpu-idle-states = <&CPU_SLEEP_1>;
231 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
232 operating-points-v2 = <&cluster1_opp>;
233 capacity-dmips-mhz = <535>;
234 };
236 a53_2: cpu@102 {
237 compatible = "arm,cortex-a53";
238 reg = <0x102>;
239 device_type = "cpu";
240 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
241 next-level-cache = <&L2_CA53>;
242 enable-method = "psci";
243 cpu-idle-states = <&CPU_SLEEP_1>;
244 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
245 operating-points-v2 = <&cluster1_opp>;
246 capacity-dmips-mhz = <535>;
247 };
249 a53_3: cpu@103 {
250 compatible = "arm,cortex-a53";
251 reg = <0x103>;
252 device_type = "cpu";
253 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
254 next-level-cache = <&L2_CA53>;
255 enable-method = "psci";
256 cpu-idle-states = <&CPU_SLEEP_1>;
257 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
258 operating-points-v2 = <&cluster1_opp>;
259 capacity-dmips-mhz = <535>;
260 };
262 L2_CA57: cache-controller-0 {
263 compatible = "cache";
264 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
265 cache-unified;
266 cache-level = <2>;
267 };
269 L2_CA53: cache-controller-1 {
270 compatible = "cache";
271 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
272 cache-unified;
273 cache-level = <2>;
274 };
276 idle-states {
277 entry-method = "psci";
279 CPU_SLEEP_0: cpu-sleep-0 {
280 compatible = "arm,idle-state";
281 arm,psci-suspend-param = <0x0010000>;
282 local-timer-stop;
283 entry-latency-us = <400>;
284 exit-latency-us = <500>;
285 min-residency-us = <4000>;
286 };
288 CPU_SLEEP_1: cpu-sleep-1 {
289 compatible = "arm,idle-state";
290 arm,psci-suspend-param = <0x0010000>;
291 local-timer-stop;
292 entry-latency-us = <700>;
293 exit-latency-us = <700>;
294 min-residency-us = <5000>;
295 };
296 };
297 };
299 extal_clk: extal {
300 compatible = "fixed-clock";
301 #clock-cells = <0>;
302 /* This value must be overridden by the board */
303 clock-frequency = <0>;
304 };
306 extalr_clk: extalr {
307 compatible = "fixed-clock";
308 #clock-cells = <0>;
309 /* This value must be overridden by the board */
310 clock-frequency = <0>;
311 };
313 /* External PCIe clock - can be overridden by the board */
314 pcie_bus_clk: pcie_bus {
315 compatible = "fixed-clock";
316 #clock-cells = <0>;
317 clock-frequency = <0>;
318 };
320 pmu_a53 {
321 compatible = "arm,cortex-a53-pmu";
322 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
323 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
324 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
325 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
326 interrupt-affinity = <&a53_0>,
327 <&a53_1>,
328 <&a53_2>,
329 <&a53_3>;
330 };
332 pmu_a57 {
333 compatible = "arm,cortex-a57-pmu";
334 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
335 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
336 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
337 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
338 interrupt-affinity = <&a57_0>,
339 <&a57_1>,
340 <&a57_2>,
341 <&a57_3>;
342 };
344 psci {
345 compatible = "arm,psci-1.0", "arm,psci-0.2";
346 method = "smc";
347 };
349 /* External SCIF clock - to be overridden by boards that provide it */
350 scif_clk: scif {
351 compatible = "fixed-clock";
352 #clock-cells = <0>;
353 clock-frequency = <0>;
354 };
356 soc: soc {
357 compatible = "simple-bus";
358 interrupt-parent = <&gic>;
360 #address-cells = <2>;
361 #size-cells = <2>;
362 ranges;
364 rwdt: watchdog@e6020000 {
365 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
366 reg = <0 0xe6020000 0 0x0c>;
367 clocks = <&cpg CPG_MOD 402>;
368 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
369 resets = <&cpg 402>;
370 status = "disabled";
371 };
373 gpio0: gpio@e6050000 {
374 compatible = "renesas,gpio-r8a7795",
375 "renesas,rcar-gen3-gpio";
376 reg = <0 0xe6050000 0 0x50>;
377 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
378 #gpio-cells = <2>;
379 gpio-controller;
380 gpio-ranges = <&pfc 0 0 16>;
381 #interrupt-cells = <2>;
382 interrupt-controller;
383 clocks = <&cpg CPG_MOD 912>;
384 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
385 resets = <&cpg 912>;
386 };
388 gpio1: gpio@e6051000 {
389 compatible = "renesas,gpio-r8a7795",
390 "renesas,rcar-gen3-gpio";
391 reg = <0 0xe6051000 0 0x50>;
392 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
393 #gpio-cells = <2>;
394 gpio-controller;
395 gpio-ranges = <&pfc 0 32 29>;
396 #interrupt-cells = <2>;
397 interrupt-controller;
398 clocks = <&cpg CPG_MOD 911>;
399 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
400 resets = <&cpg 911>;
401 };
403 gpio2: gpio@e6052000 {
404 compatible = "renesas,gpio-r8a7795",
405 "renesas,rcar-gen3-gpio";
406 reg = <0 0xe6052000 0 0x50>;
407 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
408 #gpio-cells = <2>;
409 gpio-controller;
410 gpio-ranges = <&pfc 0 64 15>;
411 #interrupt-cells = <2>;
412 interrupt-controller;
413 clocks = <&cpg CPG_MOD 910>;
414 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
415 resets = <&cpg 910>;
416 };
418 gpio3: gpio@e6053000 {
419 compatible = "renesas,gpio-r8a7795",
420 "renesas,rcar-gen3-gpio";
421 reg = <0 0xe6053000 0 0x50>;
422 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
423 #gpio-cells = <2>;
424 gpio-controller;
425 gpio-ranges = <&pfc 0 96 16>;
426 #interrupt-cells = <2>;
427 interrupt-controller;
428 clocks = <&cpg CPG_MOD 909>;
429 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
430 resets = <&cpg 909>;
431 };
433 gpio4: gpio@e6054000 {
434 compatible = "renesas,gpio-r8a7795",
435 "renesas,rcar-gen3-gpio";
436 reg = <0 0xe6054000 0 0x50>;
437 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
438 #gpio-cells = <2>;
439 gpio-controller;
440 gpio-ranges = <&pfc 0 128 18>;
441 #interrupt-cells = <2>;
442 interrupt-controller;
443 clocks = <&cpg CPG_MOD 908>;
444 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
445 resets = <&cpg 908>;
446 };
448 gpio5: gpio@e6055000 {
449 compatible = "renesas,gpio-r8a7795",
450 "renesas,rcar-gen3-gpio";
451 reg = <0 0xe6055000 0 0x50>;
452 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
453 #gpio-cells = <2>;
454 gpio-controller;
455 gpio-ranges = <&pfc 0 160 26>;
456 #interrupt-cells = <2>;
457 interrupt-controller;
458 clocks = <&cpg CPG_MOD 907>;
459 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
460 resets = <&cpg 907>;
461 };
463 gpio6: gpio@e6055400 {
464 compatible = "renesas,gpio-r8a7795",
465 "renesas,rcar-gen3-gpio";
466 reg = <0 0xe6055400 0 0x50>;
467 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
468 #gpio-cells = <2>;
469 gpio-controller;
470 gpio-ranges = <&pfc 0 192 32>;
471 #interrupt-cells = <2>;
472 interrupt-controller;
473 clocks = <&cpg CPG_MOD 906>;
474 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
475 resets = <&cpg 906>;
476 };
478 gpio7: gpio@e6055800 {
479 compatible = "renesas,gpio-r8a7795",
480 "renesas,rcar-gen3-gpio";
481 reg = <0 0xe6055800 0 0x50>;
482 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
483 #gpio-cells = <2>;
484 gpio-controller;
485 gpio-ranges = <&pfc 0 224 4>;
486 #interrupt-cells = <2>;
487 interrupt-controller;
488 clocks = <&cpg CPG_MOD 905>;
489 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
490 resets = <&cpg 905>;
491 };
493 pfc: pinctrl@e6060000 {
494 compatible = "renesas,pfc-r8a7795";
495 reg = <0 0xe6060000 0 0x50c>;
496 };
498 cmt0: timer@e60f0000 {
499 compatible = "renesas,r8a7795-cmt0",
500 "renesas,rcar-gen3-cmt0";
501 reg = <0 0xe60f0000 0 0x1004>;
502 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
503 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
504 clocks = <&cpg CPG_MOD 303>;
505 clock-names = "fck";
506 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
507 resets = <&cpg 303>;
508 status = "disabled";
509 };
511 cmt1: timer@e6130000 {
512 compatible = "renesas,r8a7795-cmt1",
513 "renesas,rcar-gen3-cmt1";
514 reg = <0 0xe6130000 0 0x1004>;
515 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
516 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
517 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
518 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
519 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
520 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
521 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
522 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
523 clocks = <&cpg CPG_MOD 302>;
524 clock-names = "fck";
525 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
526 resets = <&cpg 302>;
527 status = "disabled";
528 };
530 cmt2: timer@e6140000 {
531 compatible = "renesas,r8a7795-cmt1",
532 "renesas,rcar-gen3-cmt1";
533 reg = <0 0xe6140000 0 0x1004>;
534 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
535 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
536 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 301>;
543 clock-names = "fck";
544 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
545 resets = <&cpg 301>;
546 status = "disabled";
547 };
549 cmt3: timer@e6148000 {
550 compatible = "renesas,r8a7795-cmt1",
551 "renesas,rcar-gen3-cmt1";
552 reg = <0 0xe6148000 0 0x1004>;
553 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
554 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
555 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
556 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
557 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
558 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
559 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
560 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
561 clocks = <&cpg CPG_MOD 300>;
562 clock-names = "fck";
563 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
564 resets = <&cpg 300>;
565 status = "disabled";
566 };
568 cpg: clock-controller@e6150000 {
569 compatible = "renesas,r8a7795-cpg-mssr";
570 reg = <0 0xe6150000 0 0x1000>;
571 clocks = <&extal_clk>, <&extalr_clk>;
572 clock-names = "extal", "extalr";
573 #clock-cells = <2>;
574 #power-domain-cells = <0>;
575 #reset-cells = <1>;
576 };
578 rst: reset-controller@e6160000 {
579 compatible = "renesas,r8a7795-rst";
580 reg = <0 0xe6160000 0 0x0200>;
581 };
583 sysc: system-controller@e6180000 {
584 compatible = "renesas,r8a7795-sysc";
585 reg = <0 0xe6180000 0 0x0400>;
586 #power-domain-cells = <1>;
587 };
589 tsc: thermal@e6198000 {
590 compatible = "renesas,r8a7795-thermal";
591 reg = <0 0xe6198000 0 0x100>,
592 <0 0xe61a0000 0 0x100>,
593 <0 0xe61a8000 0 0x100>;
594 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
595 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
596 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&cpg CPG_MOD 522>;
598 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
599 resets = <&cpg 522>;
600 #thermal-sensor-cells = <1>;
601 };
603 intc_ex: interrupt-controller@e61c0000 {
604 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
605 #interrupt-cells = <2>;
606 interrupt-controller;
607 reg = <0 0xe61c0000 0 0x200>;
608 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
609 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
610 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
611 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
612 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
613 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
614 clocks = <&cpg CPG_MOD 407>;
615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
616 resets = <&cpg 407>;
617 };
619 i2c0: i2c@e6500000 {
620 #address-cells = <1>;
621 #size-cells = <0>;
622 compatible = "renesas,i2c-r8a7795",
623 "renesas,rcar-gen3-i2c";
624 reg = <0 0xe6500000 0 0x40>;
625 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
626 clocks = <&cpg CPG_MOD 931>;
627 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
628 resets = <&cpg 931>;
629 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
630 <&dmac2 0x91>, <&dmac2 0x90>;
631 dma-names = "tx", "rx", "tx", "rx";
632 i2c-scl-internal-delay-ns = <110>;
633 status = "disabled";
634 };
636 i2c1: i2c@e6508000 {
637 #address-cells = <1>;
638 #size-cells = <0>;
639 compatible = "renesas,i2c-r8a7795",
640 "renesas,rcar-gen3-i2c";
641 reg = <0 0xe6508000 0 0x40>;
642 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
643 clocks = <&cpg CPG_MOD 930>;
644 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
645 resets = <&cpg 930>;
646 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
647 <&dmac2 0x93>, <&dmac2 0x92>;
648 dma-names = "tx", "rx", "tx", "rx";
649 i2c-scl-internal-delay-ns = <6>;
650 status = "disabled";
651 };
653 i2c2: i2c@e6510000 {
654 #address-cells = <1>;
655 #size-cells = <0>;
656 compatible = "renesas,i2c-r8a7795",
657 "renesas,rcar-gen3-i2c";
658 reg = <0 0xe6510000 0 0x40>;
659 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
660 clocks = <&cpg CPG_MOD 929>;
661 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
662 resets = <&cpg 929>;
663 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
664 <&dmac2 0x95>, <&dmac2 0x94>;
665 dma-names = "tx", "rx", "tx", "rx";
666 i2c-scl-internal-delay-ns = <6>;
667 status = "disabled";
668 };
670 i2c3: i2c@e66d0000 {
671 #address-cells = <1>;
672 #size-cells = <0>;
673 compatible = "renesas,i2c-r8a7795",
674 "renesas,rcar-gen3-i2c";
675 reg = <0 0xe66d0000 0 0x40>;
676 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
677 clocks = <&cpg CPG_MOD 928>;
678 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
679 resets = <&cpg 928>;
680 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
681 dma-names = "tx", "rx";
682 i2c-scl-internal-delay-ns = <110>;
683 status = "disabled";
684 };
686 i2c4: i2c@e66d8000 {
687 #address-cells = <1>;
688 #size-cells = <0>;
689 compatible = "renesas,i2c-r8a7795",
690 "renesas,rcar-gen3-i2c";
691 reg = <0 0xe66d8000 0 0x40>;
692 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
693 clocks = <&cpg CPG_MOD 927>;
694 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
695 resets = <&cpg 927>;
696 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
697 dma-names = "tx", "rx";
698 i2c-scl-internal-delay-ns = <110>;
699 status = "disabled";
700 };
702 i2c5: i2c@e66e0000 {
703 #address-cells = <1>;
704 #size-cells = <0>;
705 compatible = "renesas,i2c-r8a7795",
706 "renesas,rcar-gen3-i2c";
707 reg = <0 0xe66e0000 0 0x40>;
708 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 919>;
710 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
711 resets = <&cpg 919>;
712 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
713 dma-names = "tx", "rx";
714 i2c-scl-internal-delay-ns = <110>;
715 status = "disabled";
716 };
718 i2c6: i2c@e66e8000 {
719 #address-cells = <1>;
720 #size-cells = <0>;
721 compatible = "renesas,i2c-r8a7795",
722 "renesas,rcar-gen3-i2c";
723 reg = <0 0xe66e8000 0 0x40>;
724 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
725 clocks = <&cpg CPG_MOD 918>;
726 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
727 resets = <&cpg 918>;
728 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
729 dma-names = "tx", "rx";
730 i2c-scl-internal-delay-ns = <6>;
731 status = "disabled";
732 };
734 i2c_dvfs: i2c@e60b0000 {
735 #address-cells = <1>;
736 #size-cells = <0>;
737 compatible = "renesas,iic-r8a7795",
738 "renesas,rcar-gen3-iic",
739 "renesas,rmobile-iic";
740 reg = <0 0xe60b0000 0 0x425>;
741 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 926>;
743 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
744 resets = <&cpg 926>;
745 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
746 dma-names = "tx", "rx";
747 status = "disabled";
748 };
750 hscif0: serial@e6540000 {
751 compatible = "renesas,hscif-r8a7795",
752 "renesas,rcar-gen3-hscif",
753 "renesas,hscif";
754 reg = <0 0xe6540000 0 96>;
755 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
756 clocks = <&cpg CPG_MOD 520>,
757 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
758 <&scif_clk>;
759 clock-names = "fck", "brg_int", "scif_clk";
760 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
761 <&dmac2 0x31>, <&dmac2 0x30>;
762 dma-names = "tx", "rx", "tx", "rx";
763 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
764 resets = <&cpg 520>;
765 status = "disabled";
766 };
768 hscif1: serial@e6550000 {
769 compatible = "renesas,hscif-r8a7795",
770 "renesas,rcar-gen3-hscif",
771 "renesas,hscif";
772 reg = <0 0xe6550000 0 96>;
773 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
774 clocks = <&cpg CPG_MOD 519>,
775 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
776 <&scif_clk>;
777 clock-names = "fck", "brg_int", "scif_clk";
778 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
779 <&dmac2 0x33>, <&dmac2 0x32>;
780 dma-names = "tx", "rx", "tx", "rx";
781 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
782 resets = <&cpg 519>;
783 status = "disabled";
784 };
786 hscif2: serial@e6560000 {
787 compatible = "renesas,hscif-r8a7795",
788 "renesas,rcar-gen3-hscif",
789 "renesas,hscif";
790 reg = <0 0xe6560000 0 96>;
791 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
792 clocks = <&cpg CPG_MOD 518>,
793 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
794 <&scif_clk>;
795 clock-names = "fck", "brg_int", "scif_clk";
796 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
797 <&dmac2 0x35>, <&dmac2 0x34>;
798 dma-names = "tx", "rx", "tx", "rx";
799 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
800 resets = <&cpg 518>;
801 status = "disabled";
802 };
804 hscif3: serial@e66a0000 {
805 compatible = "renesas,hscif-r8a7795",
806 "renesas,rcar-gen3-hscif",
807 "renesas,hscif";
808 reg = <0 0xe66a0000 0 96>;
809 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
810 clocks = <&cpg CPG_MOD 517>,
811 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
812 <&scif_clk>;
813 clock-names = "fck", "brg_int", "scif_clk";
814 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
815 dma-names = "tx", "rx";
816 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
817 resets = <&cpg 517>;
818 status = "disabled";
819 };
821 hscif4: serial@e66b0000 {
822 compatible = "renesas,hscif-r8a7795",
823 "renesas,rcar-gen3-hscif",
824 "renesas,hscif";
825 reg = <0 0xe66b0000 0 96>;
826 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
827 clocks = <&cpg CPG_MOD 516>,
828 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
829 <&scif_clk>;
830 clock-names = "fck", "brg_int", "scif_clk";
831 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
832 dma-names = "tx", "rx";
833 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
834 resets = <&cpg 516>;
835 status = "disabled";
836 };
838 hsusb: usb@e6590000 {
839 compatible = "renesas,usbhs-r8a7795",
840 "renesas,rcar-gen3-usbhs";
841 reg = <0 0xe6590000 0 0x200>;
842 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
843 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
844 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
845 <&usb_dmac1 0>, <&usb_dmac1 1>;
846 dma-names = "ch0", "ch1", "ch2", "ch3";
847 renesas,buswait = <11>;
848 phys = <&usb2_phy0 3>;
849 phy-names = "usb";
850 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
851 resets = <&cpg 704>, <&cpg 703>;
852 status = "disabled";
853 };
855 hsusb3: usb@e659c000 {
856 compatible = "renesas,usbhs-r8a7795",
857 "renesas,rcar-gen3-usbhs";
858 reg = <0 0xe659c000 0 0x200>;
859 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
860 clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
861 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
862 <&usb_dmac3 0>, <&usb_dmac3 1>;
863 dma-names = "ch0", "ch1", "ch2", "ch3";
864 renesas,buswait = <11>;
865 phys = <&usb2_phy3 3>;
866 phy-names = "usb";
867 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
868 resets = <&cpg 705>, <&cpg 700>;
869 status = "disabled";
870 };
872 usb_dmac0: dma-controller@e65a0000 {
873 compatible = "renesas,r8a7795-usb-dmac",
874 "renesas,usb-dmac";
875 reg = <0 0xe65a0000 0 0x100>;
876 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
877 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
878 interrupt-names = "ch0", "ch1";
879 clocks = <&cpg CPG_MOD 330>;
880 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
881 resets = <&cpg 330>;
882 #dma-cells = <1>;
883 dma-channels = <2>;
884 };
886 usb_dmac1: dma-controller@e65b0000 {
887 compatible = "renesas,r8a7795-usb-dmac",
888 "renesas,usb-dmac";
889 reg = <0 0xe65b0000 0 0x100>;
890 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
891 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
892 interrupt-names = "ch0", "ch1";
893 clocks = <&cpg CPG_MOD 331>;
894 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
895 resets = <&cpg 331>;
896 #dma-cells = <1>;
897 dma-channels = <2>;
898 };
900 usb_dmac2: dma-controller@e6460000 {
901 compatible = "renesas,r8a7795-usb-dmac",
902 "renesas,usb-dmac";
903 reg = <0 0xe6460000 0 0x100>;
904 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
905 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
906 interrupt-names = "ch0", "ch1";
907 clocks = <&cpg CPG_MOD 326>;
908 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
909 resets = <&cpg 326>;
910 #dma-cells = <1>;
911 dma-channels = <2>;
912 };
914 usb_dmac3: dma-controller@e6470000 {
915 compatible = "renesas,r8a7795-usb-dmac",
916 "renesas,usb-dmac";
917 reg = <0 0xe6470000 0 0x100>;
918 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
919 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
920 interrupt-names = "ch0", "ch1";
921 clocks = <&cpg CPG_MOD 329>;
922 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
923 resets = <&cpg 329>;
924 #dma-cells = <1>;
925 dma-channels = <2>;
926 };
928 usb3_phy0: usb-phy@e65ee000 {
929 compatible = "renesas,r8a7795-usb3-phy",
930 "renesas,rcar-gen3-usb3-phy";
931 reg = <0 0xe65ee000 0 0x90>;
932 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
933 <&usb_extal_clk>;
934 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
935 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
936 resets = <&cpg 328>;
937 #phy-cells = <0>;
938 status = "disabled";
939 };
941 arm_cc630p: crypto@e6601000 {
942 compatible = "arm,cryptocell-630p-ree";
943 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
944 reg = <0x0 0xe6601000 0 0x1000>;
945 clocks = <&cpg CPG_MOD 229>;
946 resets = <&cpg 229>;
947 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
948 };
950 dmac0: dma-controller@e6700000 {
951 compatible = "renesas,dmac-r8a7795",
952 "renesas,rcar-dmac";
953 reg = <0 0xe6700000 0 0x10000>;
954 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
955 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
956 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
957 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
959 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
960 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
961 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
962 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
963 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
964 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
965 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
966 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
971 interrupt-names = "error",
972 "ch0", "ch1", "ch2", "ch3",
973 "ch4", "ch5", "ch6", "ch7",
974 "ch8", "ch9", "ch10", "ch11",
975 "ch12", "ch13", "ch14", "ch15";
976 clocks = <&cpg CPG_MOD 219>;
977 clock-names = "fck";
978 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
979 resets = <&cpg 219>;
980 #dma-cells = <1>;
981 dma-channels = <16>;
982 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
983 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
984 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
985 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
986 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
987 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
988 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
989 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
990 };
992 dmac1: dma-controller@e7300000 {
993 compatible = "renesas,dmac-r8a7795",
994 "renesas,rcar-dmac";
995 reg = <0 0xe7300000 0 0x10000>;
996 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
997 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
998 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
999 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1000 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1001 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1002 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1003 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1004 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1005 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1006 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1007 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1008 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1009 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1010 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1011 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1012 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1013 interrupt-names = "error",
1014 "ch0", "ch1", "ch2", "ch3",
1015 "ch4", "ch5", "ch6", "ch7",
1016 "ch8", "ch9", "ch10", "ch11",
1017 "ch12", "ch13", "ch14", "ch15";
1018 clocks = <&cpg CPG_MOD 218>;
1019 clock-names = "fck";
1020 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1021 resets = <&cpg 218>;
1022 #dma-cells = <1>;
1023 dma-channels = <16>;
1024 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1025 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1026 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1027 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1028 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1029 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1030 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1031 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1032 };
1034 dmac2: dma-controller@e7310000 {
1035 compatible = "renesas,dmac-r8a7795",
1036 "renesas,rcar-dmac";
1037 reg = <0 0xe7310000 0 0x10000>;
1038 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1040 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1041 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1042 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1043 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1044 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1045 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1046 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1047 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1048 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1049 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1050 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1051 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1052 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1053 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1054 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1055 interrupt-names = "error",
1056 "ch0", "ch1", "ch2", "ch3",
1057 "ch4", "ch5", "ch6", "ch7",
1058 "ch8", "ch9", "ch10", "ch11",
1059 "ch12", "ch13", "ch14", "ch15";
1060 clocks = <&cpg CPG_MOD 217>;
1061 clock-names = "fck";
1062 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1063 resets = <&cpg 217>;
1064 #dma-cells = <1>;
1065 dma-channels = <16>;
1066 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1067 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1068 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1069 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1070 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1071 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1072 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1073 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1074 };
1076 ipmmu_ds0: iommu@e6740000 {
1077 compatible = "renesas,ipmmu-r8a7795";
1078 reg = <0 0xe6740000 0 0x1000>;
1079 renesas,ipmmu-main = <&ipmmu_mm 0>;
1080 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1081 #iommu-cells = <1>;
1082 };
1084 ipmmu_ds1: iommu@e7740000 {
1085 compatible = "renesas,ipmmu-r8a7795";
1086 reg = <0 0xe7740000 0 0x1000>;
1087 renesas,ipmmu-main = <&ipmmu_mm 1>;
1088 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1089 #iommu-cells = <1>;
1090 };
1092 ipmmu_hc: iommu@e6570000 {
1093 compatible = "renesas,ipmmu-r8a7795";
1094 reg = <0 0xe6570000 0 0x1000>;
1095 renesas,ipmmu-main = <&ipmmu_mm 2>;
1096 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1097 #iommu-cells = <1>;
1098 };
1100 ipmmu_ir: iommu@ff8b0000 {
1101 compatible = "renesas,ipmmu-r8a7795";
1102 reg = <0 0xff8b0000 0 0x1000>;
1103 renesas,ipmmu-main = <&ipmmu_mm 3>;
1104 power-domains = <&sysc R8A7795_PD_A3IR>;
1105 #iommu-cells = <1>;
1106 };
1108 ipmmu_mm: iommu@e67b0000 {
1109 compatible = "renesas,ipmmu-r8a7795";
1110 reg = <0 0xe67b0000 0 0x1000>;
1111 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1112 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1113 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1114 #iommu-cells = <1>;
1115 };
1117 ipmmu_mp0: iommu@ec670000 {
1118 compatible = "renesas,ipmmu-r8a7795";
1119 reg = <0 0xec670000 0 0x1000>;
1120 renesas,ipmmu-main = <&ipmmu_mm 4>;
1121 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1122 #iommu-cells = <1>;
1123 };
1125 ipmmu_pv0: iommu@fd800000 {
1126 compatible = "renesas,ipmmu-r8a7795";
1127 reg = <0 0xfd800000 0 0x1000>;
1128 renesas,ipmmu-main = <&ipmmu_mm 6>;
1129 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1130 #iommu-cells = <1>;
1131 };
1133 ipmmu_pv1: iommu@fd950000 {
1134 compatible = "renesas,ipmmu-r8a7795";
1135 reg = <0 0xfd950000 0 0x1000>;
1136 renesas,ipmmu-main = <&ipmmu_mm 7>;
1137 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1138 #iommu-cells = <1>;
1139 };
1141 ipmmu_pv2: iommu@fd960000 {
1142 compatible = "renesas,ipmmu-r8a7795";
1143 reg = <0 0xfd960000 0 0x1000>;
1144 renesas,ipmmu-main = <&ipmmu_mm 8>;
1145 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1146 #iommu-cells = <1>;
1147 };
1149 ipmmu_pv3: iommu@fd970000 {
1150 compatible = "renesas,ipmmu-r8a7795";
1151 reg = <0 0xfd970000 0 0x1000>;
1152 renesas,ipmmu-main = <&ipmmu_mm 9>;
1153 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1154 #iommu-cells = <1>;
1155 };
1157 ipmmu_rt: iommu@ffc80000 {
1158 compatible = "renesas,ipmmu-r8a7795";
1159 reg = <0 0xffc80000 0 0x1000>;
1160 renesas,ipmmu-main = <&ipmmu_mm 10>;
1161 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1162 #iommu-cells = <1>;
1163 };
1165 ipmmu_vc0: iommu@fe6b0000 {
1166 compatible = "renesas,ipmmu-r8a7795";
1167 reg = <0 0xfe6b0000 0 0x1000>;
1168 renesas,ipmmu-main = <&ipmmu_mm 12>;
1169 power-domains = <&sysc R8A7795_PD_A3VC>;
1170 #iommu-cells = <1>;
1171 };
1173 ipmmu_vc1: iommu@fe6f0000 {
1174 compatible = "renesas,ipmmu-r8a7795";
1175 reg = <0 0xfe6f0000 0 0x1000>;
1176 renesas,ipmmu-main = <&ipmmu_mm 13>;
1177 power-domains = <&sysc R8A7795_PD_A3VC>;
1178 #iommu-cells = <1>;
1179 };
1181 ipmmu_vi0: iommu@febd0000 {
1182 compatible = "renesas,ipmmu-r8a7795";
1183 reg = <0 0xfebd0000 0 0x1000>;
1184 renesas,ipmmu-main = <&ipmmu_mm 14>;
1185 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1186 #iommu-cells = <1>;
1187 };
1189 ipmmu_vi1: iommu@febe0000 {
1190 compatible = "renesas,ipmmu-r8a7795";
1191 reg = <0 0xfebe0000 0 0x1000>;
1192 renesas,ipmmu-main = <&ipmmu_mm 15>;
1193 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1194 #iommu-cells = <1>;
1195 };
1197 ipmmu_vp0: iommu@fe990000 {
1198 compatible = "renesas,ipmmu-r8a7795";
1199 reg = <0 0xfe990000 0 0x1000>;
1200 renesas,ipmmu-main = <&ipmmu_mm 16>;
1201 power-domains = <&sysc R8A7795_PD_A3VP>;
1202 #iommu-cells = <1>;
1203 };
1205 ipmmu_vp1: iommu@fe980000 {
1206 compatible = "renesas,ipmmu-r8a7795";
1207 reg = <0 0xfe980000 0 0x1000>;
1208 renesas,ipmmu-main = <&ipmmu_mm 17>;
1209 power-domains = <&sysc R8A7795_PD_A3VP>;
1210 #iommu-cells = <1>;
1211 };
1213 avb: ethernet@e6800000 {
1214 compatible = "renesas,etheravb-r8a7795",
1215 "renesas,etheravb-rcar-gen3";
1216 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1217 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1218 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1219 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1220 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1221 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1222 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1223 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1224 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1225 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1226 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1227 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1228 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1229 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1230 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1231 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1232 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1233 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1234 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1235 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1236 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1237 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1238 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1239 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1240 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1241 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1242 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1243 "ch4", "ch5", "ch6", "ch7",
1244 "ch8", "ch9", "ch10", "ch11",
1245 "ch12", "ch13", "ch14", "ch15",
1246 "ch16", "ch17", "ch18", "ch19",
1247 "ch20", "ch21", "ch22", "ch23",
1248 "ch24";
1249 clocks = <&cpg CPG_MOD 812>;
1250 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1251 resets = <&cpg 812>;
1252 phy-mode = "rgmii";
1253 rx-internal-delay-ps = <0>;
1254 tx-internal-delay-ps = <0>;
1255 iommus = <&ipmmu_ds0 16>;
1256 #address-cells = <1>;
1257 #size-cells = <0>;
1258 status = "disabled";
1259 };
1261 can0: can@e6c30000 {
1262 compatible = "renesas,can-r8a7795",
1263 "renesas,rcar-gen3-can";
1264 reg = <0 0xe6c30000 0 0x1000>;
1265 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1266 clocks = <&cpg CPG_MOD 916>,
1267 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1268 <&can_clk>;
1269 clock-names = "clkp1", "clkp2", "can_clk";
1270 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1271 assigned-clock-rates = <40000000>;
1272 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1273 resets = <&cpg 916>;
1274 status = "disabled";
1275 };
1277 can1: can@e6c38000 {
1278 compatible = "renesas,can-r8a7795",
1279 "renesas,rcar-gen3-can";
1280 reg = <0 0xe6c38000 0 0x1000>;
1281 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1282 clocks = <&cpg CPG_MOD 915>,
1283 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1284 <&can_clk>;
1285 clock-names = "clkp1", "clkp2", "can_clk";
1286 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1287 assigned-clock-rates = <40000000>;
1288 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1289 resets = <&cpg 915>;
1290 status = "disabled";
1291 };
1293 canfd: can@e66c0000 {
1294 compatible = "renesas,r8a7795-canfd",
1295 "renesas,rcar-gen3-canfd";
1296 reg = <0 0xe66c0000 0 0x8000>;
1297 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1298 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1299 clocks = <&cpg CPG_MOD 914>,
1300 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1301 <&can_clk>;
1302 clock-names = "fck", "canfd", "can_clk";
1303 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1304 assigned-clock-rates = <40000000>;
1305 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1306 resets = <&cpg 914>;
1307 status = "disabled";
1309 channel0 {
1310 status = "disabled";
1311 };
1313 channel1 {
1314 status = "disabled";
1315 };
1316 };
1318 pwm0: pwm@e6e30000 {
1319 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1320 reg = <0 0xe6e30000 0 0x8>;
1321 clocks = <&cpg CPG_MOD 523>;
1322 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1323 resets = <&cpg 523>;
1324 #pwm-cells = <2>;
1325 status = "disabled";
1326 };
1328 pwm1: pwm@e6e31000 {
1329 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1330 reg = <0 0xe6e31000 0 0x8>;
1331 clocks = <&cpg CPG_MOD 523>;
1332 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1333 resets = <&cpg 523>;
1334 #pwm-cells = <2>;
1335 status = "disabled";
1336 };
1338 pwm2: pwm@e6e32000 {
1339 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1340 reg = <0 0xe6e32000 0 0x8>;
1341 clocks = <&cpg CPG_MOD 523>;
1342 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1343 resets = <&cpg 523>;
1344 #pwm-cells = <2>;
1345 status = "disabled";
1346 };
1348 pwm3: pwm@e6e33000 {
1349 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1350 reg = <0 0xe6e33000 0 0x8>;
1351 clocks = <&cpg CPG_MOD 523>;
1352 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1353 resets = <&cpg 523>;
1354 #pwm-cells = <2>;
1355 status = "disabled";
1356 };
1358 pwm4: pwm@e6e34000 {
1359 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1360 reg = <0 0xe6e34000 0 0x8>;
1361 clocks = <&cpg CPG_MOD 523>;
1362 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1363 resets = <&cpg 523>;
1364 #pwm-cells = <2>;
1365 status = "disabled";
1366 };
1368 pwm5: pwm@e6e35000 {
1369 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1370 reg = <0 0xe6e35000 0 0x8>;
1371 clocks = <&cpg CPG_MOD 523>;
1372 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1373 resets = <&cpg 523>;
1374 #pwm-cells = <2>;
1375 status = "disabled";
1376 };
1378 pwm6: pwm@e6e36000 {
1379 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1380 reg = <0 0xe6e36000 0 0x8>;
1381 clocks = <&cpg CPG_MOD 523>;
1382 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1383 resets = <&cpg 523>;
1384 #pwm-cells = <2>;
1385 status = "disabled";
1386 };
1388 scif0: serial@e6e60000 {
1389 compatible = "renesas,scif-r8a7795",
1390 "renesas,rcar-gen3-scif", "renesas,scif";
1391 reg = <0 0xe6e60000 0 64>;
1392 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1393 clocks = <&cpg CPG_MOD 207>,
1394 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1395 <&scif_clk>;
1396 clock-names = "fck", "brg_int", "scif_clk";
1397 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1398 <&dmac2 0x51>, <&dmac2 0x50>;
1399 dma-names = "tx", "rx", "tx", "rx";
1400 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1401 resets = <&cpg 207>;
1402 status = "disabled";
1403 };
1405 scif1: serial@e6e68000 {
1406 compatible = "renesas,scif-r8a7795",
1407 "renesas,rcar-gen3-scif", "renesas,scif";
1408 reg = <0 0xe6e68000 0 64>;
1409 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1410 clocks = <&cpg CPG_MOD 206>,
1411 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1412 <&scif_clk>;
1413 clock-names = "fck", "brg_int", "scif_clk";
1414 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1415 <&dmac2 0x53>, <&dmac2 0x52>;
1416 dma-names = "tx", "rx", "tx", "rx";
1417 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1418 resets = <&cpg 206>;
1419 status = "disabled";
1420 };
1422 scif2: serial@e6e88000 {
1423 compatible = "renesas,scif-r8a7795",
1424 "renesas,rcar-gen3-scif", "renesas,scif";
1425 reg = <0 0xe6e88000 0 64>;
1426 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1427 clocks = <&cpg CPG_MOD 310>,
1428 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1429 <&scif_clk>;
1430 clock-names = "fck", "brg_int", "scif_clk";
1431 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1432 <&dmac2 0x13>, <&dmac2 0x12>;
1433 dma-names = "tx", "rx", "tx", "rx";
1434 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1435 resets = <&cpg 310>;
1436 status = "disabled";
1437 };
1439 scif3: serial@e6c50000 {
1440 compatible = "renesas,scif-r8a7795",
1441 "renesas,rcar-gen3-scif", "renesas,scif";
1442 reg = <0 0xe6c50000 0 64>;
1443 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1444 clocks = <&cpg CPG_MOD 204>,
1445 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1446 <&scif_clk>;
1447 clock-names = "fck", "brg_int", "scif_clk";
1448 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1449 dma-names = "tx", "rx";
1450 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1451 resets = <&cpg 204>;
1452 status = "disabled";
1453 };
1455 scif4: serial@e6c40000 {
1456 compatible = "renesas,scif-r8a7795",
1457 "renesas,rcar-gen3-scif", "renesas,scif";
1458 reg = <0 0xe6c40000 0 64>;
1459 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1460 clocks = <&cpg CPG_MOD 203>,
1461 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1462 <&scif_clk>;
1463 clock-names = "fck", "brg_int", "scif_clk";
1464 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1465 dma-names = "tx", "rx";
1466 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1467 resets = <&cpg 203>;
1468 status = "disabled";
1469 };
1471 scif5: serial@e6f30000 {
1472 compatible = "renesas,scif-r8a7795",
1473 "renesas,rcar-gen3-scif", "renesas,scif";
1474 reg = <0 0xe6f30000 0 64>;
1475 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1476 clocks = <&cpg CPG_MOD 202>,
1477 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1478 <&scif_clk>;
1479 clock-names = "fck", "brg_int", "scif_clk";
1480 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1481 <&dmac2 0x5b>, <&dmac2 0x5a>;
1482 dma-names = "tx", "rx", "tx", "rx";
1483 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1484 resets = <&cpg 202>;
1485 status = "disabled";
1486 };
1488 tpu: pwm@e6e80000 {
1489 compatible = "renesas,tpu-r8a7795", "renesas,tpu";
1490 reg = <0 0xe6e80000 0 0x148>;
1491 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1492 clocks = <&cpg CPG_MOD 304>;
1493 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1494 resets = <&cpg 304>;
1495 #pwm-cells = <3>;
1496 status = "disabled";
1497 };
1499 msiof0: spi@e6e90000 {
1500 compatible = "renesas,msiof-r8a7795",
1501 "renesas,rcar-gen3-msiof";
1502 reg = <0 0xe6e90000 0 0x0064>;
1503 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1504 clocks = <&cpg CPG_MOD 211>;
1505 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1506 <&dmac2 0x41>, <&dmac2 0x40>;
1507 dma-names = "tx", "rx", "tx", "rx";
1508 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1509 resets = <&cpg 211>;
1510 #address-cells = <1>;
1511 #size-cells = <0>;
1512 status = "disabled";
1513 };
1515 msiof1: spi@e6ea0000 {
1516 compatible = "renesas,msiof-r8a7795",
1517 "renesas,rcar-gen3-msiof";
1518 reg = <0 0xe6ea0000 0 0x0064>;
1519 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1520 clocks = <&cpg CPG_MOD 210>;
1521 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1522 <&dmac2 0x43>, <&dmac2 0x42>;
1523 dma-names = "tx", "rx", "tx", "rx";
1524 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1525 resets = <&cpg 210>;
1526 #address-cells = <1>;
1527 #size-cells = <0>;
1528 status = "disabled";
1529 };
1531 msiof2: spi@e6c00000 {
1532 compatible = "renesas,msiof-r8a7795",
1533 "renesas,rcar-gen3-msiof";
1534 reg = <0 0xe6c00000 0 0x0064>;
1535 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1536 clocks = <&cpg CPG_MOD 209>;
1537 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1538 dma-names = "tx", "rx";
1539 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1540 resets = <&cpg 209>;
1541 #address-cells = <1>;
1542 #size-cells = <0>;
1543 status = "disabled";
1544 };
1546 msiof3: spi@e6c10000 {
1547 compatible = "renesas,msiof-r8a7795",
1548 "renesas,rcar-gen3-msiof";
1549 reg = <0 0xe6c10000 0 0x0064>;
1550 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1551 clocks = <&cpg CPG_MOD 208>;
1552 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1553 dma-names = "tx", "rx";
1554 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1555 resets = <&cpg 208>;
1556 #address-cells = <1>;
1557 #size-cells = <0>;
1558 status = "disabled";
1559 };
1561 vin0: video@e6ef0000 {
1562 compatible = "renesas,vin-r8a7795";
1563 reg = <0 0xe6ef0000 0 0x1000>;
1564 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1565 clocks = <&cpg CPG_MOD 811>;
1566 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1567 resets = <&cpg 811>;
1568 renesas,id = <0>;
1569 status = "disabled";
1571 ports {
1572 #address-cells = <1>;
1573 #size-cells = <0>;
1575 port@1 {
1576 #address-cells = <1>;
1577 #size-cells = <0>;
1579 reg = <1>;
1581 vin0csi20: endpoint@0 {
1582 reg = <0>;
1583 remote-endpoint = <&csi20vin0>;
1584 };
1585 vin0csi40: endpoint@2 {
1586 reg = <2>;
1587 remote-endpoint = <&csi40vin0>;
1588 };
1589 };
1590 };
1591 };
1593 vin1: video@e6ef1000 {
1594 compatible = "renesas,vin-r8a7795";
1595 reg = <0 0xe6ef1000 0 0x1000>;
1596 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1597 clocks = <&cpg CPG_MOD 810>;
1598 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1599 resets = <&cpg 810>;
1600 renesas,id = <1>;
1601 status = "disabled";
1603 ports {
1604 #address-cells = <1>;
1605 #size-cells = <0>;
1607 port@1 {
1608 #address-cells = <1>;
1609 #size-cells = <0>;
1611 reg = <1>;
1613 vin1csi20: endpoint@0 {
1614 reg = <0>;
1615 remote-endpoint = <&csi20vin1>;
1616 };
1617 vin1csi40: endpoint@2 {
1618 reg = <2>;
1619 remote-endpoint = <&csi40vin1>;
1620 };
1621 };
1622 };
1623 };
1625 vin2: video@e6ef2000 {
1626 compatible = "renesas,vin-r8a7795";
1627 reg = <0 0xe6ef2000 0 0x1000>;
1628 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1629 clocks = <&cpg CPG_MOD 809>;
1630 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1631 resets = <&cpg 809>;
1632 renesas,id = <2>;
1633 status = "disabled";
1635 ports {
1636 #address-cells = <1>;
1637 #size-cells = <0>;
1639 port@1 {
1640 #address-cells = <1>;
1641 #size-cells = <0>;
1643 reg = <1>;
1645 vin2csi20: endpoint@0 {
1646 reg = <0>;
1647 remote-endpoint = <&csi20vin2>;
1648 };
1649 vin2csi40: endpoint@2 {
1650 reg = <2>;
1651 remote-endpoint = <&csi40vin2>;
1652 };
1653 };
1654 };
1655 };
1657 vin3: video@e6ef3000 {
1658 compatible = "renesas,vin-r8a7795";
1659 reg = <0 0xe6ef3000 0 0x1000>;
1660 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1661 clocks = <&cpg CPG_MOD 808>;
1662 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1663 resets = <&cpg 808>;
1664 renesas,id = <3>;
1665 status = "disabled";
1667 ports {
1668 #address-cells = <1>;
1669 #size-cells = <0>;
1671 port@1 {
1672 #address-cells = <1>;
1673 #size-cells = <0>;
1675 reg = <1>;
1677 vin3csi20: endpoint@0 {
1678 reg = <0>;
1679 remote-endpoint = <&csi20vin3>;
1680 };
1681 vin3csi40: endpoint@2 {
1682 reg = <2>;
1683 remote-endpoint = <&csi40vin3>;
1684 };
1685 };
1686 };
1687 };
1689 vin4: video@e6ef4000 {
1690 compatible = "renesas,vin-r8a7795";
1691 reg = <0 0xe6ef4000 0 0x1000>;
1692 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1693 clocks = <&cpg CPG_MOD 807>;
1694 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1695 resets = <&cpg 807>;
1696 renesas,id = <4>;
1697 status = "disabled";
1699 ports {
1700 #address-cells = <1>;
1701 #size-cells = <0>;
1703 port@1 {
1704 #address-cells = <1>;
1705 #size-cells = <0>;
1707 reg = <1>;
1709 vin4csi20: endpoint@0 {
1710 reg = <0>;
1711 remote-endpoint = <&csi20vin4>;
1712 };
1713 vin4csi41: endpoint@3 {
1714 reg = <3>;
1715 remote-endpoint = <&csi41vin4>;
1716 };
1717 };
1718 };
1719 };
1721 vin5: video@e6ef5000 {
1722 compatible = "renesas,vin-r8a7795";
1723 reg = <0 0xe6ef5000 0 0x1000>;
1724 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1725 clocks = <&cpg CPG_MOD 806>;
1726 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1727 resets = <&cpg 806>;
1728 renesas,id = <5>;
1729 status = "disabled";
1731 ports {
1732 #address-cells = <1>;
1733 #size-cells = <0>;
1735 port@1 {
1736 #address-cells = <1>;
1737 #size-cells = <0>;
1739 reg = <1>;
1741 vin5csi20: endpoint@0 {
1742 reg = <0>;
1743 remote-endpoint = <&csi20vin5>;
1744 };
1745 vin5csi41: endpoint@3 {
1746 reg = <3>;
1747 remote-endpoint = <&csi41vin5>;
1748 };
1749 };
1750 };
1751 };
1753 vin6: video@e6ef6000 {
1754 compatible = "renesas,vin-r8a7795";
1755 reg = <0 0xe6ef6000 0 0x1000>;
1756 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1757 clocks = <&cpg CPG_MOD 805>;
1758 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1759 resets = <&cpg 805>;
1760 renesas,id = <6>;
1761 status = "disabled";
1763 ports {
1764 #address-cells = <1>;
1765 #size-cells = <0>;
1767 port@1 {
1768 #address-cells = <1>;
1769 #size-cells = <0>;
1771 reg = <1>;
1773 vin6csi20: endpoint@0 {
1774 reg = <0>;
1775 remote-endpoint = <&csi20vin6>;
1776 };
1777 vin6csi41: endpoint@3 {
1778 reg = <3>;
1779 remote-endpoint = <&csi41vin6>;
1780 };
1781 };
1782 };
1783 };
1785 vin7: video@e6ef7000 {
1786 compatible = "renesas,vin-r8a7795";
1787 reg = <0 0xe6ef7000 0 0x1000>;
1788 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1789 clocks = <&cpg CPG_MOD 804>;
1790 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1791 resets = <&cpg 804>;
1792 renesas,id = <7>;
1793 status = "disabled";
1795 ports {
1796 #address-cells = <1>;
1797 #size-cells = <0>;
1799 port@1 {
1800 #address-cells = <1>;
1801 #size-cells = <0>;
1803 reg = <1>;
1805 vin7csi20: endpoint@0 {
1806 reg = <0>;
1807 remote-endpoint = <&csi20vin7>;
1808 };
1809 vin7csi41: endpoint@3 {
1810 reg = <3>;
1811 remote-endpoint = <&csi41vin7>;
1812 };
1813 };
1814 };
1815 };
1817 drif00: rif@e6f40000 {
1818 compatible = "renesas,r8a7795-drif",
1819 "renesas,rcar-gen3-drif";
1820 reg = <0 0xe6f40000 0 0x64>;
1821 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1822 clocks = <&cpg CPG_MOD 515>;
1823 clock-names = "fck";
1824 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1825 dma-names = "rx", "rx";
1826 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1827 resets = <&cpg 515>;
1828 renesas,bonding = <&drif01>;
1829 status = "disabled";
1830 };
1832 drif01: rif@e6f50000 {
1833 compatible = "renesas,r8a7795-drif",
1834 "renesas,rcar-gen3-drif";
1835 reg = <0 0xe6f50000 0 0x64>;
1836 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1837 clocks = <&cpg CPG_MOD 514>;
1838 clock-names = "fck";
1839 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1840 dma-names = "rx", "rx";
1841 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1842 resets = <&cpg 514>;
1843 renesas,bonding = <&drif00>;
1844 status = "disabled";
1845 };
1847 drif10: rif@e6f60000 {
1848 compatible = "renesas,r8a7795-drif",
1849 "renesas,rcar-gen3-drif";
1850 reg = <0 0xe6f60000 0 0x64>;
1851 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1852 clocks = <&cpg CPG_MOD 513>;
1853 clock-names = "fck";
1854 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1855 dma-names = "rx", "rx";
1856 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1857 resets = <&cpg 513>;
1858 renesas,bonding = <&drif11>;
1859 status = "disabled";
1860 };
1862 drif11: rif@e6f70000 {
1863 compatible = "renesas,r8a7795-drif",
1864 "renesas,rcar-gen3-drif";
1865 reg = <0 0xe6f70000 0 0x64>;
1866 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1867 clocks = <&cpg CPG_MOD 512>;
1868 clock-names = "fck";
1869 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1870 dma-names = "rx", "rx";
1871 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1872 resets = <&cpg 512>;
1873 renesas,bonding = <&drif10>;
1874 status = "disabled";
1875 };
1877 drif20: rif@e6f80000 {
1878 compatible = "renesas,r8a7795-drif",
1879 "renesas,rcar-gen3-drif";
1880 reg = <0 0xe6f80000 0 0x64>;
1881 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1882 clocks = <&cpg CPG_MOD 511>;
1883 clock-names = "fck";
1884 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1885 dma-names = "rx", "rx";
1886 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1887 resets = <&cpg 511>;
1888 renesas,bonding = <&drif21>;
1889 status = "disabled";
1890 };
1892 drif21: rif@e6f90000 {
1893 compatible = "renesas,r8a7795-drif",
1894 "renesas,rcar-gen3-drif";
1895 reg = <0 0xe6f90000 0 0x64>;
1896 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1897 clocks = <&cpg CPG_MOD 510>;
1898 clock-names = "fck";
1899 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1900 dma-names = "rx", "rx";
1901 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1902 resets = <&cpg 510>;
1903 renesas,bonding = <&drif20>;
1904 status = "disabled";
1905 };
1907 drif30: rif@e6fa0000 {
1908 compatible = "renesas,r8a7795-drif",
1909 "renesas,rcar-gen3-drif";
1910 reg = <0 0xe6fa0000 0 0x64>;
1911 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1912 clocks = <&cpg CPG_MOD 509>;
1913 clock-names = "fck";
1914 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1915 dma-names = "rx", "rx";
1916 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1917 resets = <&cpg 509>;
1918 renesas,bonding = <&drif31>;
1919 status = "disabled";
1920 };
1922 drif31: rif@e6fb0000 {
1923 compatible = "renesas,r8a7795-drif",
1924 "renesas,rcar-gen3-drif";
1925 reg = <0 0xe6fb0000 0 0x64>;
1926 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1927 clocks = <&cpg CPG_MOD 508>;
1928 clock-names = "fck";
1929 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1930 dma-names = "rx", "rx";
1931 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1932 resets = <&cpg 508>;
1933 renesas,bonding = <&drif30>;
1934 status = "disabled";
1935 };
1937 rcar_sound: sound@ec500000 {
1938 /*
1939 * #sound-dai-cells is required
1940 *
1941 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1942 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1943 */
1944 /*
1945 * #clock-cells is required for audio_clkout0/1/2/3
1946 *
1947 * clkout : #clock-cells = <0>; <&rcar_sound>;
1948 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1949 */
1950 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1951 reg = <0 0xec500000 0 0x1000>, /* SCU */
1952 <0 0xec5a0000 0 0x100>, /* ADG */
1953 <0 0xec540000 0 0x1000>, /* SSIU */
1954 <0 0xec541000 0 0x280>, /* SSI */
1955 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1956 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1958 clocks = <&cpg CPG_MOD 1005>,
1959 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1960 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1961 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1962 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1963 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1964 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1965 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1966 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1967 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1968 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1969 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1970 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1971 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1972 <&audio_clk_a>, <&audio_clk_b>,
1973 <&audio_clk_c>,
1974 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1975 clock-names = "ssi-all",
1976 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1977 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1978 "ssi.1", "ssi.0",
1979 "src.9", "src.8", "src.7", "src.6",
1980 "src.5", "src.4", "src.3", "src.2",
1981 "src.1", "src.0",
1982 "mix.1", "mix.0",
1983 "ctu.1", "ctu.0",
1984 "dvc.0", "dvc.1",
1985 "clk_a", "clk_b", "clk_c", "clk_i";
1986 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1987 resets = <&cpg 1005>,
1988 <&cpg 1006>, <&cpg 1007>,
1989 <&cpg 1008>, <&cpg 1009>,
1990 <&cpg 1010>, <&cpg 1011>,
1991 <&cpg 1012>, <&cpg 1013>,
1992 <&cpg 1014>, <&cpg 1015>;
1993 reset-names = "ssi-all",
1994 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1995 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1996 "ssi.1", "ssi.0";
1997 status = "disabled";
1999 rcar_sound,dvc {
2000 dvc0: dvc-0 {
2001 dmas = <&audma1 0xbc>;
2002 dma-names = "tx";
2003 };
2004 dvc1: dvc-1 {
2005 dmas = <&audma1 0xbe>;
2006 dma-names = "tx";
2007 };
2008 };
2010 rcar_sound,mix {
2011 mix0: mix-0 { };
2012 mix1: mix-1 { };
2013 };
2015 rcar_sound,ctu {
2016 ctu00: ctu-0 { };
2017 ctu01: ctu-1 { };
2018 ctu02: ctu-2 { };
2019 ctu03: ctu-3 { };
2020 ctu10: ctu-4 { };
2021 ctu11: ctu-5 { };
2022 ctu12: ctu-6 { };
2023 ctu13: ctu-7 { };
2024 };
2026 rcar_sound,src {
2027 src0: src-0 {
2028 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
2029 dmas = <&audma0 0x85>, <&audma1 0x9a>;
2030 dma-names = "rx", "tx";
2031 };
2032 src1: src-1 {
2033 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
2034 dmas = <&audma0 0x87>, <&audma1 0x9c>;
2035 dma-names = "rx", "tx";
2036 };
2037 src2: src-2 {
2038 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
2039 dmas = <&audma0 0x89>, <&audma1 0x9e>;
2040 dma-names = "rx", "tx";
2041 };
2042 src3: src-3 {
2043 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
2044 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2045 dma-names = "rx", "tx";
2046 };
2047 src4: src-4 {
2048 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
2049 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2050 dma-names = "rx", "tx";
2051 };
2052 src5: src-5 {
2053 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
2054 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2055 dma-names = "rx", "tx";
2056 };
2057 src6: src-6 {
2058 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
2059 dmas = <&audma0 0x91>, <&audma1 0xb4>;
2060 dma-names = "rx", "tx";
2061 };
2062 src7: src-7 {
2063 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
2064 dmas = <&audma0 0x93>, <&audma1 0xb6>;
2065 dma-names = "rx", "tx";
2066 };
2067 src8: src-8 {
2068 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2069 dmas = <&audma0 0x95>, <&audma1 0xb8>;
2070 dma-names = "rx", "tx";
2071 };
2072 src9: src-9 {
2073 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2074 dmas = <&audma0 0x97>, <&audma1 0xba>;
2075 dma-names = "rx", "tx";
2076 };
2077 };
2079 rcar_sound,ssiu {
2080 ssiu00: ssiu-0 {
2081 dmas = <&audma0 0x15>, <&audma1 0x16>;
2082 dma-names = "rx", "tx";
2083 };
2084 ssiu01: ssiu-1 {
2085 dmas = <&audma0 0x35>, <&audma1 0x36>;
2086 dma-names = "rx", "tx";
2087 };
2088 ssiu02: ssiu-2 {
2089 dmas = <&audma0 0x37>, <&audma1 0x38>;
2090 dma-names = "rx", "tx";
2091 };
2092 ssiu03: ssiu-3 {
2093 dmas = <&audma0 0x47>, <&audma1 0x48>;
2094 dma-names = "rx", "tx";
2095 };
2096 ssiu04: ssiu-4 {
2097 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2098 dma-names = "rx", "tx";
2099 };
2100 ssiu05: ssiu-5 {
2101 dmas = <&audma0 0x43>, <&audma1 0x44>;
2102 dma-names = "rx", "tx";
2103 };
2104 ssiu06: ssiu-6 {
2105 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2106 dma-names = "rx", "tx";
2107 };
2108 ssiu07: ssiu-7 {
2109 dmas = <&audma0 0x53>, <&audma1 0x54>;
2110 dma-names = "rx", "tx";
2111 };
2112 ssiu10: ssiu-8 {
2113 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2114 dma-names = "rx", "tx";
2115 };
2116 ssiu11: ssiu-9 {
2117 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2118 dma-names = "rx", "tx";
2119 };
2120 ssiu12: ssiu-10 {
2121 dmas = <&audma0 0x57>, <&audma1 0x58>;
2122 dma-names = "rx", "tx";
2123 };
2124 ssiu13: ssiu-11 {
2125 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2126 dma-names = "rx", "tx";
2127 };
2128 ssiu14: ssiu-12 {
2129 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2130 dma-names = "rx", "tx";
2131 };
2132 ssiu15: ssiu-13 {
2133 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2134 dma-names = "rx", "tx";
2135 };
2136 ssiu16: ssiu-14 {
2137 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2138 dma-names = "rx", "tx";
2139 };
2140 ssiu17: ssiu-15 {
2141 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2142 dma-names = "rx", "tx";
2143 };
2144 ssiu20: ssiu-16 {
2145 dmas = <&audma0 0x63>, <&audma1 0x64>;
2146 dma-names = "rx", "tx";
2147 };
2148 ssiu21: ssiu-17 {
2149 dmas = <&audma0 0x67>, <&audma1 0x68>;
2150 dma-names = "rx", "tx";
2151 };
2152 ssiu22: ssiu-18 {
2153 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2154 dma-names = "rx", "tx";
2155 };
2156 ssiu23: ssiu-19 {
2157 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2158 dma-names = "rx", "tx";
2159 };
2160 ssiu24: ssiu-20 {
2161 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2162 dma-names = "rx", "tx";
2163 };
2164 ssiu25: ssiu-21 {
2165 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2166 dma-names = "rx", "tx";
2167 };
2168 ssiu26: ssiu-22 {
2169 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2170 dma-names = "rx", "tx";
2171 };
2172 ssiu27: ssiu-23 {
2173 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2174 dma-names = "rx", "tx";
2175 };
2176 ssiu30: ssiu-24 {
2177 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2178 dma-names = "rx", "tx";
2179 };
2180 ssiu31: ssiu-25 {
2181 dmas = <&audma0 0x21>, <&audma1 0x22>;
2182 dma-names = "rx", "tx";
2183 };
2184 ssiu32: ssiu-26 {
2185 dmas = <&audma0 0x23>, <&audma1 0x24>;
2186 dma-names = "rx", "tx";
2187 };
2188 ssiu33: ssiu-27 {
2189 dmas = <&audma0 0x25>, <&audma1 0x26>;
2190 dma-names = "rx", "tx";
2191 };
2192 ssiu34: ssiu-28 {
2193 dmas = <&audma0 0x27>, <&audma1 0x28>;
2194 dma-names = "rx", "tx";
2195 };
2196 ssiu35: ssiu-29 {
2197 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2198 dma-names = "rx", "tx";
2199 };
2200 ssiu36: ssiu-30 {
2201 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2202 dma-names = "rx", "tx";
2203 };
2204 ssiu37: ssiu-31 {
2205 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2206 dma-names = "rx", "tx";
2207 };
2208 ssiu40: ssiu-32 {
2209 dmas = <&audma0 0x71>, <&audma1 0x72>;
2210 dma-names = "rx", "tx";
2211 };
2212 ssiu41: ssiu-33 {
2213 dmas = <&audma0 0x17>, <&audma1 0x18>;
2214 dma-names = "rx", "tx";
2215 };
2216 ssiu42: ssiu-34 {
2217 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2218 dma-names = "rx", "tx";
2219 };
2220 ssiu43: ssiu-35 {
2221 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2222 dma-names = "rx", "tx";
2223 };
2224 ssiu44: ssiu-36 {
2225 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2226 dma-names = "rx", "tx";
2227 };
2228 ssiu45: ssiu-37 {
2229 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2230 dma-names = "rx", "tx";
2231 };
2232 ssiu46: ssiu-38 {
2233 dmas = <&audma0 0x31>, <&audma1 0x32>;
2234 dma-names = "rx", "tx";
2235 };
2236 ssiu47: ssiu-39 {
2237 dmas = <&audma0 0x33>, <&audma1 0x34>;
2238 dma-names = "rx", "tx";
2239 };
2240 ssiu50: ssiu-40 {
2241 dmas = <&audma0 0x73>, <&audma1 0x74>;
2242 dma-names = "rx", "tx";
2243 };
2244 ssiu60: ssiu-41 {
2245 dmas = <&audma0 0x75>, <&audma1 0x76>;
2246 dma-names = "rx", "tx";
2247 };
2248 ssiu70: ssiu-42 {
2249 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2250 dma-names = "rx", "tx";
2251 };
2252 ssiu80: ssiu-43 {
2253 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2254 dma-names = "rx", "tx";
2255 };
2256 ssiu90: ssiu-44 {
2257 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2258 dma-names = "rx", "tx";
2259 };
2260 ssiu91: ssiu-45 {
2261 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2262 dma-names = "rx", "tx";
2263 };
2264 ssiu92: ssiu-46 {
2265 dmas = <&audma0 0x81>, <&audma1 0x82>;
2266 dma-names = "rx", "tx";
2267 };
2268 ssiu93: ssiu-47 {
2269 dmas = <&audma0 0x83>, <&audma1 0x84>;
2270 dma-names = "rx", "tx";
2271 };
2272 ssiu94: ssiu-48 {
2273 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2274 dma-names = "rx", "tx";
2275 };
2276 ssiu95: ssiu-49 {
2277 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2278 dma-names = "rx", "tx";
2279 };
2280 ssiu96: ssiu-50 {
2281 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2282 dma-names = "rx", "tx";
2283 };
2284 ssiu97: ssiu-51 {
2285 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2286 dma-names = "rx", "tx";
2287 };
2288 };
2290 rcar_sound,ssi {
2291 ssi0: ssi-0 {
2292 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2293 dmas = <&audma0 0x01>, <&audma1 0x02>;
2294 dma-names = "rx", "tx";
2295 };
2296 ssi1: ssi-1 {
2297 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2298 dmas = <&audma0 0x03>, <&audma1 0x04>;
2299 dma-names = "rx", "tx";
2300 };
2301 ssi2: ssi-2 {
2302 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2303 dmas = <&audma0 0x05>, <&audma1 0x06>;
2304 dma-names = "rx", "tx";
2305 };
2306 ssi3: ssi-3 {
2307 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2308 dmas = <&audma0 0x07>, <&audma1 0x08>;
2309 dma-names = "rx", "tx";
2310 };
2311 ssi4: ssi-4 {
2312 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2313 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2314 dma-names = "rx", "tx";
2315 };
2316 ssi5: ssi-5 {
2317 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2318 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2319 dma-names = "rx", "tx";
2320 };
2321 ssi6: ssi-6 {
2322 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2323 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2324 dma-names = "rx", "tx";
2325 };
2326 ssi7: ssi-7 {
2327 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2328 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2329 dma-names = "rx", "tx";
2330 };
2331 ssi8: ssi-8 {
2332 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2333 dmas = <&audma0 0x11>, <&audma1 0x12>;
2334 dma-names = "rx", "tx";
2335 };
2336 ssi9: ssi-9 {
2337 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2338 dmas = <&audma0 0x13>, <&audma1 0x14>;
2339 dma-names = "rx", "tx";
2340 };
2341 };
2342 };
2344 audma0: dma-controller@ec700000 {
2345 compatible = "renesas,dmac-r8a7795",
2346 "renesas,rcar-dmac";
2347 reg = <0 0xec700000 0 0x10000>;
2348 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2349 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2350 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2351 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2352 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2353 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2354 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2355 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2356 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2357 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2358 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2359 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2360 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2361 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2362 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2363 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2364 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2365 interrupt-names = "error",
2366 "ch0", "ch1", "ch2", "ch3",
2367 "ch4", "ch5", "ch6", "ch7",
2368 "ch8", "ch9", "ch10", "ch11",
2369 "ch12", "ch13", "ch14", "ch15";
2370 clocks = <&cpg CPG_MOD 502>;
2371 clock-names = "fck";
2372 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2373 resets = <&cpg 502>;
2374 #dma-cells = <1>;
2375 dma-channels = <16>;
2376 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2377 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2378 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2379 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2380 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2381 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2382 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2383 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2384 };
2386 audma1: dma-controller@ec720000 {
2387 compatible = "renesas,dmac-r8a7795",
2388 "renesas,rcar-dmac";
2389 reg = <0 0xec720000 0 0x10000>;
2390 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2391 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2392 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2393 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2394 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2395 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2396 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2397 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2398 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2399 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2400 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2401 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2402 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2403 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2404 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2405 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2406 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2407 interrupt-names = "error",
2408 "ch0", "ch1", "ch2", "ch3",
2409 "ch4", "ch5", "ch6", "ch7",
2410 "ch8", "ch9", "ch10", "ch11",
2411 "ch12", "ch13", "ch14", "ch15";
2412 clocks = <&cpg CPG_MOD 501>;
2413 clock-names = "fck";
2414 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2415 resets = <&cpg 501>;
2416 #dma-cells = <1>;
2417 dma-channels = <16>;
2418 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2419 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2420 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2421 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2422 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2423 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2424 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2425 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2426 };
2428 xhci0: usb@ee000000 {
2429 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
2430 reg = <0 0xee000000 0 0xc00>;
2431 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2432 clocks = <&cpg CPG_MOD 328>;
2433 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2434 resets = <&cpg 328>;
2435 status = "disabled";
2436 };
2438 usb3_peri0: usb@ee020000 {
2439 compatible = "renesas,r8a7795-usb3-peri",
2440 "renesas,rcar-gen3-usb3-peri";
2441 reg = <0 0xee020000 0 0x400>;
2442 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2443 clocks = <&cpg CPG_MOD 328>;
2444 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2445 resets = <&cpg 328>;
2446 status = "disabled";
2447 };
2449 ohci0: usb@ee080000 {
2450 compatible = "generic-ohci";
2451 reg = <0 0xee080000 0 0x100>;
2452 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2453 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2454 phys = <&usb2_phy0 1>;
2455 phy-names = "usb";
2456 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2457 resets = <&cpg 703>, <&cpg 704>;
2458 status = "disabled";
2459 };
2461 ohci1: usb@ee0a0000 {
2462 compatible = "generic-ohci";
2463 reg = <0 0xee0a0000 0 0x100>;
2464 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2465 clocks = <&cpg CPG_MOD 702>;
2466 phys = <&usb2_phy1 1>;
2467 phy-names = "usb";
2468 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2469 resets = <&cpg 702>;
2470 status = "disabled";
2471 };
2473 ohci2: usb@ee0c0000 {
2474 compatible = "generic-ohci";
2475 reg = <0 0xee0c0000 0 0x100>;
2476 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2477 clocks = <&cpg CPG_MOD 701>;
2478 phys = <&usb2_phy2 1>;
2479 phy-names = "usb";
2480 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2481 resets = <&cpg 701>;
2482 status = "disabled";
2483 };
2485 ohci3: usb@ee0e0000 {
2486 compatible = "generic-ohci";
2487 reg = <0 0xee0e0000 0 0x100>;
2488 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2489 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2490 phys = <&usb2_phy3 1>;
2491 phy-names = "usb";
2492 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2493 resets = <&cpg 700>, <&cpg 705>;
2494 status = "disabled";
2495 };
2497 ehci0: usb@ee080100 {
2498 compatible = "generic-ehci";
2499 reg = <0 0xee080100 0 0x100>;
2500 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2501 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2502 phys = <&usb2_phy0 2>;
2503 phy-names = "usb";
2504 companion = <&ohci0>;
2505 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2506 resets = <&cpg 703>, <&cpg 704>;
2507 status = "disabled";
2508 };
2510 ehci1: usb@ee0a0100 {
2511 compatible = "generic-ehci";
2512 reg = <0 0xee0a0100 0 0x100>;
2513 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2514 clocks = <&cpg CPG_MOD 702>;
2515 phys = <&usb2_phy1 2>;
2516 phy-names = "usb";
2517 companion = <&ohci1>;
2518 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2519 resets = <&cpg 702>;
2520 status = "disabled";
2521 };
2523 ehci2: usb@ee0c0100 {
2524 compatible = "generic-ehci";
2525 reg = <0 0xee0c0100 0 0x100>;
2526 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2527 clocks = <&cpg CPG_MOD 701>;
2528 phys = <&usb2_phy2 2>;
2529 phy-names = "usb";
2530 companion = <&ohci2>;
2531 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2532 resets = <&cpg 701>;
2533 status = "disabled";
2534 };
2536 ehci3: usb@ee0e0100 {
2537 compatible = "generic-ehci";
2538 reg = <0 0xee0e0100 0 0x100>;
2539 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2540 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2541 phys = <&usb2_phy3 2>;
2542 phy-names = "usb";
2543 companion = <&ohci3>;
2544 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2545 resets = <&cpg 700>, <&cpg 705>;
2546 status = "disabled";
2547 };
2549 usb2_phy0: usb-phy@ee080200 {
2550 compatible = "renesas,usb2-phy-r8a7795",
2551 "renesas,rcar-gen3-usb2-phy";
2552 reg = <0 0xee080200 0 0x700>;
2553 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2554 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2555 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2556 resets = <&cpg 703>, <&cpg 704>;
2557 #phy-cells = <1>;
2558 status = "disabled";
2559 };
2561 usb2_phy1: usb-phy@ee0a0200 {
2562 compatible = "renesas,usb2-phy-r8a7795",
2563 "renesas,rcar-gen3-usb2-phy";
2564 reg = <0 0xee0a0200 0 0x700>;
2565 clocks = <&cpg CPG_MOD 702>;
2566 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2567 resets = <&cpg 702>;
2568 #phy-cells = <1>;
2569 status = "disabled";
2570 };
2572 usb2_phy2: usb-phy@ee0c0200 {
2573 compatible = "renesas,usb2-phy-r8a7795",
2574 "renesas,rcar-gen3-usb2-phy";
2575 reg = <0 0xee0c0200 0 0x700>;
2576 clocks = <&cpg CPG_MOD 701>;
2577 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2578 resets = <&cpg 701>;
2579 #phy-cells = <1>;
2580 status = "disabled";
2581 };
2583 usb2_phy3: usb-phy@ee0e0200 {
2584 compatible = "renesas,usb2-phy-r8a7795",
2585 "renesas,rcar-gen3-usb2-phy";
2586 reg = <0 0xee0e0200 0 0x700>;
2587 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2588 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2589 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2590 resets = <&cpg 700>, <&cpg 705>;
2591 #phy-cells = <1>;
2592 status = "disabled";
2593 };
2595 sdhi0: mmc@ee100000 {
2596 compatible = "renesas,sdhi-r8a7795",
2597 "renesas,rcar-gen3-sdhi";
2598 reg = <0 0xee100000 0 0x2000>;
2599 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2600 clocks = <&cpg CPG_MOD 314>;
2601 max-frequency = <200000000>;
2602 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2603 resets = <&cpg 314>;
2604 iommus = <&ipmmu_ds1 32>;
2605 status = "disabled";
2606 };
2608 sdhi1: mmc@ee120000 {
2609 compatible = "renesas,sdhi-r8a7795",
2610 "renesas,rcar-gen3-sdhi";
2611 reg = <0 0xee120000 0 0x2000>;
2612 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2613 clocks = <&cpg CPG_MOD 313>;
2614 max-frequency = <200000000>;
2615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2616 resets = <&cpg 313>;
2617 iommus = <&ipmmu_ds1 33>;
2618 status = "disabled";
2619 };
2621 sdhi2: mmc@ee140000 {
2622 compatible = "renesas,sdhi-r8a7795",
2623 "renesas,rcar-gen3-sdhi";
2624 reg = <0 0xee140000 0 0x2000>;
2625 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2626 clocks = <&cpg CPG_MOD 312>;
2627 max-frequency = <200000000>;
2628 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2629 resets = <&cpg 312>;
2630 iommus = <&ipmmu_ds1 34>;
2631 status = "disabled";
2632 };
2634 sdhi3: mmc@ee160000 {
2635 compatible = "renesas,sdhi-r8a7795",
2636 "renesas,rcar-gen3-sdhi";
2637 reg = <0 0xee160000 0 0x2000>;
2638 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2639 clocks = <&cpg CPG_MOD 311>;
2640 max-frequency = <200000000>;
2641 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2642 resets = <&cpg 311>;
2643 iommus = <&ipmmu_ds1 35>;
2644 status = "disabled";
2645 };
2647 sata: sata@ee300000 {
2648 compatible = "renesas,sata-r8a7795",
2649 "renesas,rcar-gen3-sata";
2650 reg = <0 0xee300000 0 0x200000>;
2651 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2652 clocks = <&cpg CPG_MOD 815>;
2653 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2654 resets = <&cpg 815>;
2655 status = "disabled";
2656 iommus = <&ipmmu_hc 2>;
2657 };
2659 gic: interrupt-controller@f1010000 {
2660 compatible = "arm,gic-400";
2661 #interrupt-cells = <3>;
2662 #address-cells = <0>;
2663 interrupt-controller;
2664 reg = <0x0 0xf1010000 0 0x1000>,
2665 <0x0 0xf1020000 0 0x20000>,
2666 <0x0 0xf1040000 0 0x20000>,
2667 <0x0 0xf1060000 0 0x20000>;
2668 interrupts = <GIC_PPI 9
2669 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2670 clocks = <&cpg CPG_MOD 408>;
2671 clock-names = "clk";
2672 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2673 resets = <&cpg 408>;
2674 };
2676 pciec0: pcie@fe000000 {
2677 compatible = "renesas,pcie-r8a7795",
2678 "renesas,pcie-rcar-gen3";
2679 reg = <0 0xfe000000 0 0x80000>;
2680 #address-cells = <3>;
2681 #size-cells = <2>;
2682 bus-range = <0x00 0xff>;
2683 device_type = "pci";
2684 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2685 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2686 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2687 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2688 /* Map all possible DDR as inbound ranges */
2689 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2690 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2691 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2692 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2693 #interrupt-cells = <1>;
2694 interrupt-map-mask = <0 0 0 0>;
2695 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2696 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2697 clock-names = "pcie", "pcie_bus";
2698 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2699 resets = <&cpg 319>;
2700 status = "disabled";
2701 };
2703 pciec1: pcie@ee800000 {
2704 compatible = "renesas,pcie-r8a7795",
2705 "renesas,pcie-rcar-gen3";
2706 reg = <0 0xee800000 0 0x80000>;
2707 #address-cells = <3>;
2708 #size-cells = <2>;
2709 bus-range = <0x00 0xff>;
2710 device_type = "pci";
2711 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2712 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2713 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2714 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2715 /* Map all possible DDR as inbound ranges */
2716 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2717 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2718 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2719 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2720 #interrupt-cells = <1>;
2721 interrupt-map-mask = <0 0 0 0>;
2722 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2723 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2724 clock-names = "pcie", "pcie_bus";
2725 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2726 resets = <&cpg 318>;
2727 status = "disabled";
2728 };
2730 pciec0_ep: pcie-ep@fe000000 {
2731 compatible = "renesas,r8a7795-pcie-ep",
2732 "renesas,rcar-gen3-pcie-ep";
2733 reg = <0x0 0xfe000000 0 0x80000>,
2734 <0x0 0xfe100000 0 0x100000>,
2735 <0x0 0xfe200000 0 0x200000>,
2736 <0x0 0x30000000 0 0x8000000>,
2737 <0x0 0x38000000 0 0x8000000>;
2738 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2739 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2740 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2741 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2742 clocks = <&cpg CPG_MOD 319>;
2743 clock-names = "pcie";
2744 resets = <&cpg 319>;
2745 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2746 status = "disabled";
2747 };
2749 pciec1_ep: pcie-ep@ee800000 {
2750 compatible = "renesas,r8a7795-pcie-ep",
2751 "renesas,rcar-gen3-pcie-ep";
2752 reg = <0x0 0xee800000 0 0x80000>,
2753 <0x0 0xee900000 0 0x100000>,
2754 <0x0 0xeea00000 0 0x200000>,
2755 <0x0 0xc0000000 0 0x8000000>,
2756 <0x0 0xc8000000 0 0x8000000>;
2757 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2758 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2759 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2760 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2761 clocks = <&cpg CPG_MOD 318>;
2762 clock-names = "pcie";
2763 resets = <&cpg 318>;
2764 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2765 status = "disabled";
2766 };
2768 imr-lx4@fe860000 {
2769 compatible = "renesas,r8a7795-imr-lx4",
2770 "renesas,imr-lx4";
2771 reg = <0 0xfe860000 0 0x2000>;
2772 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2773 clocks = <&cpg CPG_MOD 823>;
2774 power-domains = <&sysc R8A7795_PD_A3VC>;
2775 resets = <&cpg 823>;
2776 };
2778 imr-lx4@fe870000 {
2779 compatible = "renesas,r8a7795-imr-lx4",
2780 "renesas,imr-lx4";
2781 reg = <0 0xfe870000 0 0x2000>;
2782 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2783 clocks = <&cpg CPG_MOD 822>;
2784 power-domains = <&sysc R8A7795_PD_A3VC>;
2785 resets = <&cpg 822>;
2786 };
2788 imr-lx4@fe880000 {
2789 compatible = "renesas,r8a7795-imr-lx4",
2790 "renesas,imr-lx4";
2791 reg = <0 0xfe880000 0 0x2000>;
2792 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2793 clocks = <&cpg CPG_MOD 821>;
2794 power-domains = <&sysc R8A7795_PD_A3VC>;
2795 resets = <&cpg 821>;
2796 };
2798 imr-lx4@fe890000 {
2799 compatible = "renesas,r8a7795-imr-lx4",
2800 "renesas,imr-lx4";
2801 reg = <0 0xfe890000 0 0x2000>;
2802 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2803 clocks = <&cpg CPG_MOD 820>;
2804 power-domains = <&sysc R8A7795_PD_A3VC>;
2805 resets = <&cpg 820>;
2806 };
2808 vspbc: vsp@fe920000 {
2809 compatible = "renesas,vsp2";
2810 reg = <0 0xfe920000 0 0x8000>;
2811 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2812 clocks = <&cpg CPG_MOD 624>;
2813 power-domains = <&sysc R8A7795_PD_A3VP>;
2814 resets = <&cpg 624>;
2816 renesas,fcp = <&fcpvb1>;
2817 };
2819 vspbd: vsp@fe960000 {
2820 compatible = "renesas,vsp2";
2821 reg = <0 0xfe960000 0 0x8000>;
2822 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2823 clocks = <&cpg CPG_MOD 626>;
2824 power-domains = <&sysc R8A7795_PD_A3VP>;
2825 resets = <&cpg 626>;
2827 renesas,fcp = <&fcpvb0>;
2828 };
2830 vspd0: vsp@fea20000 {
2831 compatible = "renesas,vsp2";
2832 reg = <0 0xfea20000 0 0x5000>;
2833 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2834 clocks = <&cpg CPG_MOD 623>;
2835 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2836 resets = <&cpg 623>;
2838 renesas,fcp = <&fcpvd0>;
2839 };
2841 vspd1: vsp@fea28000 {
2842 compatible = "renesas,vsp2";
2843 reg = <0 0xfea28000 0 0x5000>;
2844 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2845 clocks = <&cpg CPG_MOD 622>;
2846 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2847 resets = <&cpg 622>;
2849 renesas,fcp = <&fcpvd1>;
2850 };
2852 vspd2: vsp@fea30000 {
2853 compatible = "renesas,vsp2";
2854 reg = <0 0xfea30000 0 0x5000>;
2855 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2856 clocks = <&cpg CPG_MOD 621>;
2857 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2858 resets = <&cpg 621>;
2860 renesas,fcp = <&fcpvd2>;
2861 };
2863 vspi0: vsp@fe9a0000 {
2864 compatible = "renesas,vsp2";
2865 reg = <0 0xfe9a0000 0 0x8000>;
2866 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2867 clocks = <&cpg CPG_MOD 631>;
2868 power-domains = <&sysc R8A7795_PD_A3VP>;
2869 resets = <&cpg 631>;
2871 renesas,fcp = <&fcpvi0>;
2872 };
2874 vspi1: vsp@fe9b0000 {
2875 compatible = "renesas,vsp2";
2876 reg = <0 0xfe9b0000 0 0x8000>;
2877 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2878 clocks = <&cpg CPG_MOD 630>;
2879 power-domains = <&sysc R8A7795_PD_A3VP>;
2880 resets = <&cpg 630>;
2882 renesas,fcp = <&fcpvi1>;
2883 };
2885 fdp1@fe940000 {
2886 compatible = "renesas,fdp1";
2887 reg = <0 0xfe940000 0 0x2400>;
2888 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2889 clocks = <&cpg CPG_MOD 119>;
2890 power-domains = <&sysc R8A7795_PD_A3VP>;
2891 resets = <&cpg 119>;
2892 renesas,fcp = <&fcpf0>;
2893 };
2895 fdp1@fe944000 {
2896 compatible = "renesas,fdp1";
2897 reg = <0 0xfe944000 0 0x2400>;
2898 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2899 clocks = <&cpg CPG_MOD 118>;
2900 power-domains = <&sysc R8A7795_PD_A3VP>;
2901 resets = <&cpg 118>;
2902 renesas,fcp = <&fcpf1>;
2903 };
2905 fcpf0: fcp@fe950000 {
2906 compatible = "renesas,fcpf";
2907 reg = <0 0xfe950000 0 0x200>;
2908 clocks = <&cpg CPG_MOD 615>;
2909 power-domains = <&sysc R8A7795_PD_A3VP>;
2910 resets = <&cpg 615>;
2911 iommus = <&ipmmu_vp0 0>;
2912 };
2914 fcpf1: fcp@fe951000 {
2915 compatible = "renesas,fcpf";
2916 reg = <0 0xfe951000 0 0x200>;
2917 clocks = <&cpg CPG_MOD 614>;
2918 power-domains = <&sysc R8A7795_PD_A3VP>;
2919 resets = <&cpg 614>;
2920 iommus = <&ipmmu_vp1 1>;
2921 };
2923 fcpvb0: fcp@fe96f000 {
2924 compatible = "renesas,fcpv";
2925 reg = <0 0xfe96f000 0 0x200>;
2926 clocks = <&cpg CPG_MOD 607>;
2927 power-domains = <&sysc R8A7795_PD_A3VP>;
2928 resets = <&cpg 607>;
2929 iommus = <&ipmmu_vp0 5>;
2930 };
2932 fcpvb1: fcp@fe92f000 {
2933 compatible = "renesas,fcpv";
2934 reg = <0 0xfe92f000 0 0x200>;
2935 clocks = <&cpg CPG_MOD 606>;
2936 power-domains = <&sysc R8A7795_PD_A3VP>;
2937 resets = <&cpg 606>;
2938 iommus = <&ipmmu_vp1 7>;
2939 };
2941 fcpvi0: fcp@fe9af000 {
2942 compatible = "renesas,fcpv";
2943 reg = <0 0xfe9af000 0 0x200>;
2944 clocks = <&cpg CPG_MOD 611>;
2945 power-domains = <&sysc R8A7795_PD_A3VP>;
2946 resets = <&cpg 611>;
2947 iommus = <&ipmmu_vp0 8>;
2948 };
2950 fcpvi1: fcp@fe9bf000 {
2951 compatible = "renesas,fcpv";
2952 reg = <0 0xfe9bf000 0 0x200>;
2953 clocks = <&cpg CPG_MOD 610>;
2954 power-domains = <&sysc R8A7795_PD_A3VP>;
2955 resets = <&cpg 610>;
2956 iommus = <&ipmmu_vp1 9>;
2957 };
2959 fcpvd0: fcp@fea27000 {
2960 compatible = "renesas,fcpv";
2961 reg = <0 0xfea27000 0 0x200>;
2962 clocks = <&cpg CPG_MOD 603>;
2963 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2964 resets = <&cpg 603>;
2965 iommus = <&ipmmu_vi0 8>;
2966 };
2968 fcpvd1: fcp@fea2f000 {
2969 compatible = "renesas,fcpv";
2970 reg = <0 0xfea2f000 0 0x200>;
2971 clocks = <&cpg CPG_MOD 602>;
2972 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2973 resets = <&cpg 602>;
2974 iommus = <&ipmmu_vi0 9>;
2975 };
2977 fcpvd2: fcp@fea37000 {
2978 compatible = "renesas,fcpv";
2979 reg = <0 0xfea37000 0 0x200>;
2980 clocks = <&cpg CPG_MOD 601>;
2981 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2982 resets = <&cpg 601>;
2983 iommus = <&ipmmu_vi1 10>;
2984 };
2986 cmm0: cmm@fea40000 {
2987 compatible = "renesas,r8a7795-cmm",
2988 "renesas,rcar-gen3-cmm";
2989 reg = <0 0xfea40000 0 0x1000>;
2990 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2991 clocks = <&cpg CPG_MOD 711>;
2992 resets = <&cpg 711>;
2993 };
2995 cmm1: cmm@fea50000 {
2996 compatible = "renesas,r8a7795-cmm",
2997 "renesas,rcar-gen3-cmm";
2998 reg = <0 0xfea50000 0 0x1000>;
2999 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3000 clocks = <&cpg CPG_MOD 710>;
3001 resets = <&cpg 710>;
3002 };
3004 cmm2: cmm@fea60000 {
3005 compatible = "renesas,r8a7795-cmm",
3006 "renesas,rcar-gen3-cmm";
3007 reg = <0 0xfea60000 0 0x1000>;
3008 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3009 clocks = <&cpg CPG_MOD 709>;
3010 resets = <&cpg 709>;
3011 };
3013 cmm3: cmm@fea70000 {
3014 compatible = "renesas,r8a7795-cmm",
3015 "renesas,rcar-gen3-cmm";
3016 reg = <0 0xfea70000 0 0x1000>;
3017 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3018 clocks = <&cpg CPG_MOD 708>;
3019 resets = <&cpg 708>;
3020 };
3022 csi20: csi2@fea80000 {
3023 compatible = "renesas,r8a7795-csi2";
3024 reg = <0 0xfea80000 0 0x10000>;
3025 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
3026 clocks = <&cpg CPG_MOD 714>;
3027 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3028 resets = <&cpg 714>;
3029 status = "disabled";
3031 ports {
3032 #address-cells = <1>;
3033 #size-cells = <0>;
3035 port@1 {
3036 #address-cells = <1>;
3037 #size-cells = <0>;
3039 reg = <1>;
3041 csi20vin0: endpoint@0 {
3042 reg = <0>;
3043 remote-endpoint = <&vin0csi20>;
3044 };
3045 csi20vin1: endpoint@1 {
3046 reg = <1>;
3047 remote-endpoint = <&vin1csi20>;
3048 };
3049 csi20vin2: endpoint@2 {
3050 reg = <2>;
3051 remote-endpoint = <&vin2csi20>;
3052 };
3053 csi20vin3: endpoint@3 {
3054 reg = <3>;
3055 remote-endpoint = <&vin3csi20>;
3056 };
3057 csi20vin4: endpoint@4 {
3058 reg = <4>;
3059 remote-endpoint = <&vin4csi20>;
3060 };
3061 csi20vin5: endpoint@5 {
3062 reg = <5>;
3063 remote-endpoint = <&vin5csi20>;
3064 };
3065 csi20vin6: endpoint@6 {
3066 reg = <6>;
3067 remote-endpoint = <&vin6csi20>;
3068 };
3069 csi20vin7: endpoint@7 {
3070 reg = <7>;
3071 remote-endpoint = <&vin7csi20>;
3072 };
3073 };
3074 };
3075 };
3077 csi40: csi2@feaa0000 {
3078 compatible = "renesas,r8a7795-csi2";
3079 reg = <0 0xfeaa0000 0 0x10000>;
3080 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
3081 clocks = <&cpg CPG_MOD 716>;
3082 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3083 resets = <&cpg 716>;
3084 status = "disabled";
3086 ports {
3087 #address-cells = <1>;
3088 #size-cells = <0>;
3090 port@1 {
3091 #address-cells = <1>;
3092 #size-cells = <0>;
3094 reg = <1>;
3096 csi40vin0: endpoint@0 {
3097 reg = <0>;
3098 remote-endpoint = <&vin0csi40>;
3099 };
3100 csi40vin1: endpoint@1 {
3101 reg = <1>;
3102 remote-endpoint = <&vin1csi40>;
3103 };
3104 csi40vin2: endpoint@2 {
3105 reg = <2>;
3106 remote-endpoint = <&vin2csi40>;
3107 };
3108 csi40vin3: endpoint@3 {
3109 reg = <3>;
3110 remote-endpoint = <&vin3csi40>;
3111 };
3112 };
3113 };
3114 };
3116 csi41: csi2@feab0000 {
3117 compatible = "renesas,r8a7795-csi2";
3118 reg = <0 0xfeab0000 0 0x10000>;
3119 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
3120 clocks = <&cpg CPG_MOD 715>;
3121 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3122 resets = <&cpg 715>;
3123 status = "disabled";
3125 ports {
3126 #address-cells = <1>;
3127 #size-cells = <0>;
3129 port@1 {
3130 #address-cells = <1>;
3131 #size-cells = <0>;
3133 reg = <1>;
3135 csi41vin4: endpoint@0 {
3136 reg = <0>;
3137 remote-endpoint = <&vin4csi41>;
3138 };
3139 csi41vin5: endpoint@1 {
3140 reg = <1>;
3141 remote-endpoint = <&vin5csi41>;
3142 };
3143 csi41vin6: endpoint@2 {
3144 reg = <2>;
3145 remote-endpoint = <&vin6csi41>;
3146 };
3147 csi41vin7: endpoint@3 {
3148 reg = <3>;
3149 remote-endpoint = <&vin7csi41>;
3150 };
3151 };
3152 };
3153 };
3155 hdmi0: hdmi@fead0000 {
3156 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3157 reg = <0 0xfead0000 0 0x10000>;
3158 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
3159 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3160 clock-names = "iahb", "isfr";
3161 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3162 resets = <&cpg 729>;
3163 status = "disabled";
3165 ports {
3166 #address-cells = <1>;
3167 #size-cells = <0>;
3168 port@0 {
3169 reg = <0>;
3170 dw_hdmi0_in: endpoint {
3171 remote-endpoint = <&du_out_hdmi0>;
3172 };
3173 };
3174 port@1 {
3175 reg = <1>;
3176 };
3177 port@2 {
3178 /* HDMI sound */
3179 reg = <2>;
3180 };
3181 };
3182 };
3184 hdmi1: hdmi@feae0000 {
3185 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3186 reg = <0 0xfeae0000 0 0x10000>;
3187 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
3188 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3189 clock-names = "iahb", "isfr";
3190 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3191 resets = <&cpg 728>;
3192 status = "disabled";
3194 ports {
3195 #address-cells = <1>;
3196 #size-cells = <0>;
3197 port@0 {
3198 reg = <0>;
3199 dw_hdmi1_in: endpoint {
3200 remote-endpoint = <&du_out_hdmi1>;
3201 };
3202 };
3203 port@1 {
3204 reg = <1>;
3205 };
3206 port@2 {
3207 /* HDMI sound */
3208 reg = <2>;
3209 };
3210 };
3211 };
3213 du: display@feb00000 {
3214 compatible = "renesas,du-r8a7795";
3215 reg = <0 0xfeb00000 0 0x80000>;
3216 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
3217 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
3218 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
3219 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
3220 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
3221 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
3222 clock-names = "du.0", "du.1", "du.2", "du.3";
3223 resets = <&cpg 724>, <&cpg 722>;
3224 reset-names = "du.0", "du.2";
3226 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
3227 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
3228 <&vspd0 1>;
3230 status = "disabled";
3232 ports {
3233 #address-cells = <1>;
3234 #size-cells = <0>;
3236 port@0 {
3237 reg = <0>;
3238 du_out_rgb: endpoint {
3239 };
3240 };
3241 port@1 {
3242 reg = <1>;
3243 du_out_hdmi0: endpoint {
3244 remote-endpoint = <&dw_hdmi0_in>;
3245 };
3246 };
3247 port@2 {
3248 reg = <2>;
3249 du_out_hdmi1: endpoint {
3250 remote-endpoint = <&dw_hdmi1_in>;
3251 };
3252 };
3253 port@3 {
3254 reg = <3>;
3255 du_out_lvds0: endpoint {
3256 remote-endpoint = <&lvds0_in>;
3257 };
3258 };
3259 };
3260 };
3262 lvds0: lvds@feb90000 {
3263 compatible = "renesas,r8a7795-lvds";
3264 reg = <0 0xfeb90000 0 0x14>;
3265 clocks = <&cpg CPG_MOD 727>;
3266 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3267 resets = <&cpg 727>;
3268 status = "disabled";
3270 ports {
3271 #address-cells = <1>;
3272 #size-cells = <0>;
3274 port@0 {
3275 reg = <0>;
3276 lvds0_in: endpoint {
3277 remote-endpoint = <&du_out_lvds0>;
3278 };
3279 };
3280 port@1 {
3281 reg = <1>;
3282 lvds0_out: endpoint {
3283 };
3284 };
3285 };
3286 };
3288 prr: chipid@fff00044 {
3289 compatible = "renesas,prr";
3290 reg = <0 0xfff00044 0 4>;
3291 };
3292 };
3294 thermal-zones {
3295 sensor_thermal1: sensor-thermal1 {
3296 polling-delay-passive = <250>;
3297 polling-delay = <1000>;
3298 thermal-sensors = <&tsc 0>;
3299 sustainable-power = <6313>;
3301 trips {
3302 sensor1_crit: sensor1-crit {
3303 temperature = <120000>;
3304 hysteresis = <1000>;
3305 type = "critical";
3306 };
3307 };
3308 };
3310 sensor_thermal2: sensor-thermal2 {
3311 polling-delay-passive = <250>;
3312 polling-delay = <1000>;
3313 thermal-sensors = <&tsc 1>;
3314 sustainable-power = <6313>;
3316 trips {
3317 sensor2_crit: sensor2-crit {
3318 temperature = <120000>;
3319 hysteresis = <1000>;
3320 type = "critical";
3321 };
3322 };
3323 };
3325 sensor_thermal3: sensor-thermal3 {
3326 polling-delay-passive = <250>;
3327 polling-delay = <1000>;
3328 thermal-sensors = <&tsc 2>;
3330 trips {
3331 target: trip-point1 {
3332 temperature = <100000>;
3333 hysteresis = <1000>;
3334 type = "passive";
3335 };
3337 sensor3_crit: sensor3-crit {
3338 temperature = <120000>;
3339 hysteresis = <1000>;
3340 type = "critical";
3341 };
3342 };
3344 cooling-maps {
3345 map0 {
3346 trip = <&target>;
3347 cooling-device = <&a57_0 2 4>;
3348 contribution = <1024>;
3349 };
3351 map1 {
3352 trip = <&target>;
3353 cooling-device = <&a53_0 0 2>;
3354 contribution = <1024>;
3355 };
3356 };
3357 };
3358 };
3360 timer {
3361 compatible = "arm,armv8-timer";
3362 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3363 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3364 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3365 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
3366 };
3368 /* External USB clocks - can be overridden by the board */
3369 usb3s0_clk: usb3s0 {
3370 compatible = "fixed-clock";
3371 #clock-cells = <0>;
3372 clock-frequency = <0>;
3373 };
3375 usb_extal_clk: usb_extal {
3376 compatible = "fixed-clock";
3377 #clock-cells = <0>;
3378 clock-frequency = <0>;
3379 };
3380 };