| blob | 53b9aa26c9b13fa7d99061b071f52cd2d3881c63 |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
12 #define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4
14 / {
15 compatible = "renesas,r8a7796";
16 #address-cells = <2>;
17 #size-cells = <2>;
19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 i2c7 = &i2c_dvfs;
28 };
30 /*
31 * The external audio clocks are configured as 0 Hz fixed frequency
32 * clocks by default.
33 * Boards that provide audio clocks should override them.
34 */
35 audio_clk_a: audio_clk_a {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
39 };
41 audio_clk_b: audio_clk_b {
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <0>;
45 };
47 audio_clk_c: audio_clk_c {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <0>;
51 };
53 /* External CAN clock - to be overridden by boards that provide it */
54 can_clk: can {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
60 cluster0_opp: opp_table0 {
61 compatible = "operating-points-v2";
62 opp-shared;
64 opp-500000000 {
65 opp-hz = /bits/ 64 <500000000>;
66 opp-microvolt = <820000>;
67 clock-latency-ns = <300000>;
68 };
69 opp-1000000000 {
70 opp-hz = /bits/ 64 <1000000000>;
71 opp-microvolt = <820000>;
72 clock-latency-ns = <300000>;
73 };
74 opp-1500000000 {
75 opp-hz = /bits/ 64 <1500000000>;
76 opp-microvolt = <820000>;
77 clock-latency-ns = <300000>;
78 };
79 opp-1600000000 {
80 opp-hz = /bits/ 64 <1600000000>;
81 opp-microvolt = <900000>;
82 clock-latency-ns = <300000>;
83 turbo-mode;
84 };
85 opp-1700000000 {
86 opp-hz = /bits/ 64 <1700000000>;
87 opp-microvolt = <900000>;
88 clock-latency-ns = <300000>;
89 turbo-mode;
90 };
91 opp-1800000000 {
92 opp-hz = /bits/ 64 <1800000000>;
93 opp-microvolt = <960000>;
94 clock-latency-ns = <300000>;
95 turbo-mode;
96 };
97 };
99 cluster1_opp: opp_table1 {
100 compatible = "operating-points-v2";
101 opp-shared;
103 opp-800000000 {
104 opp-hz = /bits/ 64 <800000000>;
105 opp-microvolt = <820000>;
106 clock-latency-ns = <300000>;
107 };
108 opp-1000000000 {
109 opp-hz = /bits/ 64 <1000000000>;
110 opp-microvolt = <820000>;
111 clock-latency-ns = <300000>;
112 };
113 opp-1200000000 {
114 opp-hz = /bits/ 64 <1200000000>;
115 opp-microvolt = <820000>;
116 clock-latency-ns = <300000>;
117 };
118 opp-1300000000 {
119 opp-hz = /bits/ 64 <1300000000>;
120 opp-microvolt = <820000>;
121 clock-latency-ns = <300000>;
122 turbo-mode;
123 };
124 };
126 cpus {
127 #address-cells = <1>;
128 #size-cells = <0>;
130 cpu-map {
131 cluster0 {
132 core0 {
133 cpu = <&a57_0>;
134 };
135 core1 {
136 cpu = <&a57_1>;
137 };
138 };
140 cluster1 {
141 core0 {
142 cpu = <&a53_0>;
143 };
144 core1 {
145 cpu = <&a53_1>;
146 };
147 core2 {
148 cpu = <&a53_2>;
149 };
150 core3 {
151 cpu = <&a53_3>;
152 };
153 };
154 };
156 a57_0: cpu@0 {
157 compatible = "arm,cortex-a57";
158 reg = <0x0>;
159 device_type = "cpu";
160 power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
161 next-level-cache = <&L2_CA57>;
162 enable-method = "psci";
163 cpu-idle-states = <&CPU_SLEEP_0>;
164 dynamic-power-coefficient = <854>;
165 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
166 operating-points-v2 = <&cluster0_opp>;
167 capacity-dmips-mhz = <1024>;
168 #cooling-cells = <2>;
169 };
171 a57_1: cpu@1 {
172 compatible = "arm,cortex-a57";
173 reg = <0x1>;
174 device_type = "cpu";
175 power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
176 next-level-cache = <&L2_CA57>;
177 enable-method = "psci";
178 cpu-idle-states = <&CPU_SLEEP_0>;
179 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
180 operating-points-v2 = <&cluster0_opp>;
181 capacity-dmips-mhz = <1024>;
182 #cooling-cells = <2>;
183 };
185 a53_0: cpu@100 {
186 compatible = "arm,cortex-a53";
187 reg = <0x100>;
188 device_type = "cpu";
189 power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
190 next-level-cache = <&L2_CA53>;
191 enable-method = "psci";
192 cpu-idle-states = <&CPU_SLEEP_1>;
193 #cooling-cells = <2>;
194 dynamic-power-coefficient = <277>;
195 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
196 operating-points-v2 = <&cluster1_opp>;
197 capacity-dmips-mhz = <535>;
198 };
200 a53_1: cpu@101 {
201 compatible = "arm,cortex-a53";
202 reg = <0x101>;
203 device_type = "cpu";
204 power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
205 next-level-cache = <&L2_CA53>;
206 enable-method = "psci";
207 cpu-idle-states = <&CPU_SLEEP_1>;
208 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
209 operating-points-v2 = <&cluster1_opp>;
210 capacity-dmips-mhz = <535>;
211 };
213 a53_2: cpu@102 {
214 compatible = "arm,cortex-a53";
215 reg = <0x102>;
216 device_type = "cpu";
217 power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
218 next-level-cache = <&L2_CA53>;
219 enable-method = "psci";
220 cpu-idle-states = <&CPU_SLEEP_1>;
221 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
222 operating-points-v2 = <&cluster1_opp>;
223 capacity-dmips-mhz = <535>;
224 };
226 a53_3: cpu@103 {
227 compatible = "arm,cortex-a53";
228 reg = <0x103>;
229 device_type = "cpu";
230 power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
231 next-level-cache = <&L2_CA53>;
232 enable-method = "psci";
233 cpu-idle-states = <&CPU_SLEEP_1>;
234 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
235 operating-points-v2 = <&cluster1_opp>;
236 capacity-dmips-mhz = <535>;
237 };
239 L2_CA57: cache-controller-0 {
240 compatible = "cache";
241 power-domains = <&sysc R8A7796_PD_CA57_SCU>;
242 cache-unified;
243 cache-level = <2>;
244 };
246 L2_CA53: cache-controller-1 {
247 compatible = "cache";
248 power-domains = <&sysc R8A7796_PD_CA53_SCU>;
249 cache-unified;
250 cache-level = <2>;
251 };
253 idle-states {
254 entry-method = "psci";
256 CPU_SLEEP_0: cpu-sleep-0 {
257 compatible = "arm,idle-state";
258 arm,psci-suspend-param = <0x0010000>;
259 local-timer-stop;
260 entry-latency-us = <400>;
261 exit-latency-us = <500>;
262 min-residency-us = <4000>;
263 };
265 CPU_SLEEP_1: cpu-sleep-1 {
266 compatible = "arm,idle-state";
267 arm,psci-suspend-param = <0x0010000>;
268 local-timer-stop;
269 entry-latency-us = <700>;
270 exit-latency-us = <700>;
271 min-residency-us = <5000>;
272 };
273 };
274 };
276 extal_clk: extal {
277 compatible = "fixed-clock";
278 #clock-cells = <0>;
279 /* This value must be overridden by the board */
280 clock-frequency = <0>;
281 };
283 extalr_clk: extalr {
284 compatible = "fixed-clock";
285 #clock-cells = <0>;
286 /* This value must be overridden by the board */
287 clock-frequency = <0>;
288 };
290 /* External PCIe clock - can be overridden by the board */
291 pcie_bus_clk: pcie_bus {
292 compatible = "fixed-clock";
293 #clock-cells = <0>;
294 clock-frequency = <0>;
295 };
297 pmu_a53 {
298 compatible = "arm,cortex-a53-pmu";
299 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
300 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
301 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
302 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
303 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
304 };
306 pmu_a57 {
307 compatible = "arm,cortex-a57-pmu";
308 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
309 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
310 interrupt-affinity = <&a57_0>, <&a57_1>;
311 };
313 psci {
314 compatible = "arm,psci-1.0", "arm,psci-0.2";
315 method = "smc";
316 };
318 /* External SCIF clock - to be overridden by boards that provide it */
319 scif_clk: scif {
320 compatible = "fixed-clock";
321 #clock-cells = <0>;
322 clock-frequency = <0>;
323 };
325 soc {
326 compatible = "simple-bus";
327 interrupt-parent = <&gic>;
328 #address-cells = <2>;
329 #size-cells = <2>;
330 ranges;
332 rwdt: watchdog@e6020000 {
333 compatible = "renesas,r8a7796-wdt",
334 "renesas,rcar-gen3-wdt";
335 reg = <0 0xe6020000 0 0x0c>;
336 clocks = <&cpg CPG_MOD 402>;
337 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
338 resets = <&cpg 402>;
339 status = "disabled";
340 };
342 gpio0: gpio@e6050000 {
343 compatible = "renesas,gpio-r8a7796",
344 "renesas,rcar-gen3-gpio";
345 reg = <0 0xe6050000 0 0x50>;
346 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
347 #gpio-cells = <2>;
348 gpio-controller;
349 gpio-ranges = <&pfc 0 0 16>;
350 #interrupt-cells = <2>;
351 interrupt-controller;
352 clocks = <&cpg CPG_MOD 912>;
353 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
354 resets = <&cpg 912>;
355 };
357 gpio1: gpio@e6051000 {
358 compatible = "renesas,gpio-r8a7796",
359 "renesas,rcar-gen3-gpio";
360 reg = <0 0xe6051000 0 0x50>;
361 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
362 #gpio-cells = <2>;
363 gpio-controller;
364 gpio-ranges = <&pfc 0 32 29>;
365 #interrupt-cells = <2>;
366 interrupt-controller;
367 clocks = <&cpg CPG_MOD 911>;
368 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
369 resets = <&cpg 911>;
370 };
372 gpio2: gpio@e6052000 {
373 compatible = "renesas,gpio-r8a7796",
374 "renesas,rcar-gen3-gpio";
375 reg = <0 0xe6052000 0 0x50>;
376 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
377 #gpio-cells = <2>;
378 gpio-controller;
379 gpio-ranges = <&pfc 0 64 15>;
380 #interrupt-cells = <2>;
381 interrupt-controller;
382 clocks = <&cpg CPG_MOD 910>;
383 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
384 resets = <&cpg 910>;
385 };
387 gpio3: gpio@e6053000 {
388 compatible = "renesas,gpio-r8a7796",
389 "renesas,rcar-gen3-gpio";
390 reg = <0 0xe6053000 0 0x50>;
391 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
392 #gpio-cells = <2>;
393 gpio-controller;
394 gpio-ranges = <&pfc 0 96 16>;
395 #interrupt-cells = <2>;
396 interrupt-controller;
397 clocks = <&cpg CPG_MOD 909>;
398 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
399 resets = <&cpg 909>;
400 };
402 gpio4: gpio@e6054000 {
403 compatible = "renesas,gpio-r8a7796",
404 "renesas,rcar-gen3-gpio";
405 reg = <0 0xe6054000 0 0x50>;
406 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
407 #gpio-cells = <2>;
408 gpio-controller;
409 gpio-ranges = <&pfc 0 128 18>;
410 #interrupt-cells = <2>;
411 interrupt-controller;
412 clocks = <&cpg CPG_MOD 908>;
413 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
414 resets = <&cpg 908>;
415 };
417 gpio5: gpio@e6055000 {
418 compatible = "renesas,gpio-r8a7796",
419 "renesas,rcar-gen3-gpio";
420 reg = <0 0xe6055000 0 0x50>;
421 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
422 #gpio-cells = <2>;
423 gpio-controller;
424 gpio-ranges = <&pfc 0 160 26>;
425 #interrupt-cells = <2>;
426 interrupt-controller;
427 clocks = <&cpg CPG_MOD 907>;
428 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
429 resets = <&cpg 907>;
430 };
432 gpio6: gpio@e6055400 {
433 compatible = "renesas,gpio-r8a7796",
434 "renesas,rcar-gen3-gpio";
435 reg = <0 0xe6055400 0 0x50>;
436 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
437 #gpio-cells = <2>;
438 gpio-controller;
439 gpio-ranges = <&pfc 0 192 32>;
440 #interrupt-cells = <2>;
441 interrupt-controller;
442 clocks = <&cpg CPG_MOD 906>;
443 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
444 resets = <&cpg 906>;
445 };
447 gpio7: gpio@e6055800 {
448 compatible = "renesas,gpio-r8a7796",
449 "renesas,rcar-gen3-gpio";
450 reg = <0 0xe6055800 0 0x50>;
451 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
452 #gpio-cells = <2>;
453 gpio-controller;
454 gpio-ranges = <&pfc 0 224 4>;
455 #interrupt-cells = <2>;
456 interrupt-controller;
457 clocks = <&cpg CPG_MOD 905>;
458 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
459 resets = <&cpg 905>;
460 };
462 pfc: pinctrl@e6060000 {
463 compatible = "renesas,pfc-r8a7796";
464 reg = <0 0xe6060000 0 0x50c>;
465 };
467 cmt0: timer@e60f0000 {
468 compatible = "renesas,r8a7796-cmt0",
469 "renesas,rcar-gen3-cmt0";
470 reg = <0 0xe60f0000 0 0x1004>;
471 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
472 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
473 clocks = <&cpg CPG_MOD 303>;
474 clock-names = "fck";
475 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
476 resets = <&cpg 303>;
477 status = "disabled";
478 };
480 cmt1: timer@e6130000 {
481 compatible = "renesas,r8a7796-cmt1",
482 "renesas,rcar-gen3-cmt1";
483 reg = <0 0xe6130000 0 0x1004>;
484 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
485 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
486 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
487 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
488 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
489 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
490 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
491 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
492 clocks = <&cpg CPG_MOD 302>;
493 clock-names = "fck";
494 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
495 resets = <&cpg 302>;
496 status = "disabled";
497 };
499 cmt2: timer@e6140000 {
500 compatible = "renesas,r8a7796-cmt1",
501 "renesas,rcar-gen3-cmt1";
502 reg = <0 0xe6140000 0 0x1004>;
503 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
504 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
505 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
506 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
507 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
510 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
511 clocks = <&cpg CPG_MOD 301>;
512 clock-names = "fck";
513 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
514 resets = <&cpg 301>;
515 status = "disabled";
516 };
518 cmt3: timer@e6148000 {
519 compatible = "renesas,r8a7796-cmt1",
520 "renesas,rcar-gen3-cmt1";
521 reg = <0 0xe6148000 0 0x1004>;
522 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
523 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
524 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
525 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
529 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
530 clocks = <&cpg CPG_MOD 300>;
531 clock-names = "fck";
532 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
533 resets = <&cpg 300>;
534 status = "disabled";
535 };
537 cpg: clock-controller@e6150000 {
538 compatible = "renesas,r8a7796-cpg-mssr";
539 reg = <0 0xe6150000 0 0x1000>;
540 clocks = <&extal_clk>, <&extalr_clk>;
541 clock-names = "extal", "extalr";
542 #clock-cells = <2>;
543 #power-domain-cells = <0>;
544 #reset-cells = <1>;
545 };
547 rst: reset-controller@e6160000 {
548 compatible = "renesas,r8a7796-rst";
549 reg = <0 0xe6160000 0 0x0200>;
550 };
552 sysc: system-controller@e6180000 {
553 compatible = "renesas,r8a7796-sysc";
554 reg = <0 0xe6180000 0 0x0400>;
555 #power-domain-cells = <1>;
556 };
558 tsc: thermal@e6198000 {
559 compatible = "renesas,r8a7796-thermal";
560 reg = <0 0xe6198000 0 0x100>,
561 <0 0xe61a0000 0 0x100>,
562 <0 0xe61a8000 0 0x100>;
563 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
564 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
565 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
566 clocks = <&cpg CPG_MOD 522>;
567 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
568 resets = <&cpg 522>;
569 #thermal-sensor-cells = <1>;
570 };
572 intc_ex: interrupt-controller@e61c0000 {
573 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
574 #interrupt-cells = <2>;
575 interrupt-controller;
576 reg = <0 0xe61c0000 0 0x200>;
577 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
578 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
579 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
580 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
581 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
582 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
583 clocks = <&cpg CPG_MOD 407>;
584 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
585 resets = <&cpg 407>;
586 };
588 i2c0: i2c@e6500000 {
589 #address-cells = <1>;
590 #size-cells = <0>;
591 compatible = "renesas,i2c-r8a7796",
592 "renesas,rcar-gen3-i2c";
593 reg = <0 0xe6500000 0 0x40>;
594 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
595 clocks = <&cpg CPG_MOD 931>;
596 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
597 resets = <&cpg 931>;
598 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
599 <&dmac2 0x91>, <&dmac2 0x90>;
600 dma-names = "tx", "rx", "tx", "rx";
601 i2c-scl-internal-delay-ns = <110>;
602 status = "disabled";
603 };
605 i2c1: i2c@e6508000 {
606 #address-cells = <1>;
607 #size-cells = <0>;
608 compatible = "renesas,i2c-r8a7796",
609 "renesas,rcar-gen3-i2c";
610 reg = <0 0xe6508000 0 0x40>;
611 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
612 clocks = <&cpg CPG_MOD 930>;
613 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
614 resets = <&cpg 930>;
615 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
616 <&dmac2 0x93>, <&dmac2 0x92>;
617 dma-names = "tx", "rx", "tx", "rx";
618 i2c-scl-internal-delay-ns = <6>;
619 status = "disabled";
620 };
622 i2c2: i2c@e6510000 {
623 #address-cells = <1>;
624 #size-cells = <0>;
625 compatible = "renesas,i2c-r8a7796",
626 "renesas,rcar-gen3-i2c";
627 reg = <0 0xe6510000 0 0x40>;
628 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
629 clocks = <&cpg CPG_MOD 929>;
630 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
631 resets = <&cpg 929>;
632 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
633 <&dmac2 0x95>, <&dmac2 0x94>;
634 dma-names = "tx", "rx", "tx", "rx";
635 i2c-scl-internal-delay-ns = <6>;
636 status = "disabled";
637 };
639 i2c3: i2c@e66d0000 {
640 #address-cells = <1>;
641 #size-cells = <0>;
642 compatible = "renesas,i2c-r8a7796",
643 "renesas,rcar-gen3-i2c";
644 reg = <0 0xe66d0000 0 0x40>;
645 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
646 clocks = <&cpg CPG_MOD 928>;
647 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
648 resets = <&cpg 928>;
649 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
650 dma-names = "tx", "rx";
651 i2c-scl-internal-delay-ns = <110>;
652 status = "disabled";
653 };
655 i2c4: i2c@e66d8000 {
656 #address-cells = <1>;
657 #size-cells = <0>;
658 compatible = "renesas,i2c-r8a7796",
659 "renesas,rcar-gen3-i2c";
660 reg = <0 0xe66d8000 0 0x40>;
661 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
662 clocks = <&cpg CPG_MOD 927>;
663 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
664 resets = <&cpg 927>;
665 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
666 dma-names = "tx", "rx";
667 i2c-scl-internal-delay-ns = <110>;
668 status = "disabled";
669 };
671 i2c5: i2c@e66e0000 {
672 #address-cells = <1>;
673 #size-cells = <0>;
674 compatible = "renesas,i2c-r8a7796",
675 "renesas,rcar-gen3-i2c";
676 reg = <0 0xe66e0000 0 0x40>;
677 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
678 clocks = <&cpg CPG_MOD 919>;
679 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
680 resets = <&cpg 919>;
681 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
682 dma-names = "tx", "rx";
683 i2c-scl-internal-delay-ns = <110>;
684 status = "disabled";
685 };
687 i2c6: i2c@e66e8000 {
688 #address-cells = <1>;
689 #size-cells = <0>;
690 compatible = "renesas,i2c-r8a7796",
691 "renesas,rcar-gen3-i2c";
692 reg = <0 0xe66e8000 0 0x40>;
693 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
694 clocks = <&cpg CPG_MOD 918>;
695 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
696 resets = <&cpg 918>;
697 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
698 dma-names = "tx", "rx";
699 i2c-scl-internal-delay-ns = <6>;
700 status = "disabled";
701 };
703 i2c_dvfs: i2c@e60b0000 {
704 #address-cells = <1>;
705 #size-cells = <0>;
706 compatible = "renesas,iic-r8a7796",
707 "renesas,rcar-gen3-iic",
708 "renesas,rmobile-iic";
709 reg = <0 0xe60b0000 0 0x425>;
710 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
711 clocks = <&cpg CPG_MOD 926>;
712 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
713 resets = <&cpg 926>;
714 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
715 dma-names = "tx", "rx";
716 status = "disabled";
717 };
719 hscif0: serial@e6540000 {
720 compatible = "renesas,hscif-r8a7796",
721 "renesas,rcar-gen3-hscif",
722 "renesas,hscif";
723 reg = <0 0xe6540000 0 0x60>;
724 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
725 clocks = <&cpg CPG_MOD 520>,
726 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
727 <&scif_clk>;
728 clock-names = "fck", "brg_int", "scif_clk";
729 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
730 <&dmac2 0x31>, <&dmac2 0x30>;
731 dma-names = "tx", "rx", "tx", "rx";
732 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
733 resets = <&cpg 520>;
734 status = "disabled";
735 };
737 hscif1: serial@e6550000 {
738 compatible = "renesas,hscif-r8a7796",
739 "renesas,rcar-gen3-hscif",
740 "renesas,hscif";
741 reg = <0 0xe6550000 0 0x60>;
742 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
743 clocks = <&cpg CPG_MOD 519>,
744 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
745 <&scif_clk>;
746 clock-names = "fck", "brg_int", "scif_clk";
747 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
748 <&dmac2 0x33>, <&dmac2 0x32>;
749 dma-names = "tx", "rx", "tx", "rx";
750 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
751 resets = <&cpg 519>;
752 status = "disabled";
753 };
755 hscif2: serial@e6560000 {
756 compatible = "renesas,hscif-r8a7796",
757 "renesas,rcar-gen3-hscif",
758 "renesas,hscif";
759 reg = <0 0xe6560000 0 0x60>;
760 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
761 clocks = <&cpg CPG_MOD 518>,
762 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
763 <&scif_clk>;
764 clock-names = "fck", "brg_int", "scif_clk";
765 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
766 <&dmac2 0x35>, <&dmac2 0x34>;
767 dma-names = "tx", "rx", "tx", "rx";
768 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
769 resets = <&cpg 518>;
770 status = "disabled";
771 };
773 hscif3: serial@e66a0000 {
774 compatible = "renesas,hscif-r8a7796",
775 "renesas,rcar-gen3-hscif",
776 "renesas,hscif";
777 reg = <0 0xe66a0000 0 0x60>;
778 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
779 clocks = <&cpg CPG_MOD 517>,
780 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
781 <&scif_clk>;
782 clock-names = "fck", "brg_int", "scif_clk";
783 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
784 dma-names = "tx", "rx";
785 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
786 resets = <&cpg 517>;
787 status = "disabled";
788 };
790 hscif4: serial@e66b0000 {
791 compatible = "renesas,hscif-r8a7796",
792 "renesas,rcar-gen3-hscif",
793 "renesas,hscif";
794 reg = <0 0xe66b0000 0 0x60>;
795 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
796 clocks = <&cpg CPG_MOD 516>,
797 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
798 <&scif_clk>;
799 clock-names = "fck", "brg_int", "scif_clk";
800 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
801 dma-names = "tx", "rx";
802 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
803 resets = <&cpg 516>;
804 status = "disabled";
805 };
807 hsusb: usb@e6590000 {
808 compatible = "renesas,usbhs-r8a7796",
809 "renesas,rcar-gen3-usbhs";
810 reg = <0 0xe6590000 0 0x200>;
811 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
812 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
813 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
814 <&usb_dmac1 0>, <&usb_dmac1 1>;
815 dma-names = "ch0", "ch1", "ch2", "ch3";
816 renesas,buswait = <11>;
817 phys = <&usb2_phy0 3>;
818 phy-names = "usb";
819 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
820 resets = <&cpg 704>, <&cpg 703>;
821 status = "disabled";
822 };
824 usb_dmac0: dma-controller@e65a0000 {
825 compatible = "renesas,r8a7796-usb-dmac",
826 "renesas,usb-dmac";
827 reg = <0 0xe65a0000 0 0x100>;
828 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
829 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
830 interrupt-names = "ch0", "ch1";
831 clocks = <&cpg CPG_MOD 330>;
832 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
833 resets = <&cpg 330>;
834 #dma-cells = <1>;
835 dma-channels = <2>;
836 };
838 usb_dmac1: dma-controller@e65b0000 {
839 compatible = "renesas,r8a7796-usb-dmac",
840 "renesas,usb-dmac";
841 reg = <0 0xe65b0000 0 0x100>;
842 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
843 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
844 interrupt-names = "ch0", "ch1";
845 clocks = <&cpg CPG_MOD 331>;
846 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
847 resets = <&cpg 331>;
848 #dma-cells = <1>;
849 dma-channels = <2>;
850 };
852 usb3_phy0: usb-phy@e65ee000 {
853 compatible = "renesas,r8a7796-usb3-phy",
854 "renesas,rcar-gen3-usb3-phy";
855 reg = <0 0xe65ee000 0 0x90>;
856 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
857 <&usb_extal_clk>;
858 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
859 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
860 resets = <&cpg 328>;
861 #phy-cells = <0>;
862 status = "disabled";
863 };
865 arm_cc630p: crypto@e6601000 {
866 compatible = "arm,cryptocell-630p-ree";
867 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
868 reg = <0x0 0xe6601000 0 0x1000>;
869 clocks = <&cpg CPG_MOD 229>;
870 resets = <&cpg 229>;
871 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
872 };
874 dmac0: dma-controller@e6700000 {
875 compatible = "renesas,dmac-r8a7796",
876 "renesas,rcar-dmac";
877 reg = <0 0xe6700000 0 0x10000>;
878 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
879 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
880 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
881 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
882 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
883 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
884 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
885 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
886 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
887 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
888 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
889 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
890 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
891 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
892 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
895 interrupt-names = "error",
896 "ch0", "ch1", "ch2", "ch3",
897 "ch4", "ch5", "ch6", "ch7",
898 "ch8", "ch9", "ch10", "ch11",
899 "ch12", "ch13", "ch14", "ch15";
900 clocks = <&cpg CPG_MOD 219>;
901 clock-names = "fck";
902 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
903 resets = <&cpg 219>;
904 #dma-cells = <1>;
905 dma-channels = <16>;
906 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
907 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
908 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
909 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
910 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
911 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
912 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
913 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
914 };
916 dmac1: dma-controller@e7300000 {
917 compatible = "renesas,dmac-r8a7796",
918 "renesas,rcar-dmac";
919 reg = <0 0xe7300000 0 0x10000>;
920 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
921 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
922 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
923 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
924 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
925 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
926 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
927 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
928 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
929 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
930 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
931 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
932 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
933 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
934 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
935 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
936 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
937 interrupt-names = "error",
938 "ch0", "ch1", "ch2", "ch3",
939 "ch4", "ch5", "ch6", "ch7",
940 "ch8", "ch9", "ch10", "ch11",
941 "ch12", "ch13", "ch14", "ch15";
942 clocks = <&cpg CPG_MOD 218>;
943 clock-names = "fck";
944 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
945 resets = <&cpg 218>;
946 #dma-cells = <1>;
947 dma-channels = <16>;
948 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
949 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
950 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
951 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
952 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
953 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
954 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
955 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
956 };
958 dmac2: dma-controller@e7310000 {
959 compatible = "renesas,dmac-r8a7796",
960 "renesas,rcar-dmac";
961 reg = <0 0xe7310000 0 0x10000>;
962 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
963 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
964 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
965 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
966 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
979 interrupt-names = "error",
980 "ch0", "ch1", "ch2", "ch3",
981 "ch4", "ch5", "ch6", "ch7",
982 "ch8", "ch9", "ch10", "ch11",
983 "ch12", "ch13", "ch14", "ch15";
984 clocks = <&cpg CPG_MOD 217>;
985 clock-names = "fck";
986 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
987 resets = <&cpg 217>;
988 #dma-cells = <1>;
989 dma-channels = <16>;
990 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
991 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
992 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
993 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
994 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
995 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
996 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
997 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
998 };
1000 ipmmu_ds0: iommu@e6740000 {
1001 compatible = "renesas,ipmmu-r8a7796";
1002 reg = <0 0xe6740000 0 0x1000>;
1003 renesas,ipmmu-main = <&ipmmu_mm 0>;
1004 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1005 #iommu-cells = <1>;
1006 };
1008 ipmmu_ds1: iommu@e7740000 {
1009 compatible = "renesas,ipmmu-r8a7796";
1010 reg = <0 0xe7740000 0 0x1000>;
1011 renesas,ipmmu-main = <&ipmmu_mm 1>;
1012 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1013 #iommu-cells = <1>;
1014 };
1016 ipmmu_hc: iommu@e6570000 {
1017 compatible = "renesas,ipmmu-r8a7796";
1018 reg = <0 0xe6570000 0 0x1000>;
1019 renesas,ipmmu-main = <&ipmmu_mm 2>;
1020 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1021 #iommu-cells = <1>;
1022 };
1024 ipmmu_ir: iommu@ff8b0000 {
1025 compatible = "renesas,ipmmu-r8a7796";
1026 reg = <0 0xff8b0000 0 0x1000>;
1027 renesas,ipmmu-main = <&ipmmu_mm 3>;
1028 power-domains = <&sysc R8A7796_PD_A3IR>;
1029 #iommu-cells = <1>;
1030 };
1032 ipmmu_mm: iommu@e67b0000 {
1033 compatible = "renesas,ipmmu-r8a7796";
1034 reg = <0 0xe67b0000 0 0x1000>;
1035 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1037 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1038 #iommu-cells = <1>;
1039 };
1041 ipmmu_mp: iommu@ec670000 {
1042 compatible = "renesas,ipmmu-r8a7796";
1043 reg = <0 0xec670000 0 0x1000>;
1044 renesas,ipmmu-main = <&ipmmu_mm 4>;
1045 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1046 #iommu-cells = <1>;
1047 };
1049 ipmmu_pv0: iommu@fd800000 {
1050 compatible = "renesas,ipmmu-r8a7796";
1051 reg = <0 0xfd800000 0 0x1000>;
1052 renesas,ipmmu-main = <&ipmmu_mm 5>;
1053 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1054 #iommu-cells = <1>;
1055 };
1057 ipmmu_pv1: iommu@fd950000 {
1058 compatible = "renesas,ipmmu-r8a7796";
1059 reg = <0 0xfd950000 0 0x1000>;
1060 renesas,ipmmu-main = <&ipmmu_mm 6>;
1061 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1062 #iommu-cells = <1>;
1063 };
1065 ipmmu_rt: iommu@ffc80000 {
1066 compatible = "renesas,ipmmu-r8a7796";
1067 reg = <0 0xffc80000 0 0x1000>;
1068 renesas,ipmmu-main = <&ipmmu_mm 7>;
1069 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1070 #iommu-cells = <1>;
1071 };
1073 ipmmu_vc0: iommu@fe6b0000 {
1074 compatible = "renesas,ipmmu-r8a7796";
1075 reg = <0 0xfe6b0000 0 0x1000>;
1076 renesas,ipmmu-main = <&ipmmu_mm 8>;
1077 power-domains = <&sysc R8A7796_PD_A3VC>;
1078 #iommu-cells = <1>;
1079 };
1081 ipmmu_vi0: iommu@febd0000 {
1082 compatible = "renesas,ipmmu-r8a7796";
1083 reg = <0 0xfebd0000 0 0x1000>;
1084 renesas,ipmmu-main = <&ipmmu_mm 9>;
1085 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1086 #iommu-cells = <1>;
1087 };
1089 avb: ethernet@e6800000 {
1090 compatible = "renesas,etheravb-r8a7796",
1091 "renesas,etheravb-rcar-gen3";
1092 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1093 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1094 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1095 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1096 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1097 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1098 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1099 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1100 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1101 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1102 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1103 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1104 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1105 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1106 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1107 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1108 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1109 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1110 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1111 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1112 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1113 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1114 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1115 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1116 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1117 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1118 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1119 "ch4", "ch5", "ch6", "ch7",
1120 "ch8", "ch9", "ch10", "ch11",
1121 "ch12", "ch13", "ch14", "ch15",
1122 "ch16", "ch17", "ch18", "ch19",
1123 "ch20", "ch21", "ch22", "ch23",
1124 "ch24";
1125 clocks = <&cpg CPG_MOD 812>;
1126 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1127 resets = <&cpg 812>;
1128 phy-mode = "rgmii";
1129 rx-internal-delay-ps = <0>;
1130 tx-internal-delay-ps = <0>;
1131 iommus = <&ipmmu_ds0 16>;
1132 #address-cells = <1>;
1133 #size-cells = <0>;
1134 status = "disabled";
1135 };
1137 can0: can@e6c30000 {
1138 compatible = "renesas,can-r8a7796",
1139 "renesas,rcar-gen3-can";
1140 reg = <0 0xe6c30000 0 0x1000>;
1141 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1142 clocks = <&cpg CPG_MOD 916>,
1143 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1144 <&can_clk>;
1145 clock-names = "clkp1", "clkp2", "can_clk";
1146 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1147 assigned-clock-rates = <40000000>;
1148 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1149 resets = <&cpg 916>;
1150 status = "disabled";
1151 };
1153 can1: can@e6c38000 {
1154 compatible = "renesas,can-r8a7796",
1155 "renesas,rcar-gen3-can";
1156 reg = <0 0xe6c38000 0 0x1000>;
1157 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1158 clocks = <&cpg CPG_MOD 915>,
1159 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1160 <&can_clk>;
1161 clock-names = "clkp1", "clkp2", "can_clk";
1162 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1163 assigned-clock-rates = <40000000>;
1164 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1165 resets = <&cpg 915>;
1166 status = "disabled";
1167 };
1169 canfd: can@e66c0000 {
1170 compatible = "renesas,r8a7796-canfd",
1171 "renesas,rcar-gen3-canfd";
1172 reg = <0 0xe66c0000 0 0x8000>;
1173 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1174 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1175 clocks = <&cpg CPG_MOD 914>,
1176 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1177 <&can_clk>;
1178 clock-names = "fck", "canfd", "can_clk";
1179 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1180 assigned-clock-rates = <40000000>;
1181 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1182 resets = <&cpg 914>;
1183 status = "disabled";
1185 channel0 {
1186 status = "disabled";
1187 };
1189 channel1 {
1190 status = "disabled";
1191 };
1192 };
1194 pwm0: pwm@e6e30000 {
1195 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1196 reg = <0 0xe6e30000 0 8>;
1197 #pwm-cells = <2>;
1198 clocks = <&cpg CPG_MOD 523>;
1199 resets = <&cpg 523>;
1200 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1201 status = "disabled";
1202 };
1204 pwm1: pwm@e6e31000 {
1205 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1206 reg = <0 0xe6e31000 0 8>;
1207 #pwm-cells = <2>;
1208 clocks = <&cpg CPG_MOD 523>;
1209 resets = <&cpg 523>;
1210 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1211 status = "disabled";
1212 };
1214 pwm2: pwm@e6e32000 {
1215 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1216 reg = <0 0xe6e32000 0 8>;
1217 #pwm-cells = <2>;
1218 clocks = <&cpg CPG_MOD 523>;
1219 resets = <&cpg 523>;
1220 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1221 status = "disabled";
1222 };
1224 pwm3: pwm@e6e33000 {
1225 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1226 reg = <0 0xe6e33000 0 8>;
1227 #pwm-cells = <2>;
1228 clocks = <&cpg CPG_MOD 523>;
1229 resets = <&cpg 523>;
1230 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1231 status = "disabled";
1232 };
1234 pwm4: pwm@e6e34000 {
1235 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1236 reg = <0 0xe6e34000 0 8>;
1237 #pwm-cells = <2>;
1238 clocks = <&cpg CPG_MOD 523>;
1239 resets = <&cpg 523>;
1240 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1241 status = "disabled";
1242 };
1244 pwm5: pwm@e6e35000 {
1245 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1246 reg = <0 0xe6e35000 0 8>;
1247 #pwm-cells = <2>;
1248 clocks = <&cpg CPG_MOD 523>;
1249 resets = <&cpg 523>;
1250 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1251 status = "disabled";
1252 };
1254 pwm6: pwm@e6e36000 {
1255 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1256 reg = <0 0xe6e36000 0 8>;
1257 #pwm-cells = <2>;
1258 clocks = <&cpg CPG_MOD 523>;
1259 resets = <&cpg 523>;
1260 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1261 status = "disabled";
1262 };
1264 scif0: serial@e6e60000 {
1265 compatible = "renesas,scif-r8a7796",
1266 "renesas,rcar-gen3-scif", "renesas,scif";
1267 reg = <0 0xe6e60000 0 64>;
1268 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1269 clocks = <&cpg CPG_MOD 207>,
1270 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1271 <&scif_clk>;
1272 clock-names = "fck", "brg_int", "scif_clk";
1273 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1274 <&dmac2 0x51>, <&dmac2 0x50>;
1275 dma-names = "tx", "rx", "tx", "rx";
1276 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1277 resets = <&cpg 207>;
1278 status = "disabled";
1279 };
1281 scif1: serial@e6e68000 {
1282 compatible = "renesas,scif-r8a7796",
1283 "renesas,rcar-gen3-scif", "renesas,scif";
1284 reg = <0 0xe6e68000 0 64>;
1285 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1286 clocks = <&cpg CPG_MOD 206>,
1287 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1288 <&scif_clk>;
1289 clock-names = "fck", "brg_int", "scif_clk";
1290 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1291 <&dmac2 0x53>, <&dmac2 0x52>;
1292 dma-names = "tx", "rx", "tx", "rx";
1293 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1294 resets = <&cpg 206>;
1295 status = "disabled";
1296 };
1298 scif2: serial@e6e88000 {
1299 compatible = "renesas,scif-r8a7796",
1300 "renesas,rcar-gen3-scif", "renesas,scif";
1301 reg = <0 0xe6e88000 0 64>;
1302 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1303 clocks = <&cpg CPG_MOD 310>,
1304 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1305 <&scif_clk>;
1306 clock-names = "fck", "brg_int", "scif_clk";
1307 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1308 <&dmac2 0x13>, <&dmac2 0x12>;
1309 dma-names = "tx", "rx", "tx", "rx";
1310 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1311 resets = <&cpg 310>;
1312 status = "disabled";
1313 };
1315 scif3: serial@e6c50000 {
1316 compatible = "renesas,scif-r8a7796",
1317 "renesas,rcar-gen3-scif", "renesas,scif";
1318 reg = <0 0xe6c50000 0 64>;
1319 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1320 clocks = <&cpg CPG_MOD 204>,
1321 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1322 <&scif_clk>;
1323 clock-names = "fck", "brg_int", "scif_clk";
1324 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1325 dma-names = "tx", "rx";
1326 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1327 resets = <&cpg 204>;
1328 status = "disabled";
1329 };
1331 scif4: serial@e6c40000 {
1332 compatible = "renesas,scif-r8a7796",
1333 "renesas,rcar-gen3-scif", "renesas,scif";
1334 reg = <0 0xe6c40000 0 64>;
1335 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MOD 203>,
1337 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1338 <&scif_clk>;
1339 clock-names = "fck", "brg_int", "scif_clk";
1340 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1341 dma-names = "tx", "rx";
1342 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1343 resets = <&cpg 203>;
1344 status = "disabled";
1345 };
1347 scif5: serial@e6f30000 {
1348 compatible = "renesas,scif-r8a7796",
1349 "renesas,rcar-gen3-scif", "renesas,scif";
1350 reg = <0 0xe6f30000 0 64>;
1351 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1352 clocks = <&cpg CPG_MOD 202>,
1353 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1354 <&scif_clk>;
1355 clock-names = "fck", "brg_int", "scif_clk";
1356 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1357 <&dmac2 0x5b>, <&dmac2 0x5a>;
1358 dma-names = "tx", "rx", "tx", "rx";
1359 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1360 resets = <&cpg 202>;
1361 status = "disabled";
1362 };
1364 tpu: pwm@e6e80000 {
1365 compatible = "renesas,tpu-r8a7796", "renesas,tpu";
1366 reg = <0 0xe6e80000 0 0x148>;
1367 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1368 clocks = <&cpg CPG_MOD 304>;
1369 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1370 resets = <&cpg 304>;
1371 #pwm-cells = <3>;
1372 status = "disabled";
1373 };
1375 msiof0: spi@e6e90000 {
1376 compatible = "renesas,msiof-r8a7796",
1377 "renesas,rcar-gen3-msiof";
1378 reg = <0 0xe6e90000 0 0x0064>;
1379 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1380 clocks = <&cpg CPG_MOD 211>;
1381 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1382 <&dmac2 0x41>, <&dmac2 0x40>;
1383 dma-names = "tx", "rx", "tx", "rx";
1384 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1385 resets = <&cpg 211>;
1386 #address-cells = <1>;
1387 #size-cells = <0>;
1388 status = "disabled";
1389 };
1391 msiof1: spi@e6ea0000 {
1392 compatible = "renesas,msiof-r8a7796",
1393 "renesas,rcar-gen3-msiof";
1394 reg = <0 0xe6ea0000 0 0x0064>;
1395 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1396 clocks = <&cpg CPG_MOD 210>;
1397 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1398 <&dmac2 0x43>, <&dmac2 0x42>;
1399 dma-names = "tx", "rx", "tx", "rx";
1400 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1401 resets = <&cpg 210>;
1402 #address-cells = <1>;
1403 #size-cells = <0>;
1404 status = "disabled";
1405 };
1407 msiof2: spi@e6c00000 {
1408 compatible = "renesas,msiof-r8a7796",
1409 "renesas,rcar-gen3-msiof";
1410 reg = <0 0xe6c00000 0 0x0064>;
1411 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1412 clocks = <&cpg CPG_MOD 209>;
1413 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1414 dma-names = "tx", "rx";
1415 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1416 resets = <&cpg 209>;
1417 #address-cells = <1>;
1418 #size-cells = <0>;
1419 status = "disabled";
1420 };
1422 msiof3: spi@e6c10000 {
1423 compatible = "renesas,msiof-r8a7796",
1424 "renesas,rcar-gen3-msiof";
1425 reg = <0 0xe6c10000 0 0x0064>;
1426 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1427 clocks = <&cpg CPG_MOD 208>;
1428 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1429 dma-names = "tx", "rx";
1430 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1431 resets = <&cpg 208>;
1432 #address-cells = <1>;
1433 #size-cells = <0>;
1434 status = "disabled";
1435 };
1437 vin0: video@e6ef0000 {
1438 compatible = "renesas,vin-r8a7796";
1439 reg = <0 0xe6ef0000 0 0x1000>;
1440 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1441 clocks = <&cpg CPG_MOD 811>;
1442 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1443 resets = <&cpg 811>;
1444 renesas,id = <0>;
1445 status = "disabled";
1447 ports {
1448 #address-cells = <1>;
1449 #size-cells = <0>;
1451 port@1 {
1452 #address-cells = <1>;
1453 #size-cells = <0>;
1455 reg = <1>;
1457 vin0csi20: endpoint@0 {
1458 reg = <0>;
1459 remote-endpoint = <&csi20vin0>;
1460 };
1461 vin0csi40: endpoint@2 {
1462 reg = <2>;
1463 remote-endpoint = <&csi40vin0>;
1464 };
1465 };
1466 };
1467 };
1469 vin1: video@e6ef1000 {
1470 compatible = "renesas,vin-r8a7796";
1471 reg = <0 0xe6ef1000 0 0x1000>;
1472 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1473 clocks = <&cpg CPG_MOD 810>;
1474 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1475 resets = <&cpg 810>;
1476 renesas,id = <1>;
1477 status = "disabled";
1479 ports {
1480 #address-cells = <1>;
1481 #size-cells = <0>;
1483 port@1 {
1484 #address-cells = <1>;
1485 #size-cells = <0>;
1487 reg = <1>;
1489 vin1csi20: endpoint@0 {
1490 reg = <0>;
1491 remote-endpoint = <&csi20vin1>;
1492 };
1493 vin1csi40: endpoint@2 {
1494 reg = <2>;
1495 remote-endpoint = <&csi40vin1>;
1496 };
1497 };
1498 };
1499 };
1501 vin2: video@e6ef2000 {
1502 compatible = "renesas,vin-r8a7796";
1503 reg = <0 0xe6ef2000 0 0x1000>;
1504 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1505 clocks = <&cpg CPG_MOD 809>;
1506 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1507 resets = <&cpg 809>;
1508 renesas,id = <2>;
1509 status = "disabled";
1511 ports {
1512 #address-cells = <1>;
1513 #size-cells = <0>;
1515 port@1 {
1516 #address-cells = <1>;
1517 #size-cells = <0>;
1519 reg = <1>;
1521 vin2csi20: endpoint@0 {
1522 reg = <0>;
1523 remote-endpoint = <&csi20vin2>;
1524 };
1525 vin2csi40: endpoint@2 {
1526 reg = <2>;
1527 remote-endpoint = <&csi40vin2>;
1528 };
1529 };
1530 };
1531 };
1533 vin3: video@e6ef3000 {
1534 compatible = "renesas,vin-r8a7796";
1535 reg = <0 0xe6ef3000 0 0x1000>;
1536 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1537 clocks = <&cpg CPG_MOD 808>;
1538 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1539 resets = <&cpg 808>;
1540 renesas,id = <3>;
1541 status = "disabled";
1543 ports {
1544 #address-cells = <1>;
1545 #size-cells = <0>;
1547 port@1 {
1548 #address-cells = <1>;
1549 #size-cells = <0>;
1551 reg = <1>;
1553 vin3csi20: endpoint@0 {
1554 reg = <0>;
1555 remote-endpoint = <&csi20vin3>;
1556 };
1557 vin3csi40: endpoint@2 {
1558 reg = <2>;
1559 remote-endpoint = <&csi40vin3>;
1560 };
1561 };
1562 };
1563 };
1565 vin4: video@e6ef4000 {
1566 compatible = "renesas,vin-r8a7796";
1567 reg = <0 0xe6ef4000 0 0x1000>;
1568 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1569 clocks = <&cpg CPG_MOD 807>;
1570 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1571 resets = <&cpg 807>;
1572 renesas,id = <4>;
1573 status = "disabled";
1575 ports {
1576 #address-cells = <1>;
1577 #size-cells = <0>;
1579 port@1 {
1580 #address-cells = <1>;
1581 #size-cells = <0>;
1583 reg = <1>;
1585 vin4csi20: endpoint@0 {
1586 reg = <0>;
1587 remote-endpoint = <&csi20vin4>;
1588 };
1589 vin4csi40: endpoint@2 {
1590 reg = <2>;
1591 remote-endpoint = <&csi40vin4>;
1592 };
1593 };
1594 };
1595 };
1597 vin5: video@e6ef5000 {
1598 compatible = "renesas,vin-r8a7796";
1599 reg = <0 0xe6ef5000 0 0x1000>;
1600 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1601 clocks = <&cpg CPG_MOD 806>;
1602 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1603 resets = <&cpg 806>;
1604 renesas,id = <5>;
1605 status = "disabled";
1607 ports {
1608 #address-cells = <1>;
1609 #size-cells = <0>;
1611 port@1 {
1612 #address-cells = <1>;
1613 #size-cells = <0>;
1615 reg = <1>;
1617 vin5csi20: endpoint@0 {
1618 reg = <0>;
1619 remote-endpoint = <&csi20vin5>;
1620 };
1621 vin5csi40: endpoint@2 {
1622 reg = <2>;
1623 remote-endpoint = <&csi40vin5>;
1624 };
1625 };
1626 };
1627 };
1629 vin6: video@e6ef6000 {
1630 compatible = "renesas,vin-r8a7796";
1631 reg = <0 0xe6ef6000 0 0x1000>;
1632 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1633 clocks = <&cpg CPG_MOD 805>;
1634 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1635 resets = <&cpg 805>;
1636 renesas,id = <6>;
1637 status = "disabled";
1639 ports {
1640 #address-cells = <1>;
1641 #size-cells = <0>;
1643 port@1 {
1644 #address-cells = <1>;
1645 #size-cells = <0>;
1647 reg = <1>;
1649 vin6csi20: endpoint@0 {
1650 reg = <0>;
1651 remote-endpoint = <&csi20vin6>;
1652 };
1653 vin6csi40: endpoint@2 {
1654 reg = <2>;
1655 remote-endpoint = <&csi40vin6>;
1656 };
1657 };
1658 };
1659 };
1661 vin7: video@e6ef7000 {
1662 compatible = "renesas,vin-r8a7796";
1663 reg = <0 0xe6ef7000 0 0x1000>;
1664 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1665 clocks = <&cpg CPG_MOD 804>;
1666 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1667 resets = <&cpg 804>;
1668 renesas,id = <7>;
1669 status = "disabled";
1671 ports {
1672 #address-cells = <1>;
1673 #size-cells = <0>;
1675 port@1 {
1676 #address-cells = <1>;
1677 #size-cells = <0>;
1679 reg = <1>;
1681 vin7csi20: endpoint@0 {
1682 reg = <0>;
1683 remote-endpoint = <&csi20vin7>;
1684 };
1685 vin7csi40: endpoint@2 {
1686 reg = <2>;
1687 remote-endpoint = <&csi40vin7>;
1688 };
1689 };
1690 };
1691 };
1693 drif00: rif@e6f40000 {
1694 compatible = "renesas,r8a7796-drif",
1695 "renesas,rcar-gen3-drif";
1696 reg = <0 0xe6f40000 0 0x64>;
1697 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1698 clocks = <&cpg CPG_MOD 515>;
1699 clock-names = "fck";
1700 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1701 dma-names = "rx", "rx";
1702 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1703 resets = <&cpg 515>;
1704 renesas,bonding = <&drif01>;
1705 status = "disabled";
1706 };
1708 drif01: rif@e6f50000 {
1709 compatible = "renesas,r8a7796-drif",
1710 "renesas,rcar-gen3-drif";
1711 reg = <0 0xe6f50000 0 0x64>;
1712 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1713 clocks = <&cpg CPG_MOD 514>;
1714 clock-names = "fck";
1715 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1716 dma-names = "rx", "rx";
1717 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1718 resets = <&cpg 514>;
1719 renesas,bonding = <&drif00>;
1720 status = "disabled";
1721 };
1723 drif10: rif@e6f60000 {
1724 compatible = "renesas,r8a7796-drif",
1725 "renesas,rcar-gen3-drif";
1726 reg = <0 0xe6f60000 0 0x64>;
1727 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1728 clocks = <&cpg CPG_MOD 513>;
1729 clock-names = "fck";
1730 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1731 dma-names = "rx", "rx";
1732 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1733 resets = <&cpg 513>;
1734 renesas,bonding = <&drif11>;
1735 status = "disabled";
1736 };
1738 drif11: rif@e6f70000 {
1739 compatible = "renesas,r8a7796-drif",
1740 "renesas,rcar-gen3-drif";
1741 reg = <0 0xe6f70000 0 0x64>;
1742 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1743 clocks = <&cpg CPG_MOD 512>;
1744 clock-names = "fck";
1745 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1746 dma-names = "rx", "rx";
1747 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1748 resets = <&cpg 512>;
1749 renesas,bonding = <&drif10>;
1750 status = "disabled";
1751 };
1753 drif20: rif@e6f80000 {
1754 compatible = "renesas,r8a7796-drif",
1755 "renesas,rcar-gen3-drif";
1756 reg = <0 0xe6f80000 0 0x64>;
1757 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1758 clocks = <&cpg CPG_MOD 511>;
1759 clock-names = "fck";
1760 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1761 dma-names = "rx", "rx";
1762 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1763 resets = <&cpg 511>;
1764 renesas,bonding = <&drif21>;
1765 status = "disabled";
1766 };
1768 drif21: rif@e6f90000 {
1769 compatible = "renesas,r8a7796-drif",
1770 "renesas,rcar-gen3-drif";
1771 reg = <0 0xe6f90000 0 0x64>;
1772 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1773 clocks = <&cpg CPG_MOD 510>;
1774 clock-names = "fck";
1775 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1776 dma-names = "rx", "rx";
1777 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1778 resets = <&cpg 510>;
1779 renesas,bonding = <&drif20>;
1780 status = "disabled";
1781 };
1783 drif30: rif@e6fa0000 {
1784 compatible = "renesas,r8a7796-drif",
1785 "renesas,rcar-gen3-drif";
1786 reg = <0 0xe6fa0000 0 0x64>;
1787 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1788 clocks = <&cpg CPG_MOD 509>;
1789 clock-names = "fck";
1790 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1791 dma-names = "rx", "rx";
1792 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1793 resets = <&cpg 509>;
1794 renesas,bonding = <&drif31>;
1795 status = "disabled";
1796 };
1798 drif31: rif@e6fb0000 {
1799 compatible = "renesas,r8a7796-drif",
1800 "renesas,rcar-gen3-drif";
1801 reg = <0 0xe6fb0000 0 0x64>;
1802 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1803 clocks = <&cpg CPG_MOD 508>;
1804 clock-names = "fck";
1805 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1806 dma-names = "rx", "rx";
1807 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1808 resets = <&cpg 508>;
1809 renesas,bonding = <&drif30>;
1810 status = "disabled";
1811 };
1813 rcar_sound: sound@ec500000 {
1814 /*
1815 * #sound-dai-cells is required
1816 *
1817 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1818 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1819 */
1820 /*
1821 * #clock-cells is required for audio_clkout0/1/2/3
1822 *
1823 * clkout : #clock-cells = <0>; <&rcar_sound>;
1824 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1825 */
1826 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1827 reg = <0 0xec500000 0 0x1000>, /* SCU */
1828 <0 0xec5a0000 0 0x100>, /* ADG */
1829 <0 0xec540000 0 0x1000>, /* SSIU */
1830 <0 0xec541000 0 0x280>, /* SSI */
1831 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1832 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1834 clocks = <&cpg CPG_MOD 1005>,
1835 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1836 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1837 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1838 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1839 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1840 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1841 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1842 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1843 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1844 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1845 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1846 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1847 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1848 <&audio_clk_a>, <&audio_clk_b>,
1849 <&audio_clk_c>,
1850 <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1851 clock-names = "ssi-all",
1852 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1853 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1854 "ssi.1", "ssi.0",
1855 "src.9", "src.8", "src.7", "src.6",
1856 "src.5", "src.4", "src.3", "src.2",
1857 "src.1", "src.0",
1858 "mix.1", "mix.0",
1859 "ctu.1", "ctu.0",
1860 "dvc.0", "dvc.1",
1861 "clk_a", "clk_b", "clk_c", "clk_i";
1862 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1863 resets = <&cpg 1005>,
1864 <&cpg 1006>, <&cpg 1007>,
1865 <&cpg 1008>, <&cpg 1009>,
1866 <&cpg 1010>, <&cpg 1011>,
1867 <&cpg 1012>, <&cpg 1013>,
1868 <&cpg 1014>, <&cpg 1015>;
1869 reset-names = "ssi-all",
1870 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1871 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1872 "ssi.1", "ssi.0";
1873 status = "disabled";
1875 rcar_sound,ctu {
1876 ctu00: ctu-0 { };
1877 ctu01: ctu-1 { };
1878 ctu02: ctu-2 { };
1879 ctu03: ctu-3 { };
1880 ctu10: ctu-4 { };
1881 ctu11: ctu-5 { };
1882 ctu12: ctu-6 { };
1883 ctu13: ctu-7 { };
1884 };
1886 rcar_sound,dvc {
1887 dvc0: dvc-0 {
1888 dmas = <&audma1 0xbc>;
1889 dma-names = "tx";
1890 };
1891 dvc1: dvc-1 {
1892 dmas = <&audma1 0xbe>;
1893 dma-names = "tx";
1894 };
1895 };
1897 rcar_sound,mix {
1898 mix0: mix-0 { };
1899 mix1: mix-1 { };
1900 };
1902 rcar_sound,src {
1903 src0: src-0 {
1904 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1905 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1906 dma-names = "rx", "tx";
1907 };
1908 src1: src-1 {
1909 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1910 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1911 dma-names = "rx", "tx";
1912 };
1913 src2: src-2 {
1914 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1915 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1916 dma-names = "rx", "tx";
1917 };
1918 src3: src-3 {
1919 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1920 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1921 dma-names = "rx", "tx";
1922 };
1923 src4: src-4 {
1924 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1925 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1926 dma-names = "rx", "tx";
1927 };
1928 src5: src-5 {
1929 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1930 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1931 dma-names = "rx", "tx";
1932 };
1933 src6: src-6 {
1934 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1935 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1936 dma-names = "rx", "tx";
1937 };
1938 src7: src-7 {
1939 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1940 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1941 dma-names = "rx", "tx";
1942 };
1943 src8: src-8 {
1944 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1945 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1946 dma-names = "rx", "tx";
1947 };
1948 src9: src-9 {
1949 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1950 dmas = <&audma0 0x97>, <&audma1 0xba>;
1951 dma-names = "rx", "tx";
1952 };
1953 };
1955 rcar_sound,ssi {
1956 ssi0: ssi-0 {
1957 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1958 dmas = <&audma0 0x01>, <&audma1 0x02>;
1959 dma-names = "rx", "tx";
1960 };
1961 ssi1: ssi-1 {
1962 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1963 dmas = <&audma0 0x03>, <&audma1 0x04>;
1964 dma-names = "rx", "tx";
1965 };
1966 ssi2: ssi-2 {
1967 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1968 dmas = <&audma0 0x05>, <&audma1 0x06>;
1969 dma-names = "rx", "tx";
1970 };
1971 ssi3: ssi-3 {
1972 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1973 dmas = <&audma0 0x07>, <&audma1 0x08>;
1974 dma-names = "rx", "tx";
1975 };
1976 ssi4: ssi-4 {
1977 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1978 dmas = <&audma0 0x09>, <&audma1 0x0a>;
1979 dma-names = "rx", "tx";
1980 };
1981 ssi5: ssi-5 {
1982 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1983 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1984 dma-names = "rx", "tx";
1985 };
1986 ssi6: ssi-6 {
1987 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1988 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1989 dma-names = "rx", "tx";
1990 };
1991 ssi7: ssi-7 {
1992 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1993 dmas = <&audma0 0x0f>, <&audma1 0x10>;
1994 dma-names = "rx", "tx";
1995 };
1996 ssi8: ssi-8 {
1997 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1998 dmas = <&audma0 0x11>, <&audma1 0x12>;
1999 dma-names = "rx", "tx";
2000 };
2001 ssi9: ssi-9 {
2002 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2003 dmas = <&audma0 0x13>, <&audma1 0x14>;
2004 dma-names = "rx", "tx";
2005 };
2006 };
2008 rcar_sound,ssiu {
2009 ssiu00: ssiu-0 {
2010 dmas = <&audma0 0x15>, <&audma1 0x16>;
2011 dma-names = "rx", "tx";
2012 };
2013 ssiu01: ssiu-1 {
2014 dmas = <&audma0 0x35>, <&audma1 0x36>;
2015 dma-names = "rx", "tx";
2016 };
2017 ssiu02: ssiu-2 {
2018 dmas = <&audma0 0x37>, <&audma1 0x38>;
2019 dma-names = "rx", "tx";
2020 };
2021 ssiu03: ssiu-3 {
2022 dmas = <&audma0 0x47>, <&audma1 0x48>;
2023 dma-names = "rx", "tx";
2024 };
2025 ssiu04: ssiu-4 {
2026 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2027 dma-names = "rx", "tx";
2028 };
2029 ssiu05: ssiu-5 {
2030 dmas = <&audma0 0x43>, <&audma1 0x44>;
2031 dma-names = "rx", "tx";
2032 };
2033 ssiu06: ssiu-6 {
2034 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2035 dma-names = "rx", "tx";
2036 };
2037 ssiu07: ssiu-7 {
2038 dmas = <&audma0 0x53>, <&audma1 0x54>;
2039 dma-names = "rx", "tx";
2040 };
2041 ssiu10: ssiu-8 {
2042 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2043 dma-names = "rx", "tx";
2044 };
2045 ssiu11: ssiu-9 {
2046 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2047 dma-names = "rx", "tx";
2048 };
2049 ssiu12: ssiu-10 {
2050 dmas = <&audma0 0x57>, <&audma1 0x58>;
2051 dma-names = "rx", "tx";
2052 };
2053 ssiu13: ssiu-11 {
2054 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2055 dma-names = "rx", "tx";
2056 };
2057 ssiu14: ssiu-12 {
2058 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2059 dma-names = "rx", "tx";
2060 };
2061 ssiu15: ssiu-13 {
2062 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2063 dma-names = "rx", "tx";
2064 };
2065 ssiu16: ssiu-14 {
2066 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2067 dma-names = "rx", "tx";
2068 };
2069 ssiu17: ssiu-15 {
2070 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2071 dma-names = "rx", "tx";
2072 };
2073 ssiu20: ssiu-16 {
2074 dmas = <&audma0 0x63>, <&audma1 0x64>;
2075 dma-names = "rx", "tx";
2076 };
2077 ssiu21: ssiu-17 {
2078 dmas = <&audma0 0x67>, <&audma1 0x68>;
2079 dma-names = "rx", "tx";
2080 };
2081 ssiu22: ssiu-18 {
2082 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2083 dma-names = "rx", "tx";
2084 };
2085 ssiu23: ssiu-19 {
2086 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2087 dma-names = "rx", "tx";
2088 };
2089 ssiu24: ssiu-20 {
2090 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2091 dma-names = "rx", "tx";
2092 };
2093 ssiu25: ssiu-21 {
2094 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2095 dma-names = "rx", "tx";
2096 };
2097 ssiu26: ssiu-22 {
2098 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2099 dma-names = "rx", "tx";
2100 };
2101 ssiu27: ssiu-23 {
2102 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2103 dma-names = "rx", "tx";
2104 };
2105 ssiu30: ssiu-24 {
2106 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2107 dma-names = "rx", "tx";
2108 };
2109 ssiu31: ssiu-25 {
2110 dmas = <&audma0 0x21>, <&audma1 0x22>;
2111 dma-names = "rx", "tx";
2112 };
2113 ssiu32: ssiu-26 {
2114 dmas = <&audma0 0x23>, <&audma1 0x24>;
2115 dma-names = "rx", "tx";
2116 };
2117 ssiu33: ssiu-27 {
2118 dmas = <&audma0 0x25>, <&audma1 0x26>;
2119 dma-names = "rx", "tx";
2120 };
2121 ssiu34: ssiu-28 {
2122 dmas = <&audma0 0x27>, <&audma1 0x28>;
2123 dma-names = "rx", "tx";
2124 };
2125 ssiu35: ssiu-29 {
2126 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2127 dma-names = "rx", "tx";
2128 };
2129 ssiu36: ssiu-30 {
2130 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2131 dma-names = "rx", "tx";
2132 };
2133 ssiu37: ssiu-31 {
2134 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2135 dma-names = "rx", "tx";
2136 };
2137 ssiu40: ssiu-32 {
2138 dmas = <&audma0 0x71>, <&audma1 0x72>;
2139 dma-names = "rx", "tx";
2140 };
2141 ssiu41: ssiu-33 {
2142 dmas = <&audma0 0x17>, <&audma1 0x18>;
2143 dma-names = "rx", "tx";
2144 };
2145 ssiu42: ssiu-34 {
2146 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2147 dma-names = "rx", "tx";
2148 };
2149 ssiu43: ssiu-35 {
2150 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2151 dma-names = "rx", "tx";
2152 };
2153 ssiu44: ssiu-36 {
2154 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2155 dma-names = "rx", "tx";
2156 };
2157 ssiu45: ssiu-37 {
2158 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2159 dma-names = "rx", "tx";
2160 };
2161 ssiu46: ssiu-38 {
2162 dmas = <&audma0 0x31>, <&audma1 0x32>;
2163 dma-names = "rx", "tx";
2164 };
2165 ssiu47: ssiu-39 {
2166 dmas = <&audma0 0x33>, <&audma1 0x34>;
2167 dma-names = "rx", "tx";
2168 };
2169 ssiu50: ssiu-40 {
2170 dmas = <&audma0 0x73>, <&audma1 0x74>;
2171 dma-names = "rx", "tx";
2172 };
2173 ssiu60: ssiu-41 {
2174 dmas = <&audma0 0x75>, <&audma1 0x76>;
2175 dma-names = "rx", "tx";
2176 };
2177 ssiu70: ssiu-42 {
2178 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2179 dma-names = "rx", "tx";
2180 };
2181 ssiu80: ssiu-43 {
2182 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2183 dma-names = "rx", "tx";
2184 };
2185 ssiu90: ssiu-44 {
2186 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2187 dma-names = "rx", "tx";
2188 };
2189 ssiu91: ssiu-45 {
2190 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2191 dma-names = "rx", "tx";
2192 };
2193 ssiu92: ssiu-46 {
2194 dmas = <&audma0 0x81>, <&audma1 0x82>;
2195 dma-names = "rx", "tx";
2196 };
2197 ssiu93: ssiu-47 {
2198 dmas = <&audma0 0x83>, <&audma1 0x84>;
2199 dma-names = "rx", "tx";
2200 };
2201 ssiu94: ssiu-48 {
2202 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2203 dma-names = "rx", "tx";
2204 };
2205 ssiu95: ssiu-49 {
2206 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2207 dma-names = "rx", "tx";
2208 };
2209 ssiu96: ssiu-50 {
2210 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2211 dma-names = "rx", "tx";
2212 };
2213 ssiu97: ssiu-51 {
2214 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2215 dma-names = "rx", "tx";
2216 };
2217 };
2218 };
2220 audma0: dma-controller@ec700000 {
2221 compatible = "renesas,dmac-r8a7796",
2222 "renesas,rcar-dmac";
2223 reg = <0 0xec700000 0 0x10000>;
2224 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2225 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2226 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2227 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2228 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2229 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2230 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2231 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2232 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2233 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2234 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2235 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2236 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2237 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2238 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2239 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2240 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2241 interrupt-names = "error",
2242 "ch0", "ch1", "ch2", "ch3",
2243 "ch4", "ch5", "ch6", "ch7",
2244 "ch8", "ch9", "ch10", "ch11",
2245 "ch12", "ch13", "ch14", "ch15";
2246 clocks = <&cpg CPG_MOD 502>;
2247 clock-names = "fck";
2248 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2249 resets = <&cpg 502>;
2250 #dma-cells = <1>;
2251 dma-channels = <16>;
2252 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2253 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2254 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2255 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2256 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2257 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2258 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2259 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2260 };
2262 audma1: dma-controller@ec720000 {
2263 compatible = "renesas,dmac-r8a7796",
2264 "renesas,rcar-dmac";
2265 reg = <0 0xec720000 0 0x10000>;
2266 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2267 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2268 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2269 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2270 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2271 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2272 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2273 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2274 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2275 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2276 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2277 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2278 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2279 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2280 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2281 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2282 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2283 interrupt-names = "error",
2284 "ch0", "ch1", "ch2", "ch3",
2285 "ch4", "ch5", "ch6", "ch7",
2286 "ch8", "ch9", "ch10", "ch11",
2287 "ch12", "ch13", "ch14", "ch15";
2288 clocks = <&cpg CPG_MOD 501>;
2289 clock-names = "fck";
2290 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2291 resets = <&cpg 501>;
2292 #dma-cells = <1>;
2293 dma-channels = <16>;
2294 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2295 <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2296 <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2297 <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2298 <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2299 <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2300 <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2301 <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2302 };
2304 xhci0: usb@ee000000 {
2305 compatible = "renesas,xhci-r8a7796",
2306 "renesas,rcar-gen3-xhci";
2307 reg = <0 0xee000000 0 0xc00>;
2308 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2309 clocks = <&cpg CPG_MOD 328>;
2310 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2311 resets = <&cpg 328>;
2312 status = "disabled";
2313 };
2315 usb3_peri0: usb@ee020000 {
2316 compatible = "renesas,r8a7796-usb3-peri",
2317 "renesas,rcar-gen3-usb3-peri";
2318 reg = <0 0xee020000 0 0x400>;
2319 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2320 clocks = <&cpg CPG_MOD 328>;
2321 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2322 resets = <&cpg 328>;
2323 status = "disabled";
2324 };
2326 ohci0: usb@ee080000 {
2327 compatible = "generic-ohci";
2328 reg = <0 0xee080000 0 0x100>;
2329 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2330 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2331 phys = <&usb2_phy0 1>;
2332 phy-names = "usb";
2333 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2334 resets = <&cpg 703>, <&cpg 704>;
2335 status = "disabled";
2336 };
2338 ohci1: usb@ee0a0000 {
2339 compatible = "generic-ohci";
2340 reg = <0 0xee0a0000 0 0x100>;
2341 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2342 clocks = <&cpg CPG_MOD 702>;
2343 phys = <&usb2_phy1 1>;
2344 phy-names = "usb";
2345 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2346 resets = <&cpg 702>;
2347 status = "disabled";
2348 };
2350 ehci0: usb@ee080100 {
2351 compatible = "generic-ehci";
2352 reg = <0 0xee080100 0 0x100>;
2353 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2354 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2355 phys = <&usb2_phy0 2>;
2356 phy-names = "usb";
2357 companion = <&ohci0>;
2358 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2359 resets = <&cpg 703>, <&cpg 704>;
2360 status = "disabled";
2361 };
2363 ehci1: usb@ee0a0100 {
2364 compatible = "generic-ehci";
2365 reg = <0 0xee0a0100 0 0x100>;
2366 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2367 clocks = <&cpg CPG_MOD 702>;
2368 phys = <&usb2_phy1 2>;
2369 phy-names = "usb";
2370 companion = <&ohci1>;
2371 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2372 resets = <&cpg 702>;
2373 status = "disabled";
2374 };
2376 usb2_phy0: usb-phy@ee080200 {
2377 compatible = "renesas,usb2-phy-r8a7796",
2378 "renesas,rcar-gen3-usb2-phy";
2379 reg = <0 0xee080200 0 0x700>;
2380 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2381 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2382 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2383 resets = <&cpg 703>, <&cpg 704>;
2384 #phy-cells = <1>;
2385 status = "disabled";
2386 };
2388 usb2_phy1: usb-phy@ee0a0200 {
2389 compatible = "renesas,usb2-phy-r8a7796",
2390 "renesas,rcar-gen3-usb2-phy";
2391 reg = <0 0xee0a0200 0 0x700>;
2392 clocks = <&cpg CPG_MOD 702>;
2393 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2394 resets = <&cpg 702>;
2395 #phy-cells = <1>;
2396 status = "disabled";
2397 };
2399 sdhi0: mmc@ee100000 {
2400 compatible = "renesas,sdhi-r8a7796",
2401 "renesas,rcar-gen3-sdhi";
2402 reg = <0 0xee100000 0 0x2000>;
2403 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2404 clocks = <&cpg CPG_MOD 314>;
2405 max-frequency = <200000000>;
2406 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2407 resets = <&cpg 314>;
2408 iommus = <&ipmmu_ds1 32>;
2409 status = "disabled";
2410 };
2412 sdhi1: mmc@ee120000 {
2413 compatible = "renesas,sdhi-r8a7796",
2414 "renesas,rcar-gen3-sdhi";
2415 reg = <0 0xee120000 0 0x2000>;
2416 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2417 clocks = <&cpg CPG_MOD 313>;
2418 max-frequency = <200000000>;
2419 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2420 resets = <&cpg 313>;
2421 iommus = <&ipmmu_ds1 33>;
2422 status = "disabled";
2423 };
2425 sdhi2: mmc@ee140000 {
2426 compatible = "renesas,sdhi-r8a7796",
2427 "renesas,rcar-gen3-sdhi";
2428 reg = <0 0xee140000 0 0x2000>;
2429 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2430 clocks = <&cpg CPG_MOD 312>;
2431 max-frequency = <200000000>;
2432 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2433 resets = <&cpg 312>;
2434 iommus = <&ipmmu_ds1 34>;
2435 status = "disabled";
2436 };
2438 sdhi3: mmc@ee160000 {
2439 compatible = "renesas,sdhi-r8a7796",
2440 "renesas,rcar-gen3-sdhi";
2441 reg = <0 0xee160000 0 0x2000>;
2442 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2443 clocks = <&cpg CPG_MOD 311>;
2444 max-frequency = <200000000>;
2445 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2446 resets = <&cpg 311>;
2447 iommus = <&ipmmu_ds1 35>;
2448 status = "disabled";
2449 };
2451 gic: interrupt-controller@f1010000 {
2452 compatible = "arm,gic-400";
2453 #interrupt-cells = <3>;
2454 #address-cells = <0>;
2455 interrupt-controller;
2456 reg = <0x0 0xf1010000 0 0x1000>,
2457 <0x0 0xf1020000 0 0x20000>,
2458 <0x0 0xf1040000 0 0x20000>,
2459 <0x0 0xf1060000 0 0x20000>;
2460 interrupts = <GIC_PPI 9
2461 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2462 clocks = <&cpg CPG_MOD 408>;
2463 clock-names = "clk";
2464 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2465 resets = <&cpg 408>;
2466 };
2468 pciec0: pcie@fe000000 {
2469 compatible = "renesas,pcie-r8a7796",
2470 "renesas,pcie-rcar-gen3";
2471 reg = <0 0xfe000000 0 0x80000>;
2472 #address-cells = <3>;
2473 #size-cells = <2>;
2474 bus-range = <0x00 0xff>;
2475 device_type = "pci";
2476 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2477 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2478 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2479 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2480 /* Map all possible DDR as inbound ranges */
2481 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2482 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2483 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2484 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2485 #interrupt-cells = <1>;
2486 interrupt-map-mask = <0 0 0 0>;
2487 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2488 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2489 clock-names = "pcie", "pcie_bus";
2490 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2491 resets = <&cpg 319>;
2492 status = "disabled";
2493 };
2495 pciec1: pcie@ee800000 {
2496 compatible = "renesas,pcie-r8a7796",
2497 "renesas,pcie-rcar-gen3";
2498 reg = <0 0xee800000 0 0x80000>;
2499 #address-cells = <3>;
2500 #size-cells = <2>;
2501 bus-range = <0x00 0xff>;
2502 device_type = "pci";
2503 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2504 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2505 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2506 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2507 /* Map all possible DDR as inbound ranges */
2508 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2509 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2510 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2511 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2512 #interrupt-cells = <1>;
2513 interrupt-map-mask = <0 0 0 0>;
2514 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2515 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2516 clock-names = "pcie", "pcie_bus";
2517 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2518 resets = <&cpg 318>;
2519 status = "disabled";
2520 };
2522 imr-lx4@fe860000 {
2523 compatible = "renesas,r8a7796-imr-lx4",
2524 "renesas,imr-lx4";
2525 reg = <0 0xfe860000 0 0x2000>;
2526 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2527 clocks = <&cpg CPG_MOD 823>;
2528 power-domains = <&sysc R8A7796_PD_A3VC>;
2529 resets = <&cpg 823>;
2530 };
2532 imr-lx4@fe870000 {
2533 compatible = "renesas,r8a7796-imr-lx4",
2534 "renesas,imr-lx4";
2535 reg = <0 0xfe870000 0 0x2000>;
2536 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2537 clocks = <&cpg CPG_MOD 822>;
2538 power-domains = <&sysc R8A7796_PD_A3VC>;
2539 resets = <&cpg 822>;
2540 };
2542 fdp1@fe940000 {
2543 compatible = "renesas,fdp1";
2544 reg = <0 0xfe940000 0 0x2400>;
2545 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2546 clocks = <&cpg CPG_MOD 119>;
2547 power-domains = <&sysc R8A7796_PD_A3VC>;
2548 resets = <&cpg 119>;
2549 renesas,fcp = <&fcpf0>;
2550 };
2552 fcpf0: fcp@fe950000 {
2553 compatible = "renesas,fcpf";
2554 reg = <0 0xfe950000 0 0x200>;
2555 clocks = <&cpg CPG_MOD 615>;
2556 power-domains = <&sysc R8A7796_PD_A3VC>;
2557 resets = <&cpg 615>;
2558 };
2560 fcpvb0: fcp@fe96f000 {
2561 compatible = "renesas,fcpv";
2562 reg = <0 0xfe96f000 0 0x200>;
2563 clocks = <&cpg CPG_MOD 607>;
2564 power-domains = <&sysc R8A7796_PD_A3VC>;
2565 resets = <&cpg 607>;
2566 };
2568 fcpvi0: fcp@fe9af000 {
2569 compatible = "renesas,fcpv";
2570 reg = <0 0xfe9af000 0 0x200>;
2571 clocks = <&cpg CPG_MOD 611>;
2572 power-domains = <&sysc R8A7796_PD_A3VC>;
2573 resets = <&cpg 611>;
2574 iommus = <&ipmmu_vc0 19>;
2575 };
2577 fcpvd0: fcp@fea27000 {
2578 compatible = "renesas,fcpv";
2579 reg = <0 0xfea27000 0 0x200>;
2580 clocks = <&cpg CPG_MOD 603>;
2581 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2582 resets = <&cpg 603>;
2583 iommus = <&ipmmu_vi0 8>;
2584 };
2586 fcpvd1: fcp@fea2f000 {
2587 compatible = "renesas,fcpv";
2588 reg = <0 0xfea2f000 0 0x200>;
2589 clocks = <&cpg CPG_MOD 602>;
2590 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2591 resets = <&cpg 602>;
2592 iommus = <&ipmmu_vi0 9>;
2593 };
2595 fcpvd2: fcp@fea37000 {
2596 compatible = "renesas,fcpv";
2597 reg = <0 0xfea37000 0 0x200>;
2598 clocks = <&cpg CPG_MOD 601>;
2599 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2600 resets = <&cpg 601>;
2601 iommus = <&ipmmu_vi0 10>;
2602 };
2604 vspb: vsp@fe960000 {
2605 compatible = "renesas,vsp2";
2606 reg = <0 0xfe960000 0 0x8000>;
2607 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2608 clocks = <&cpg CPG_MOD 626>;
2609 power-domains = <&sysc R8A7796_PD_A3VC>;
2610 resets = <&cpg 626>;
2612 renesas,fcp = <&fcpvb0>;
2613 };
2615 vspd0: vsp@fea20000 {
2616 compatible = "renesas,vsp2";
2617 reg = <0 0xfea20000 0 0x5000>;
2618 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2619 clocks = <&cpg CPG_MOD 623>;
2620 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2621 resets = <&cpg 623>;
2623 renesas,fcp = <&fcpvd0>;
2624 };
2626 vspd1: vsp@fea28000 {
2627 compatible = "renesas,vsp2";
2628 reg = <0 0xfea28000 0 0x5000>;
2629 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2630 clocks = <&cpg CPG_MOD 622>;
2631 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2632 resets = <&cpg 622>;
2634 renesas,fcp = <&fcpvd1>;
2635 };
2637 vspd2: vsp@fea30000 {
2638 compatible = "renesas,vsp2";
2639 reg = <0 0xfea30000 0 0x5000>;
2640 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2641 clocks = <&cpg CPG_MOD 621>;
2642 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2643 resets = <&cpg 621>;
2645 renesas,fcp = <&fcpvd2>;
2646 };
2648 vspi0: vsp@fe9a0000 {
2649 compatible = "renesas,vsp2";
2650 reg = <0 0xfe9a0000 0 0x8000>;
2651 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2652 clocks = <&cpg CPG_MOD 631>;
2653 power-domains = <&sysc R8A7796_PD_A3VC>;
2654 resets = <&cpg 631>;
2656 renesas,fcp = <&fcpvi0>;
2657 };
2659 cmm0: cmm@fea40000 {
2660 compatible = "renesas,r8a7796-cmm",
2661 "renesas,rcar-gen3-cmm";
2662 reg = <0 0xfea40000 0 0x1000>;
2663 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2664 clocks = <&cpg CPG_MOD 711>;
2665 resets = <&cpg 711>;
2666 };
2668 cmm1: cmm@fea50000 {
2669 compatible = "renesas,r8a7796-cmm",
2670 "renesas,rcar-gen3-cmm";
2671 reg = <0 0xfea50000 0 0x1000>;
2672 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2673 clocks = <&cpg CPG_MOD 710>;
2674 resets = <&cpg 710>;
2675 };
2677 cmm2: cmm@fea60000 {
2678 compatible = "renesas,r8a7796-cmm",
2679 "renesas,rcar-gen3-cmm";
2680 reg = <0 0xfea60000 0 0x1000>;
2681 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2682 clocks = <&cpg CPG_MOD 709>;
2683 resets = <&cpg 709>;
2684 };
2686 csi20: csi2@fea80000 {
2687 compatible = "renesas,r8a7796-csi2";
2688 reg = <0 0xfea80000 0 0x10000>;
2689 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2690 clocks = <&cpg CPG_MOD 714>;
2691 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2692 resets = <&cpg 714>;
2693 status = "disabled";
2695 ports {
2696 #address-cells = <1>;
2697 #size-cells = <0>;
2699 port@1 {
2700 #address-cells = <1>;
2701 #size-cells = <0>;
2703 reg = <1>;
2705 csi20vin0: endpoint@0 {
2706 reg = <0>;
2707 remote-endpoint = <&vin0csi20>;
2708 };
2709 csi20vin1: endpoint@1 {
2710 reg = <1>;
2711 remote-endpoint = <&vin1csi20>;
2712 };
2713 csi20vin2: endpoint@2 {
2714 reg = <2>;
2715 remote-endpoint = <&vin2csi20>;
2716 };
2717 csi20vin3: endpoint@3 {
2718 reg = <3>;
2719 remote-endpoint = <&vin3csi20>;
2720 };
2721 csi20vin4: endpoint@4 {
2722 reg = <4>;
2723 remote-endpoint = <&vin4csi20>;
2724 };
2725 csi20vin5: endpoint@5 {
2726 reg = <5>;
2727 remote-endpoint = <&vin5csi20>;
2728 };
2729 csi20vin6: endpoint@6 {
2730 reg = <6>;
2731 remote-endpoint = <&vin6csi20>;
2732 };
2733 csi20vin7: endpoint@7 {
2734 reg = <7>;
2735 remote-endpoint = <&vin7csi20>;
2736 };
2737 };
2738 };
2739 };
2741 csi40: csi2@feaa0000 {
2742 compatible = "renesas,r8a7796-csi2";
2743 reg = <0 0xfeaa0000 0 0x10000>;
2744 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2745 clocks = <&cpg CPG_MOD 716>;
2746 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2747 resets = <&cpg 716>;
2748 status = "disabled";
2750 ports {
2751 #address-cells = <1>;
2752 #size-cells = <0>;
2754 port@1 {
2755 #address-cells = <1>;
2756 #size-cells = <0>;
2758 reg = <1>;
2760 csi40vin0: endpoint@0 {
2761 reg = <0>;
2762 remote-endpoint = <&vin0csi40>;
2763 };
2764 csi40vin1: endpoint@1 {
2765 reg = <1>;
2766 remote-endpoint = <&vin1csi40>;
2767 };
2768 csi40vin2: endpoint@2 {
2769 reg = <2>;
2770 remote-endpoint = <&vin2csi40>;
2771 };
2772 csi40vin3: endpoint@3 {
2773 reg = <3>;
2774 remote-endpoint = <&vin3csi40>;
2775 };
2776 csi40vin4: endpoint@4 {
2777 reg = <4>;
2778 remote-endpoint = <&vin4csi40>;
2779 };
2780 csi40vin5: endpoint@5 {
2781 reg = <5>;
2782 remote-endpoint = <&vin5csi40>;
2783 };
2784 csi40vin6: endpoint@6 {
2785 reg = <6>;
2786 remote-endpoint = <&vin6csi40>;
2787 };
2788 csi40vin7: endpoint@7 {
2789 reg = <7>;
2790 remote-endpoint = <&vin7csi40>;
2791 };
2792 };
2794 };
2795 };
2797 hdmi0: hdmi@fead0000 {
2798 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
2799 reg = <0 0xfead0000 0 0x10000>;
2800 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2801 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2802 clock-names = "iahb", "isfr";
2803 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2804 resets = <&cpg 729>;
2805 status = "disabled";
2807 ports {
2808 #address-cells = <1>;
2809 #size-cells = <0>;
2810 port@0 {
2811 reg = <0>;
2812 dw_hdmi0_in: endpoint {
2813 remote-endpoint = <&du_out_hdmi0>;
2814 };
2815 };
2816 port@1 {
2817 reg = <1>;
2818 };
2819 port@2 {
2820 /* HDMI sound */
2821 reg = <2>;
2822 };
2823 };
2824 };
2826 du: display@feb00000 {
2827 compatible = "renesas,du-r8a7796";
2828 reg = <0 0xfeb00000 0 0x70000>;
2829 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2830 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2831 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2832 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2833 <&cpg CPG_MOD 722>;
2834 clock-names = "du.0", "du.1", "du.2";
2835 resets = <&cpg 724>, <&cpg 722>;
2836 reset-names = "du.0", "du.2";
2838 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
2839 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2841 status = "disabled";
2843 ports {
2844 #address-cells = <1>;
2845 #size-cells = <0>;
2847 port@0 {
2848 reg = <0>;
2849 du_out_rgb: endpoint {
2850 };
2851 };
2852 port@1 {
2853 reg = <1>;
2854 du_out_hdmi0: endpoint {
2855 remote-endpoint = <&dw_hdmi0_in>;
2856 };
2857 };
2858 port@2 {
2859 reg = <2>;
2860 du_out_lvds0: endpoint {
2861 remote-endpoint = <&lvds0_in>;
2862 };
2863 };
2864 };
2865 };
2867 lvds0: lvds@feb90000 {
2868 compatible = "renesas,r8a7796-lvds";
2869 reg = <0 0xfeb90000 0 0x14>;
2870 clocks = <&cpg CPG_MOD 727>;
2871 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2872 resets = <&cpg 727>;
2873 status = "disabled";
2875 ports {
2876 #address-cells = <1>;
2877 #size-cells = <0>;
2879 port@0 {
2880 reg = <0>;
2881 lvds0_in: endpoint {
2882 remote-endpoint = <&du_out_lvds0>;
2883 };
2884 };
2885 port@1 {
2886 reg = <1>;
2887 lvds0_out: endpoint {
2888 };
2889 };
2890 };
2891 };
2893 prr: chipid@fff00044 {
2894 compatible = "renesas,prr";
2895 reg = <0 0xfff00044 0 4>;
2896 };
2897 };
2899 thermal-zones {
2900 sensor_thermal1: sensor-thermal1 {
2901 polling-delay-passive = <250>;
2902 polling-delay = <1000>;
2903 thermal-sensors = <&tsc 0>;
2904 sustainable-power = <3874>;
2906 trips {
2907 sensor1_crit: sensor1-crit {
2908 temperature = <120000>;
2909 hysteresis = <1000>;
2910 type = "critical";
2911 };
2912 };
2913 };
2915 sensor_thermal2: sensor-thermal2 {
2916 polling-delay-passive = <250>;
2917 polling-delay = <1000>;
2918 thermal-sensors = <&tsc 1>;
2919 sustainable-power = <3874>;
2921 trips {
2922 sensor2_crit: sensor2-crit {
2923 temperature = <120000>;
2924 hysteresis = <1000>;
2925 type = "critical";
2926 };
2927 };
2928 };
2930 sensor_thermal3: sensor-thermal3 {
2931 polling-delay-passive = <250>;
2932 polling-delay = <1000>;
2933 thermal-sensors = <&tsc 2>;
2934 sustainable-power = <3874>;
2936 cooling-maps {
2937 map0 {
2938 trip = <&target>;
2939 cooling-device = <&a57_0 2 4>;
2940 contribution = <1024>;
2941 };
2942 map1 {
2943 trip = <&target>;
2944 cooling-device = <&a53_0 0 2>;
2945 contribution = <1024>;
2946 };
2947 };
2948 trips {
2949 target: trip-point1 {
2950 temperature = <100000>;
2951 hysteresis = <1000>;
2952 type = "passive";
2953 };
2955 sensor3_crit: sensor3-crit {
2956 temperature = <120000>;
2957 hysteresis = <1000>;
2958 type = "critical";
2959 };
2960 };
2961 };
2962 };
2964 timer {
2965 compatible = "arm,armv8-timer";
2966 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2967 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2968 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2969 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2970 };
2972 /* External USB clocks - can be overridden by the board */
2973 usb3s0_clk: usb3s0 {
2974 compatible = "fixed-clock";
2975 #clock-cells = <0>;
2976 clock-frequency = <0>;
2977 };
2979 usb_extal_clk: usb_extal {
2980 compatible = "fixed-clock";
2981 #clock-cells = <0>;
2982 clock-frequency = <0>;
2983 };
2984 };