| blob | 4a913df17b1dc2196758dff9fec6931d765ad8ee |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
17 / {
18 compatible = "renesas,r8a77965";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
30 i2c7 = &i2c_dvfs;
31 };
33 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clk_a: audio_clk_a {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
44 audio_clk_b: audio_clk_b {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
50 audio_clk_c: audio_clk_c {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
56 /* External CAN clock - to be overridden by boards that provide it */
57 can_clk: can {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
61 };
63 cluster0_opp: opp_table0 {
64 compatible = "operating-points-v2";
65 opp-shared;
67 opp-500000000 {
68 opp-hz = /bits/ 64 <500000000>;
69 opp-microvolt = <830000>;
70 clock-latency-ns = <300000>;
71 };
72 opp-1000000000 {
73 opp-hz = /bits/ 64 <1000000000>;
74 opp-microvolt = <830000>;
75 clock-latency-ns = <300000>;
76 };
77 opp-1500000000 {
78 opp-hz = /bits/ 64 <1500000000>;
79 opp-microvolt = <830000>;
80 clock-latency-ns = <300000>;
81 opp-suspend;
82 };
83 opp-1600000000 {
84 opp-hz = /bits/ 64 <1600000000>;
85 opp-microvolt = <900000>;
86 clock-latency-ns = <300000>;
87 turbo-mode;
88 };
89 opp-1700000000 {
90 opp-hz = /bits/ 64 <1700000000>;
91 opp-microvolt = <900000>;
92 clock-latency-ns = <300000>;
93 turbo-mode;
94 };
95 opp-1800000000 {
96 opp-hz = /bits/ 64 <1800000000>;
97 opp-microvolt = <960000>;
98 clock-latency-ns = <300000>;
99 turbo-mode;
100 };
101 };
103 cpus {
104 #address-cells = <1>;
105 #size-cells = <0>;
107 a57_0: cpu@0 {
108 compatible = "arm,cortex-a57";
109 reg = <0x0>;
110 device_type = "cpu";
111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
112 next-level-cache = <&L2_CA57>;
113 enable-method = "psci";
114 cpu-idle-states = <&CPU_SLEEP_0>;
115 #cooling-cells = <2>;
116 dynamic-power-coefficient = <854>;
117 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
118 operating-points-v2 = <&cluster0_opp>;
119 };
121 a57_1: cpu@1 {
122 compatible = "arm,cortex-a57";
123 reg = <0x1>;
124 device_type = "cpu";
125 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
126 next-level-cache = <&L2_CA57>;
127 enable-method = "psci";
128 cpu-idle-states = <&CPU_SLEEP_0>;
129 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
130 operating-points-v2 = <&cluster0_opp>;
131 };
133 L2_CA57: cache-controller-0 {
134 compatible = "cache";
135 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
136 cache-unified;
137 cache-level = <2>;
138 };
140 idle-states {
141 entry-method = "psci";
143 CPU_SLEEP_0: cpu-sleep-0 {
144 compatible = "arm,idle-state";
145 arm,psci-suspend-param = <0x0010000>;
146 local-timer-stop;
147 entry-latency-us = <400>;
148 exit-latency-us = <500>;
149 min-residency-us = <4000>;
150 };
151 };
152 };
154 extal_clk: extal {
155 compatible = "fixed-clock";
156 #clock-cells = <0>;
157 /* This value must be overridden by the board */
158 clock-frequency = <0>;
159 };
161 extalr_clk: extalr {
162 compatible = "fixed-clock";
163 #clock-cells = <0>;
164 /* This value must be overridden by the board */
165 clock-frequency = <0>;
166 };
168 /* External PCIe clock - can be overridden by the board */
169 pcie_bus_clk: pcie_bus {
170 compatible = "fixed-clock";
171 #clock-cells = <0>;
172 clock-frequency = <0>;
173 };
175 pmu_a57 {
176 compatible = "arm,cortex-a57-pmu";
177 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
178 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
179 interrupt-affinity = <&a57_0>,
180 <&a57_1>;
181 };
183 psci {
184 compatible = "arm,psci-1.0", "arm,psci-0.2";
185 method = "smc";
186 };
188 /* External SCIF clock - to be overridden by boards that provide it */
189 scif_clk: scif {
190 compatible = "fixed-clock";
191 #clock-cells = <0>;
192 clock-frequency = <0>;
193 };
195 soc {
196 compatible = "simple-bus";
197 interrupt-parent = <&gic>;
198 #address-cells = <2>;
199 #size-cells = <2>;
200 ranges;
202 rwdt: watchdog@e6020000 {
203 compatible = "renesas,r8a77965-wdt",
204 "renesas,rcar-gen3-wdt";
205 reg = <0 0xe6020000 0 0x0c>;
206 clocks = <&cpg CPG_MOD 402>;
207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
208 resets = <&cpg 402>;
209 status = "disabled";
210 };
212 gpio0: gpio@e6050000 {
213 compatible = "renesas,gpio-r8a77965",
214 "renesas,rcar-gen3-gpio";
215 reg = <0 0xe6050000 0 0x50>;
216 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
217 #gpio-cells = <2>;
218 gpio-controller;
219 gpio-ranges = <&pfc 0 0 16>;
220 #interrupt-cells = <2>;
221 interrupt-controller;
222 clocks = <&cpg CPG_MOD 912>;
223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
224 resets = <&cpg 912>;
225 };
227 gpio1: gpio@e6051000 {
228 compatible = "renesas,gpio-r8a77965",
229 "renesas,rcar-gen3-gpio";
230 reg = <0 0xe6051000 0 0x50>;
231 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
232 #gpio-cells = <2>;
233 gpio-controller;
234 gpio-ranges = <&pfc 0 32 29>;
235 #interrupt-cells = <2>;
236 interrupt-controller;
237 clocks = <&cpg CPG_MOD 911>;
238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
239 resets = <&cpg 911>;
240 };
242 gpio2: gpio@e6052000 {
243 compatible = "renesas,gpio-r8a77965",
244 "renesas,rcar-gen3-gpio";
245 reg = <0 0xe6052000 0 0x50>;
246 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
247 #gpio-cells = <2>;
248 gpio-controller;
249 gpio-ranges = <&pfc 0 64 15>;
250 #interrupt-cells = <2>;
251 interrupt-controller;
252 clocks = <&cpg CPG_MOD 910>;
253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
254 resets = <&cpg 910>;
255 };
257 gpio3: gpio@e6053000 {
258 compatible = "renesas,gpio-r8a77965",
259 "renesas,rcar-gen3-gpio";
260 reg = <0 0xe6053000 0 0x50>;
261 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
262 #gpio-cells = <2>;
263 gpio-controller;
264 gpio-ranges = <&pfc 0 96 16>;
265 #interrupt-cells = <2>;
266 interrupt-controller;
267 clocks = <&cpg CPG_MOD 909>;
268 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
269 resets = <&cpg 909>;
270 };
272 gpio4: gpio@e6054000 {
273 compatible = "renesas,gpio-r8a77965",
274 "renesas,rcar-gen3-gpio";
275 reg = <0 0xe6054000 0 0x50>;
276 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
277 #gpio-cells = <2>;
278 gpio-controller;
279 gpio-ranges = <&pfc 0 128 18>;
280 #interrupt-cells = <2>;
281 interrupt-controller;
282 clocks = <&cpg CPG_MOD 908>;
283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
284 resets = <&cpg 908>;
285 };
287 gpio5: gpio@e6055000 {
288 compatible = "renesas,gpio-r8a77965",
289 "renesas,rcar-gen3-gpio";
290 reg = <0 0xe6055000 0 0x50>;
291 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
292 #gpio-cells = <2>;
293 gpio-controller;
294 gpio-ranges = <&pfc 0 160 26>;
295 #interrupt-cells = <2>;
296 interrupt-controller;
297 clocks = <&cpg CPG_MOD 907>;
298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
299 resets = <&cpg 907>;
300 };
302 gpio6: gpio@e6055400 {
303 compatible = "renesas,gpio-r8a77965",
304 "renesas,rcar-gen3-gpio";
305 reg = <0 0xe6055400 0 0x50>;
306 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
307 #gpio-cells = <2>;
308 gpio-controller;
309 gpio-ranges = <&pfc 0 192 32>;
310 #interrupt-cells = <2>;
311 interrupt-controller;
312 clocks = <&cpg CPG_MOD 906>;
313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
314 resets = <&cpg 906>;
315 };
317 gpio7: gpio@e6055800 {
318 compatible = "renesas,gpio-r8a77965",
319 "renesas,rcar-gen3-gpio";
320 reg = <0 0xe6055800 0 0x50>;
321 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
322 #gpio-cells = <2>;
323 gpio-controller;
324 gpio-ranges = <&pfc 0 224 4>;
325 #interrupt-cells = <2>;
326 interrupt-controller;
327 clocks = <&cpg CPG_MOD 905>;
328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
329 resets = <&cpg 905>;
330 };
332 pfc: pinctrl@e6060000 {
333 compatible = "renesas,pfc-r8a77965";
334 reg = <0 0xe6060000 0 0x50c>;
335 };
337 cmt0: timer@e60f0000 {
338 compatible = "renesas,r8a77965-cmt0",
339 "renesas,rcar-gen3-cmt0";
340 reg = <0 0xe60f0000 0 0x1004>;
341 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
342 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
343 clocks = <&cpg CPG_MOD 303>;
344 clock-names = "fck";
345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
346 resets = <&cpg 303>;
347 status = "disabled";
348 };
350 cmt1: timer@e6130000 {
351 compatible = "renesas,r8a77965-cmt1",
352 "renesas,rcar-gen3-cmt1";
353 reg = <0 0xe6130000 0 0x1004>;
354 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
357 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
358 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
359 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
362 clocks = <&cpg CPG_MOD 302>;
363 clock-names = "fck";
364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
365 resets = <&cpg 302>;
366 status = "disabled";
367 };
369 cmt2: timer@e6140000 {
370 compatible = "renesas,r8a77965-cmt1",
371 "renesas,rcar-gen3-cmt1";
372 reg = <0 0xe6140000 0 0x1004>;
373 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
374 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
375 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
376 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
377 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
378 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
379 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
380 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
381 clocks = <&cpg CPG_MOD 301>;
382 clock-names = "fck";
383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
384 resets = <&cpg 301>;
385 status = "disabled";
386 };
388 cmt3: timer@e6148000 {
389 compatible = "renesas,r8a77965-cmt1",
390 "renesas,rcar-gen3-cmt1";
391 reg = <0 0xe6148000 0 0x1004>;
392 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
393 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
394 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
395 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
396 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
397 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
398 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
399 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
400 clocks = <&cpg CPG_MOD 300>;
401 clock-names = "fck";
402 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
403 resets = <&cpg 300>;
404 status = "disabled";
405 };
407 cpg: clock-controller@e6150000 {
408 compatible = "renesas,r8a77965-cpg-mssr";
409 reg = <0 0xe6150000 0 0x1000>;
410 clocks = <&extal_clk>, <&extalr_clk>;
411 clock-names = "extal", "extalr";
412 #clock-cells = <2>;
413 #power-domain-cells = <0>;
414 #reset-cells = <1>;
415 };
417 rst: reset-controller@e6160000 {
418 compatible = "renesas,r8a77965-rst";
419 reg = <0 0xe6160000 0 0x0200>;
420 };
422 sysc: system-controller@e6180000 {
423 compatible = "renesas,r8a77965-sysc";
424 reg = <0 0xe6180000 0 0x0400>;
425 #power-domain-cells = <1>;
426 };
428 tsc: thermal@e6198000 {
429 compatible = "renesas,r8a77965-thermal";
430 reg = <0 0xe6198000 0 0x100>,
431 <0 0xe61a0000 0 0x100>,
432 <0 0xe61a8000 0 0x100>;
433 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
434 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
435 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
436 clocks = <&cpg CPG_MOD 522>;
437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
438 resets = <&cpg 522>;
439 #thermal-sensor-cells = <1>;
440 };
442 intc_ex: interrupt-controller@e61c0000 {
443 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
444 #interrupt-cells = <2>;
445 interrupt-controller;
446 reg = <0 0xe61c0000 0 0x200>;
447 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
448 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
449 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
452 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
453 clocks = <&cpg CPG_MOD 407>;
454 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
455 resets = <&cpg 407>;
456 };
458 i2c0: i2c@e6500000 {
459 #address-cells = <1>;
460 #size-cells = <0>;
461 compatible = "renesas,i2c-r8a77965",
462 "renesas,rcar-gen3-i2c";
463 reg = <0 0xe6500000 0 0x40>;
464 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&cpg CPG_MOD 931>;
466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
467 resets = <&cpg 931>;
468 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
469 <&dmac2 0x91>, <&dmac2 0x90>;
470 dma-names = "tx", "rx", "tx", "rx";
471 i2c-scl-internal-delay-ns = <110>;
472 status = "disabled";
473 };
475 i2c1: i2c@e6508000 {
476 #address-cells = <1>;
477 #size-cells = <0>;
478 compatible = "renesas,i2c-r8a77965",
479 "renesas,rcar-gen3-i2c";
480 reg = <0 0xe6508000 0 0x40>;
481 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&cpg CPG_MOD 930>;
483 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
484 resets = <&cpg 930>;
485 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
486 <&dmac2 0x93>, <&dmac2 0x92>;
487 dma-names = "tx", "rx", "tx", "rx";
488 i2c-scl-internal-delay-ns = <6>;
489 status = "disabled";
490 };
492 i2c2: i2c@e6510000 {
493 #address-cells = <1>;
494 #size-cells = <0>;
495 compatible = "renesas,i2c-r8a77965",
496 "renesas,rcar-gen3-i2c";
497 reg = <0 0xe6510000 0 0x40>;
498 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&cpg CPG_MOD 929>;
500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
501 resets = <&cpg 929>;
502 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
503 <&dmac2 0x95>, <&dmac2 0x94>;
504 dma-names = "tx", "rx", "tx", "rx";
505 i2c-scl-internal-delay-ns = <6>;
506 status = "disabled";
507 };
509 i2c3: i2c@e66d0000 {
510 #address-cells = <1>;
511 #size-cells = <0>;
512 compatible = "renesas,i2c-r8a77965",
513 "renesas,rcar-gen3-i2c";
514 reg = <0 0xe66d0000 0 0x40>;
515 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
516 clocks = <&cpg CPG_MOD 928>;
517 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
518 resets = <&cpg 928>;
519 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
520 dma-names = "tx", "rx";
521 i2c-scl-internal-delay-ns = <110>;
522 status = "disabled";
523 };
525 i2c4: i2c@e66d8000 {
526 #address-cells = <1>;
527 #size-cells = <0>;
528 compatible = "renesas,i2c-r8a77965",
529 "renesas,rcar-gen3-i2c";
530 reg = <0 0xe66d8000 0 0x40>;
531 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
532 clocks = <&cpg CPG_MOD 927>;
533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
534 resets = <&cpg 927>;
535 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
536 dma-names = "tx", "rx";
537 i2c-scl-internal-delay-ns = <110>;
538 status = "disabled";
539 };
541 i2c5: i2c@e66e0000 {
542 #address-cells = <1>;
543 #size-cells = <0>;
544 compatible = "renesas,i2c-r8a77965",
545 "renesas,rcar-gen3-i2c";
546 reg = <0 0xe66e0000 0 0x40>;
547 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
548 clocks = <&cpg CPG_MOD 919>;
549 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
550 resets = <&cpg 919>;
551 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
552 dma-names = "tx", "rx";
553 i2c-scl-internal-delay-ns = <110>;
554 status = "disabled";
555 };
557 i2c6: i2c@e66e8000 {
558 #address-cells = <1>;
559 #size-cells = <0>;
560 compatible = "renesas,i2c-r8a77965",
561 "renesas,rcar-gen3-i2c";
562 reg = <0 0xe66e8000 0 0x40>;
563 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
564 clocks = <&cpg CPG_MOD 918>;
565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
566 resets = <&cpg 918>;
567 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
568 dma-names = "tx", "rx";
569 i2c-scl-internal-delay-ns = <6>;
570 status = "disabled";
571 };
573 i2c_dvfs: i2c@e60b0000 {
574 #address-cells = <1>;
575 #size-cells = <0>;
576 compatible = "renesas,iic-r8a77965",
577 "renesas,rcar-gen3-iic",
578 "renesas,rmobile-iic";
579 reg = <0 0xe60b0000 0 0x425>;
580 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&cpg CPG_MOD 926>;
582 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
583 resets = <&cpg 926>;
584 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
585 dma-names = "tx", "rx";
586 status = "disabled";
587 };
589 hscif0: serial@e6540000 {
590 compatible = "renesas,hscif-r8a77965",
591 "renesas,rcar-gen3-hscif",
592 "renesas,hscif";
593 reg = <0 0xe6540000 0 0x60>;
594 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
595 clocks = <&cpg CPG_MOD 520>,
596 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
597 <&scif_clk>;
598 clock-names = "fck", "brg_int", "scif_clk";
599 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
600 <&dmac2 0x31>, <&dmac2 0x30>;
601 dma-names = "tx", "rx", "tx", "rx";
602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
603 resets = <&cpg 520>;
604 status = "disabled";
605 };
607 hscif1: serial@e6550000 {
608 compatible = "renesas,hscif-r8a77965",
609 "renesas,rcar-gen3-hscif",
610 "renesas,hscif";
611 reg = <0 0xe6550000 0 0x60>;
612 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&cpg CPG_MOD 519>,
614 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
615 <&scif_clk>;
616 clock-names = "fck", "brg_int", "scif_clk";
617 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
618 <&dmac2 0x33>, <&dmac2 0x32>;
619 dma-names = "tx", "rx", "tx", "rx";
620 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
621 resets = <&cpg 519>;
622 status = "disabled";
623 };
625 hscif2: serial@e6560000 {
626 compatible = "renesas,hscif-r8a77965",
627 "renesas,rcar-gen3-hscif",
628 "renesas,hscif";
629 reg = <0 0xe6560000 0 0x60>;
630 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&cpg CPG_MOD 518>,
632 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
633 <&scif_clk>;
634 clock-names = "fck", "brg_int", "scif_clk";
635 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
636 <&dmac2 0x35>, <&dmac2 0x34>;
637 dma-names = "tx", "rx", "tx", "rx";
638 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
639 resets = <&cpg 518>;
640 status = "disabled";
641 };
643 hscif3: serial@e66a0000 {
644 compatible = "renesas,hscif-r8a77965",
645 "renesas,rcar-gen3-hscif",
646 "renesas,hscif";
647 reg = <0 0xe66a0000 0 0x60>;
648 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
649 clocks = <&cpg CPG_MOD 517>,
650 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
651 <&scif_clk>;
652 clock-names = "fck", "brg_int", "scif_clk";
653 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
654 dma-names = "tx", "rx";
655 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
656 resets = <&cpg 517>;
657 status = "disabled";
658 };
660 hscif4: serial@e66b0000 {
661 compatible = "renesas,hscif-r8a77965",
662 "renesas,rcar-gen3-hscif",
663 "renesas,hscif";
664 reg = <0 0xe66b0000 0 0x60>;
665 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
666 clocks = <&cpg CPG_MOD 516>,
667 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
668 <&scif_clk>;
669 clock-names = "fck", "brg_int", "scif_clk";
670 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
671 dma-names = "tx", "rx";
672 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
673 resets = <&cpg 516>;
674 status = "disabled";
675 };
677 hsusb: usb@e6590000 {
678 compatible = "renesas,usbhs-r8a77965",
679 "renesas,rcar-gen3-usbhs";
680 reg = <0 0xe6590000 0 0x200>;
681 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
682 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
683 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
684 <&usb_dmac1 0>, <&usb_dmac1 1>;
685 dma-names = "ch0", "ch1", "ch2", "ch3";
686 renesas,buswait = <11>;
687 phys = <&usb2_phy0 3>;
688 phy-names = "usb";
689 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
690 resets = <&cpg 704>, <&cpg 703>;
691 status = "disabled";
692 };
694 usb_dmac0: dma-controller@e65a0000 {
695 compatible = "renesas,r8a77965-usb-dmac",
696 "renesas,usb-dmac";
697 reg = <0 0xe65a0000 0 0x100>;
698 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
699 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
700 interrupt-names = "ch0", "ch1";
701 clocks = <&cpg CPG_MOD 330>;
702 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
703 resets = <&cpg 330>;
704 #dma-cells = <1>;
705 dma-channels = <2>;
706 };
708 usb_dmac1: dma-controller@e65b0000 {
709 compatible = "renesas,r8a77965-usb-dmac",
710 "renesas,usb-dmac";
711 reg = <0 0xe65b0000 0 0x100>;
712 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
714 interrupt-names = "ch0", "ch1";
715 clocks = <&cpg CPG_MOD 331>;
716 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
717 resets = <&cpg 331>;
718 #dma-cells = <1>;
719 dma-channels = <2>;
720 };
722 usb3_phy0: usb-phy@e65ee000 {
723 compatible = "renesas,r8a77965-usb3-phy",
724 "renesas,rcar-gen3-usb3-phy";
725 reg = <0 0xe65ee000 0 0x90>;
726 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
727 <&usb_extal_clk>;
728 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
729 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
730 resets = <&cpg 328>;
731 #phy-cells = <0>;
732 status = "disabled";
733 };
735 arm_cc630p: crypto@e6601000 {
736 compatible = "arm,cryptocell-630p-ree";
737 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
738 reg = <0x0 0xe6601000 0 0x1000>;
739 clocks = <&cpg CPG_MOD 229>;
740 resets = <&cpg 229>;
741 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
742 };
744 dmac0: dma-controller@e6700000 {
745 compatible = "renesas,dmac-r8a77965",
746 "renesas,rcar-dmac";
747 reg = <0 0xe6700000 0 0x10000>;
748 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
757 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
758 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
765 interrupt-names = "error",
766 "ch0", "ch1", "ch2", "ch3",
767 "ch4", "ch5", "ch6", "ch7",
768 "ch8", "ch9", "ch10", "ch11",
769 "ch12", "ch13", "ch14", "ch15";
770 clocks = <&cpg CPG_MOD 219>;
771 clock-names = "fck";
772 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
773 resets = <&cpg 219>;
774 #dma-cells = <1>;
775 dma-channels = <16>;
776 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
777 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
778 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
779 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
780 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
781 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
782 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
783 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
784 };
786 dmac1: dma-controller@e7300000 {
787 compatible = "renesas,dmac-r8a77965",
788 "renesas,rcar-dmac";
789 reg = <0 0xe7300000 0 0x10000>;
790 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
794 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
796 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
797 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
798 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
799 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
800 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
801 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
807 interrupt-names = "error",
808 "ch0", "ch1", "ch2", "ch3",
809 "ch4", "ch5", "ch6", "ch7",
810 "ch8", "ch9", "ch10", "ch11",
811 "ch12", "ch13", "ch14", "ch15";
812 clocks = <&cpg CPG_MOD 218>;
813 clock-names = "fck";
814 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
815 resets = <&cpg 218>;
816 #dma-cells = <1>;
817 dma-channels = <16>;
818 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
819 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
820 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
821 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
822 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
823 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
824 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
825 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
826 };
828 dmac2: dma-controller@e7310000 {
829 compatible = "renesas,dmac-r8a77965",
830 "renesas,rcar-dmac";
831 reg = <0 0xe7310000 0 0x10000>;
832 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
833 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
834 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
835 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
836 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
837 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
838 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
839 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
840 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
841 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
842 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
843 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
849 interrupt-names = "error",
850 "ch0", "ch1", "ch2", "ch3",
851 "ch4", "ch5", "ch6", "ch7",
852 "ch8", "ch9", "ch10", "ch11",
853 "ch12", "ch13", "ch14", "ch15";
854 clocks = <&cpg CPG_MOD 217>;
855 clock-names = "fck";
856 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
857 resets = <&cpg 217>;
858 #dma-cells = <1>;
859 dma-channels = <16>;
860 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
861 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
862 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
863 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
864 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
865 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
866 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
867 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
868 };
870 ipmmu_ds0: iommu@e6740000 {
871 compatible = "renesas,ipmmu-r8a77965";
872 reg = <0 0xe6740000 0 0x1000>;
873 renesas,ipmmu-main = <&ipmmu_mm 0>;
874 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
875 #iommu-cells = <1>;
876 };
878 ipmmu_ds1: iommu@e7740000 {
879 compatible = "renesas,ipmmu-r8a77965";
880 reg = <0 0xe7740000 0 0x1000>;
881 renesas,ipmmu-main = <&ipmmu_mm 1>;
882 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
883 #iommu-cells = <1>;
884 };
886 ipmmu_hc: iommu@e6570000 {
887 compatible = "renesas,ipmmu-r8a77965";
888 reg = <0 0xe6570000 0 0x1000>;
889 renesas,ipmmu-main = <&ipmmu_mm 2>;
890 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
891 #iommu-cells = <1>;
892 };
894 ipmmu_mm: iommu@e67b0000 {
895 compatible = "renesas,ipmmu-r8a77965";
896 reg = <0 0xe67b0000 0 0x1000>;
897 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
899 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
900 #iommu-cells = <1>;
901 };
903 ipmmu_mp: iommu@ec670000 {
904 compatible = "renesas,ipmmu-r8a77965";
905 reg = <0 0xec670000 0 0x1000>;
906 renesas,ipmmu-main = <&ipmmu_mm 4>;
907 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
908 #iommu-cells = <1>;
909 };
911 ipmmu_pv0: iommu@fd800000 {
912 compatible = "renesas,ipmmu-r8a77965";
913 reg = <0 0xfd800000 0 0x1000>;
914 renesas,ipmmu-main = <&ipmmu_mm 6>;
915 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
916 #iommu-cells = <1>;
917 };
919 ipmmu_rt: iommu@ffc80000 {
920 compatible = "renesas,ipmmu-r8a77965";
921 reg = <0 0xffc80000 0 0x1000>;
922 renesas,ipmmu-main = <&ipmmu_mm 10>;
923 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
924 #iommu-cells = <1>;
925 };
927 ipmmu_vc0: iommu@fe6b0000 {
928 compatible = "renesas,ipmmu-r8a77965";
929 reg = <0 0xfe6b0000 0 0x1000>;
930 renesas,ipmmu-main = <&ipmmu_mm 12>;
931 power-domains = <&sysc R8A77965_PD_A3VC>;
932 #iommu-cells = <1>;
933 };
935 ipmmu_vi0: iommu@febd0000 {
936 compatible = "renesas,ipmmu-r8a77965";
937 reg = <0 0xfebd0000 0 0x1000>;
938 renesas,ipmmu-main = <&ipmmu_mm 14>;
939 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
940 #iommu-cells = <1>;
941 };
943 ipmmu_vp0: iommu@fe990000 {
944 compatible = "renesas,ipmmu-r8a77965";
945 reg = <0 0xfe990000 0 0x1000>;
946 renesas,ipmmu-main = <&ipmmu_mm 16>;
947 power-domains = <&sysc R8A77965_PD_A3VP>;
948 #iommu-cells = <1>;
949 };
951 avb: ethernet@e6800000 {
952 compatible = "renesas,etheravb-r8a77965",
953 "renesas,etheravb-rcar-gen3";
954 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
955 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
956 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
957 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
958 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
959 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
960 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
961 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
962 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
963 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
964 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
965 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
966 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
970 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
971 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
972 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
973 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
974 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
975 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
976 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
977 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
978 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
979 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
980 interrupt-names = "ch0", "ch1", "ch2", "ch3",
981 "ch4", "ch5", "ch6", "ch7",
982 "ch8", "ch9", "ch10", "ch11",
983 "ch12", "ch13", "ch14", "ch15",
984 "ch16", "ch17", "ch18", "ch19",
985 "ch20", "ch21", "ch22", "ch23",
986 "ch24";
987 clocks = <&cpg CPG_MOD 812>;
988 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
989 resets = <&cpg 812>;
990 phy-mode = "rgmii";
991 rx-internal-delay-ps = <0>;
992 tx-internal-delay-ps = <0>;
993 iommus = <&ipmmu_ds0 16>;
994 #address-cells = <1>;
995 #size-cells = <0>;
996 status = "disabled";
997 };
999 can0: can@e6c30000 {
1000 compatible = "renesas,can-r8a77965",
1001 "renesas,rcar-gen3-can";
1002 reg = <0 0xe6c30000 0 0x1000>;
1003 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1004 clocks = <&cpg CPG_MOD 916>,
1005 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1006 <&can_clk>;
1007 clock-names = "clkp1", "clkp2", "can_clk";
1008 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1009 assigned-clock-rates = <40000000>;
1010 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1011 resets = <&cpg 916>;
1012 status = "disabled";
1013 };
1015 can1: can@e6c38000 {
1016 compatible = "renesas,can-r8a77965",
1017 "renesas,rcar-gen3-can";
1018 reg = <0 0xe6c38000 0 0x1000>;
1019 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1020 clocks = <&cpg CPG_MOD 915>,
1021 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1022 <&can_clk>;
1023 clock-names = "clkp1", "clkp2", "can_clk";
1024 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1025 assigned-clock-rates = <40000000>;
1026 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1027 resets = <&cpg 915>;
1028 status = "disabled";
1029 };
1031 canfd: can@e66c0000 {
1032 compatible = "renesas,r8a77965-canfd",
1033 "renesas,rcar-gen3-canfd";
1034 reg = <0 0xe66c0000 0 0x8000>;
1035 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1037 clocks = <&cpg CPG_MOD 914>,
1038 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1039 <&can_clk>;
1040 clock-names = "fck", "canfd", "can_clk";
1041 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1042 assigned-clock-rates = <40000000>;
1043 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1044 resets = <&cpg 914>;
1045 status = "disabled";
1047 channel0 {
1048 status = "disabled";
1049 };
1051 channel1 {
1052 status = "disabled";
1053 };
1054 };
1056 pwm0: pwm@e6e30000 {
1057 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1058 reg = <0 0xe6e30000 0 8>;
1059 #pwm-cells = <2>;
1060 clocks = <&cpg CPG_MOD 523>;
1061 resets = <&cpg 523>;
1062 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1063 status = "disabled";
1064 };
1066 pwm1: pwm@e6e31000 {
1067 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1068 reg = <0 0xe6e31000 0 8>;
1069 #pwm-cells = <2>;
1070 clocks = <&cpg CPG_MOD 523>;
1071 resets = <&cpg 523>;
1072 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1073 status = "disabled";
1074 };
1076 pwm2: pwm@e6e32000 {
1077 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1078 reg = <0 0xe6e32000 0 8>;
1079 #pwm-cells = <2>;
1080 clocks = <&cpg CPG_MOD 523>;
1081 resets = <&cpg 523>;
1082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1083 status = "disabled";
1084 };
1086 pwm3: pwm@e6e33000 {
1087 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1088 reg = <0 0xe6e33000 0 8>;
1089 #pwm-cells = <2>;
1090 clocks = <&cpg CPG_MOD 523>;
1091 resets = <&cpg 523>;
1092 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1093 status = "disabled";
1094 };
1096 pwm4: pwm@e6e34000 {
1097 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1098 reg = <0 0xe6e34000 0 8>;
1099 #pwm-cells = <2>;
1100 clocks = <&cpg CPG_MOD 523>;
1101 resets = <&cpg 523>;
1102 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1103 status = "disabled";
1104 };
1106 pwm5: pwm@e6e35000 {
1107 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1108 reg = <0 0xe6e35000 0 8>;
1109 #pwm-cells = <2>;
1110 clocks = <&cpg CPG_MOD 523>;
1111 resets = <&cpg 523>;
1112 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1113 status = "disabled";
1114 };
1116 pwm6: pwm@e6e36000 {
1117 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1118 reg = <0 0xe6e36000 0 8>;
1119 #pwm-cells = <2>;
1120 clocks = <&cpg CPG_MOD 523>;
1121 resets = <&cpg 523>;
1122 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1123 status = "disabled";
1124 };
1126 scif0: serial@e6e60000 {
1127 compatible = "renesas,scif-r8a77965",
1128 "renesas,rcar-gen3-scif", "renesas,scif";
1129 reg = <0 0xe6e60000 0 64>;
1130 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1131 clocks = <&cpg CPG_MOD 207>,
1132 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1133 <&scif_clk>;
1134 clock-names = "fck", "brg_int", "scif_clk";
1135 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1136 <&dmac2 0x51>, <&dmac2 0x50>;
1137 dma-names = "tx", "rx", "tx", "rx";
1138 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1139 resets = <&cpg 207>;
1140 status = "disabled";
1141 };
1143 scif1: serial@e6e68000 {
1144 compatible = "renesas,scif-r8a77965",
1145 "renesas,rcar-gen3-scif", "renesas,scif";
1146 reg = <0 0xe6e68000 0 64>;
1147 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1148 clocks = <&cpg CPG_MOD 206>,
1149 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1150 <&scif_clk>;
1151 clock-names = "fck", "brg_int", "scif_clk";
1152 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1153 <&dmac2 0x53>, <&dmac2 0x52>;
1154 dma-names = "tx", "rx", "tx", "rx";
1155 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1156 resets = <&cpg 206>;
1157 status = "disabled";
1158 };
1160 scif2: serial@e6e88000 {
1161 compatible = "renesas,scif-r8a77965",
1162 "renesas,rcar-gen3-scif", "renesas,scif";
1163 reg = <0 0xe6e88000 0 64>;
1164 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1165 clocks = <&cpg CPG_MOD 310>,
1166 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1167 <&scif_clk>;
1168 clock-names = "fck", "brg_int", "scif_clk";
1169 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1170 <&dmac2 0x13>, <&dmac2 0x12>;
1171 dma-names = "tx", "rx", "tx", "rx";
1172 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1173 resets = <&cpg 310>;
1174 status = "disabled";
1175 };
1177 scif3: serial@e6c50000 {
1178 compatible = "renesas,scif-r8a77965",
1179 "renesas,rcar-gen3-scif", "renesas,scif";
1180 reg = <0 0xe6c50000 0 64>;
1181 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1182 clocks = <&cpg CPG_MOD 204>,
1183 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1184 <&scif_clk>;
1185 clock-names = "fck", "brg_int", "scif_clk";
1186 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1187 dma-names = "tx", "rx";
1188 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1189 resets = <&cpg 204>;
1190 status = "disabled";
1191 };
1193 scif4: serial@e6c40000 {
1194 compatible = "renesas,scif-r8a77965",
1195 "renesas,rcar-gen3-scif", "renesas,scif";
1196 reg = <0 0xe6c40000 0 64>;
1197 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1198 clocks = <&cpg CPG_MOD 203>,
1199 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1200 <&scif_clk>;
1201 clock-names = "fck", "brg_int", "scif_clk";
1202 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1203 dma-names = "tx", "rx";
1204 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1205 resets = <&cpg 203>;
1206 status = "disabled";
1207 };
1209 scif5: serial@e6f30000 {
1210 compatible = "renesas,scif-r8a77965",
1211 "renesas,rcar-gen3-scif", "renesas,scif";
1212 reg = <0 0xe6f30000 0 64>;
1213 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1214 clocks = <&cpg CPG_MOD 202>,
1215 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1216 <&scif_clk>;
1217 clock-names = "fck", "brg_int", "scif_clk";
1218 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1219 <&dmac2 0x5b>, <&dmac2 0x5a>;
1220 dma-names = "tx", "rx", "tx", "rx";
1221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1222 resets = <&cpg 202>;
1223 status = "disabled";
1224 };
1226 tpu: pwm@e6e80000 {
1227 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1228 reg = <0 0xe6e80000 0 0x148>;
1229 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1230 clocks = <&cpg CPG_MOD 304>;
1231 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1232 resets = <&cpg 304>;
1233 #pwm-cells = <3>;
1234 status = "disabled";
1235 };
1237 msiof0: spi@e6e90000 {
1238 compatible = "renesas,msiof-r8a77965",
1239 "renesas,rcar-gen3-msiof";
1240 reg = <0 0xe6e90000 0 0x0064>;
1241 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1242 clocks = <&cpg CPG_MOD 211>;
1243 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1244 <&dmac2 0x41>, <&dmac2 0x40>;
1245 dma-names = "tx", "rx", "tx", "rx";
1246 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1247 resets = <&cpg 211>;
1248 #address-cells = <1>;
1249 #size-cells = <0>;
1250 status = "disabled";
1251 };
1253 msiof1: spi@e6ea0000 {
1254 compatible = "renesas,msiof-r8a77965",
1255 "renesas,rcar-gen3-msiof";
1256 reg = <0 0xe6ea0000 0 0x0064>;
1257 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MOD 210>;
1259 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1260 <&dmac2 0x43>, <&dmac2 0x42>;
1261 dma-names = "tx", "rx", "tx", "rx";
1262 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1263 resets = <&cpg 210>;
1264 #address-cells = <1>;
1265 #size-cells = <0>;
1266 status = "disabled";
1267 };
1269 msiof2: spi@e6c00000 {
1270 compatible = "renesas,msiof-r8a77965",
1271 "renesas,rcar-gen3-msiof";
1272 reg = <0 0xe6c00000 0 0x0064>;
1273 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1274 clocks = <&cpg CPG_MOD 209>;
1275 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1276 dma-names = "tx", "rx";
1277 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1278 resets = <&cpg 209>;
1279 #address-cells = <1>;
1280 #size-cells = <0>;
1281 status = "disabled";
1282 };
1284 msiof3: spi@e6c10000 {
1285 compatible = "renesas,msiof-r8a77965",
1286 "renesas,rcar-gen3-msiof";
1287 reg = <0 0xe6c10000 0 0x0064>;
1288 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1289 clocks = <&cpg CPG_MOD 208>;
1290 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1291 dma-names = "tx", "rx";
1292 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1293 resets = <&cpg 208>;
1294 #address-cells = <1>;
1295 #size-cells = <0>;
1296 status = "disabled";
1297 };
1299 vin0: video@e6ef0000 {
1300 compatible = "renesas,vin-r8a77965";
1301 reg = <0 0xe6ef0000 0 0x1000>;
1302 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1303 clocks = <&cpg CPG_MOD 811>;
1304 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1305 resets = <&cpg 811>;
1306 renesas,id = <0>;
1307 status = "disabled";
1309 ports {
1310 #address-cells = <1>;
1311 #size-cells = <0>;
1313 port@1 {
1314 #address-cells = <1>;
1315 #size-cells = <0>;
1317 reg = <1>;
1319 vin0csi20: endpoint@0 {
1320 reg = <0>;
1321 remote-endpoint = <&csi20vin0>;
1322 };
1323 vin0csi40: endpoint@2 {
1324 reg = <2>;
1325 remote-endpoint = <&csi40vin0>;
1326 };
1327 };
1328 };
1329 };
1331 vin1: video@e6ef1000 {
1332 compatible = "renesas,vin-r8a77965";
1333 reg = <0 0xe6ef1000 0 0x1000>;
1334 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1335 clocks = <&cpg CPG_MOD 810>;
1336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1337 resets = <&cpg 810>;
1338 renesas,id = <1>;
1339 status = "disabled";
1341 ports {
1342 #address-cells = <1>;
1343 #size-cells = <0>;
1345 port@1 {
1346 #address-cells = <1>;
1347 #size-cells = <0>;
1349 reg = <1>;
1351 vin1csi20: endpoint@0 {
1352 reg = <0>;
1353 remote-endpoint = <&csi20vin1>;
1354 };
1355 vin1csi40: endpoint@2 {
1356 reg = <2>;
1357 remote-endpoint = <&csi40vin1>;
1358 };
1359 };
1360 };
1361 };
1363 vin2: video@e6ef2000 {
1364 compatible = "renesas,vin-r8a77965";
1365 reg = <0 0xe6ef2000 0 0x1000>;
1366 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1367 clocks = <&cpg CPG_MOD 809>;
1368 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1369 resets = <&cpg 809>;
1370 renesas,id = <2>;
1371 status = "disabled";
1373 ports {
1374 #address-cells = <1>;
1375 #size-cells = <0>;
1377 port@1 {
1378 #address-cells = <1>;
1379 #size-cells = <0>;
1381 reg = <1>;
1383 vin2csi20: endpoint@0 {
1384 reg = <0>;
1385 remote-endpoint = <&csi20vin2>;
1386 };
1387 vin2csi40: endpoint@2 {
1388 reg = <2>;
1389 remote-endpoint = <&csi40vin2>;
1390 };
1391 };
1392 };
1393 };
1395 vin3: video@e6ef3000 {
1396 compatible = "renesas,vin-r8a77965";
1397 reg = <0 0xe6ef3000 0 0x1000>;
1398 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1399 clocks = <&cpg CPG_MOD 808>;
1400 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1401 resets = <&cpg 808>;
1402 renesas,id = <3>;
1403 status = "disabled";
1405 ports {
1406 #address-cells = <1>;
1407 #size-cells = <0>;
1409 port@1 {
1410 #address-cells = <1>;
1411 #size-cells = <0>;
1413 reg = <1>;
1415 vin3csi20: endpoint@0 {
1416 reg = <0>;
1417 remote-endpoint = <&csi20vin3>;
1418 };
1419 vin3csi40: endpoint@2 {
1420 reg = <2>;
1421 remote-endpoint = <&csi40vin3>;
1422 };
1423 };
1424 };
1425 };
1427 vin4: video@e6ef4000 {
1428 compatible = "renesas,vin-r8a77965";
1429 reg = <0 0xe6ef4000 0 0x1000>;
1430 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1431 clocks = <&cpg CPG_MOD 807>;
1432 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1433 resets = <&cpg 807>;
1434 renesas,id = <4>;
1435 status = "disabled";
1437 ports {
1438 #address-cells = <1>;
1439 #size-cells = <0>;
1441 port@1 {
1442 #address-cells = <1>;
1443 #size-cells = <0>;
1445 reg = <1>;
1447 vin4csi20: endpoint@0 {
1448 reg = <0>;
1449 remote-endpoint = <&csi20vin4>;
1450 };
1451 vin4csi40: endpoint@2 {
1452 reg = <2>;
1453 remote-endpoint = <&csi40vin4>;
1454 };
1455 };
1456 };
1457 };
1459 vin5: video@e6ef5000 {
1460 compatible = "renesas,vin-r8a77965";
1461 reg = <0 0xe6ef5000 0 0x1000>;
1462 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1463 clocks = <&cpg CPG_MOD 806>;
1464 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1465 resets = <&cpg 806>;
1466 renesas,id = <5>;
1467 status = "disabled";
1469 ports {
1470 #address-cells = <1>;
1471 #size-cells = <0>;
1473 port@1 {
1474 #address-cells = <1>;
1475 #size-cells = <0>;
1477 reg = <1>;
1479 vin5csi20: endpoint@0 {
1480 reg = <0>;
1481 remote-endpoint = <&csi20vin5>;
1482 };
1483 vin5csi40: endpoint@2 {
1484 reg = <2>;
1485 remote-endpoint = <&csi40vin5>;
1486 };
1487 };
1488 };
1489 };
1491 vin6: video@e6ef6000 {
1492 compatible = "renesas,vin-r8a77965";
1493 reg = <0 0xe6ef6000 0 0x1000>;
1494 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1495 clocks = <&cpg CPG_MOD 805>;
1496 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1497 resets = <&cpg 805>;
1498 renesas,id = <6>;
1499 status = "disabled";
1501 ports {
1502 #address-cells = <1>;
1503 #size-cells = <0>;
1505 port@1 {
1506 #address-cells = <1>;
1507 #size-cells = <0>;
1509 reg = <1>;
1511 vin6csi20: endpoint@0 {
1512 reg = <0>;
1513 remote-endpoint = <&csi20vin6>;
1514 };
1515 vin6csi40: endpoint@2 {
1516 reg = <2>;
1517 remote-endpoint = <&csi40vin6>;
1518 };
1519 };
1520 };
1521 };
1523 vin7: video@e6ef7000 {
1524 compatible = "renesas,vin-r8a77965";
1525 reg = <0 0xe6ef7000 0 0x1000>;
1526 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1527 clocks = <&cpg CPG_MOD 804>;
1528 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1529 resets = <&cpg 804>;
1530 renesas,id = <7>;
1531 status = "disabled";
1533 ports {
1534 #address-cells = <1>;
1535 #size-cells = <0>;
1537 port@1 {
1538 #address-cells = <1>;
1539 #size-cells = <0>;
1541 reg = <1>;
1543 vin7csi20: endpoint@0 {
1544 reg = <0>;
1545 remote-endpoint = <&csi20vin7>;
1546 };
1547 vin7csi40: endpoint@2 {
1548 reg = <2>;
1549 remote-endpoint = <&csi40vin7>;
1550 };
1551 };
1552 };
1553 };
1555 drif00: rif@e6f40000 {
1556 compatible = "renesas,r8a77965-drif",
1557 "renesas,rcar-gen3-drif";
1558 reg = <0 0xe6f40000 0 0x84>;
1559 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1560 clocks = <&cpg CPG_MOD 515>;
1561 clock-names = "fck";
1562 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1563 dma-names = "rx", "rx";
1564 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1565 resets = <&cpg 515>;
1566 renesas,bonding = <&drif01>;
1567 status = "disabled";
1568 };
1570 drif01: rif@e6f50000 {
1571 compatible = "renesas,r8a77965-drif",
1572 "renesas,rcar-gen3-drif";
1573 reg = <0 0xe6f50000 0 0x84>;
1574 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1575 clocks = <&cpg CPG_MOD 514>;
1576 clock-names = "fck";
1577 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1578 dma-names = "rx", "rx";
1579 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1580 resets = <&cpg 514>;
1581 renesas,bonding = <&drif00>;
1582 status = "disabled";
1583 };
1585 drif10: rif@e6f60000 {
1586 compatible = "renesas,r8a77965-drif",
1587 "renesas,rcar-gen3-drif";
1588 reg = <0 0xe6f60000 0 0x84>;
1589 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1590 clocks = <&cpg CPG_MOD 513>;
1591 clock-names = "fck";
1592 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1593 dma-names = "rx", "rx";
1594 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1595 resets = <&cpg 513>;
1596 renesas,bonding = <&drif11>;
1597 status = "disabled";
1598 };
1600 drif11: rif@e6f70000 {
1601 compatible = "renesas,r8a77965-drif",
1602 "renesas,rcar-gen3-drif";
1603 reg = <0 0xe6f70000 0 0x84>;
1604 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1605 clocks = <&cpg CPG_MOD 512>;
1606 clock-names = "fck";
1607 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1608 dma-names = "rx", "rx";
1609 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1610 resets = <&cpg 512>;
1611 renesas,bonding = <&drif10>;
1612 status = "disabled";
1613 };
1615 drif20: rif@e6f80000 {
1616 compatible = "renesas,r8a77965-drif",
1617 "renesas,rcar-gen3-drif";
1618 reg = <0 0xe6f80000 0 0x84>;
1619 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1620 clocks = <&cpg CPG_MOD 511>;
1621 clock-names = "fck";
1622 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1623 dma-names = "rx", "rx";
1624 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1625 resets = <&cpg 511>;
1626 renesas,bonding = <&drif21>;
1627 status = "disabled";
1628 };
1630 drif21: rif@e6f90000 {
1631 compatible = "renesas,r8a77965-drif",
1632 "renesas,rcar-gen3-drif";
1633 reg = <0 0xe6f90000 0 0x84>;
1634 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1635 clocks = <&cpg CPG_MOD 510>;
1636 clock-names = "fck";
1637 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1638 dma-names = "rx", "rx";
1639 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1640 resets = <&cpg 510>;
1641 renesas,bonding = <&drif20>;
1642 status = "disabled";
1643 };
1645 drif30: rif@e6fa0000 {
1646 compatible = "renesas,r8a77965-drif",
1647 "renesas,rcar-gen3-drif";
1648 reg = <0 0xe6fa0000 0 0x84>;
1649 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1650 clocks = <&cpg CPG_MOD 509>;
1651 clock-names = "fck";
1652 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1653 dma-names = "rx", "rx";
1654 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1655 resets = <&cpg 509>;
1656 renesas,bonding = <&drif31>;
1657 status = "disabled";
1658 };
1660 drif31: rif@e6fb0000 {
1661 compatible = "renesas,r8a77965-drif",
1662 "renesas,rcar-gen3-drif";
1663 reg = <0 0xe6fb0000 0 0x84>;
1664 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1665 clocks = <&cpg CPG_MOD 508>;
1666 clock-names = "fck";
1667 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1668 dma-names = "rx", "rx";
1669 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1670 resets = <&cpg 508>;
1671 renesas,bonding = <&drif30>;
1672 status = "disabled";
1673 };
1675 rcar_sound: sound@ec500000 {
1676 /*
1677 * #sound-dai-cells is required
1678 *
1679 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1680 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1681 */
1682 /*
1683 * #clock-cells is required for audio_clkout0/1/2/3
1684 *
1685 * clkout : #clock-cells = <0>; <&rcar_sound>;
1686 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1687 */
1688 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1689 reg = <0 0xec500000 0 0x1000>, /* SCU */
1690 <0 0xec5a0000 0 0x100>, /* ADG */
1691 <0 0xec540000 0 0x1000>, /* SSIU */
1692 <0 0xec541000 0 0x280>, /* SSI */
1693 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1694 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1696 clocks = <&cpg CPG_MOD 1005>,
1697 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1698 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1699 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1700 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1701 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1702 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1703 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1704 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1705 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1706 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1707 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1708 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1709 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1710 <&audio_clk_a>, <&audio_clk_b>,
1711 <&audio_clk_c>,
1712 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1713 clock-names = "ssi-all",
1714 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1715 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1716 "ssi.1", "ssi.0",
1717 "src.9", "src.8", "src.7", "src.6",
1718 "src.5", "src.4", "src.3", "src.2",
1719 "src.1", "src.0",
1720 "mix.1", "mix.0",
1721 "ctu.1", "ctu.0",
1722 "dvc.0", "dvc.1",
1723 "clk_a", "clk_b", "clk_c", "clk_i";
1724 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1725 resets = <&cpg 1005>,
1726 <&cpg 1006>, <&cpg 1007>,
1727 <&cpg 1008>, <&cpg 1009>,
1728 <&cpg 1010>, <&cpg 1011>,
1729 <&cpg 1012>, <&cpg 1013>,
1730 <&cpg 1014>, <&cpg 1015>;
1731 reset-names = "ssi-all",
1732 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1733 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1734 "ssi.1", "ssi.0";
1735 status = "disabled";
1737 rcar_sound,dvc {
1738 dvc0: dvc-0 {
1739 dmas = <&audma1 0xbc>;
1740 dma-names = "tx";
1741 };
1742 dvc1: dvc-1 {
1743 dmas = <&audma1 0xbe>;
1744 dma-names = "tx";
1745 };
1746 };
1748 rcar_sound,mix {
1749 mix0: mix-0 { };
1750 mix1: mix-1 { };
1751 };
1753 rcar_sound,ctu {
1754 ctu00: ctu-0 { };
1755 ctu01: ctu-1 { };
1756 ctu02: ctu-2 { };
1757 ctu03: ctu-3 { };
1758 ctu10: ctu-4 { };
1759 ctu11: ctu-5 { };
1760 ctu12: ctu-6 { };
1761 ctu13: ctu-7 { };
1762 };
1764 rcar_sound,src {
1765 src0: src-0 {
1766 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1767 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1768 dma-names = "rx", "tx";
1769 };
1770 src1: src-1 {
1771 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1772 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1773 dma-names = "rx", "tx";
1774 };
1775 src2: src-2 {
1776 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1777 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1778 dma-names = "rx", "tx";
1779 };
1780 src3: src-3 {
1781 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1782 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1783 dma-names = "rx", "tx";
1784 };
1785 src4: src-4 {
1786 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1787 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1788 dma-names = "rx", "tx";
1789 };
1790 src5: src-5 {
1791 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1792 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1793 dma-names = "rx", "tx";
1794 };
1795 src6: src-6 {
1796 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1797 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1798 dma-names = "rx", "tx";
1799 };
1800 src7: src-7 {
1801 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1802 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1803 dma-names = "rx", "tx";
1804 };
1805 src8: src-8 {
1806 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1807 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1808 dma-names = "rx", "tx";
1809 };
1810 src9: src-9 {
1811 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1812 dmas = <&audma0 0x97>, <&audma1 0xba>;
1813 dma-names = "rx", "tx";
1814 };
1815 };
1817 rcar_sound,ssiu {
1818 ssiu00: ssiu-0 {
1819 dmas = <&audma0 0x15>, <&audma1 0x16>;
1820 dma-names = "rx", "tx";
1821 };
1822 ssiu01: ssiu-1 {
1823 dmas = <&audma0 0x35>, <&audma1 0x36>;
1824 dma-names = "rx", "tx";
1825 };
1826 ssiu02: ssiu-2 {
1827 dmas = <&audma0 0x37>, <&audma1 0x38>;
1828 dma-names = "rx", "tx";
1829 };
1830 ssiu03: ssiu-3 {
1831 dmas = <&audma0 0x47>, <&audma1 0x48>;
1832 dma-names = "rx", "tx";
1833 };
1834 ssiu04: ssiu-4 {
1835 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1836 dma-names = "rx", "tx";
1837 };
1838 ssiu05: ssiu-5 {
1839 dmas = <&audma0 0x43>, <&audma1 0x44>;
1840 dma-names = "rx", "tx";
1841 };
1842 ssiu06: ssiu-6 {
1843 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1844 dma-names = "rx", "tx";
1845 };
1846 ssiu07: ssiu-7 {
1847 dmas = <&audma0 0x53>, <&audma1 0x54>;
1848 dma-names = "rx", "tx";
1849 };
1850 ssiu10: ssiu-8 {
1851 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1852 dma-names = "rx", "tx";
1853 };
1854 ssiu11: ssiu-9 {
1855 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1856 dma-names = "rx", "tx";
1857 };
1858 ssiu12: ssiu-10 {
1859 dmas = <&audma0 0x57>, <&audma1 0x58>;
1860 dma-names = "rx", "tx";
1861 };
1862 ssiu13: ssiu-11 {
1863 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1864 dma-names = "rx", "tx";
1865 };
1866 ssiu14: ssiu-12 {
1867 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1868 dma-names = "rx", "tx";
1869 };
1870 ssiu15: ssiu-13 {
1871 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1872 dma-names = "rx", "tx";
1873 };
1874 ssiu16: ssiu-14 {
1875 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1876 dma-names = "rx", "tx";
1877 };
1878 ssiu17: ssiu-15 {
1879 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1880 dma-names = "rx", "tx";
1881 };
1882 ssiu20: ssiu-16 {
1883 dmas = <&audma0 0x63>, <&audma1 0x64>;
1884 dma-names = "rx", "tx";
1885 };
1886 ssiu21: ssiu-17 {
1887 dmas = <&audma0 0x67>, <&audma1 0x68>;
1888 dma-names = "rx", "tx";
1889 };
1890 ssiu22: ssiu-18 {
1891 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1892 dma-names = "rx", "tx";
1893 };
1894 ssiu23: ssiu-19 {
1895 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1896 dma-names = "rx", "tx";
1897 };
1898 ssiu24: ssiu-20 {
1899 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1900 dma-names = "rx", "tx";
1901 };
1902 ssiu25: ssiu-21 {
1903 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1904 dma-names = "rx", "tx";
1905 };
1906 ssiu26: ssiu-22 {
1907 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1908 dma-names = "rx", "tx";
1909 };
1910 ssiu27: ssiu-23 {
1911 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1912 dma-names = "rx", "tx";
1913 };
1914 ssiu30: ssiu-24 {
1915 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1916 dma-names = "rx", "tx";
1917 };
1918 ssiu31: ssiu-25 {
1919 dmas = <&audma0 0x21>, <&audma1 0x22>;
1920 dma-names = "rx", "tx";
1921 };
1922 ssiu32: ssiu-26 {
1923 dmas = <&audma0 0x23>, <&audma1 0x24>;
1924 dma-names = "rx", "tx";
1925 };
1926 ssiu33: ssiu-27 {
1927 dmas = <&audma0 0x25>, <&audma1 0x26>;
1928 dma-names = "rx", "tx";
1929 };
1930 ssiu34: ssiu-28 {
1931 dmas = <&audma0 0x27>, <&audma1 0x28>;
1932 dma-names = "rx", "tx";
1933 };
1934 ssiu35: ssiu-29 {
1935 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1936 dma-names = "rx", "tx";
1937 };
1938 ssiu36: ssiu-30 {
1939 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1940 dma-names = "rx", "tx";
1941 };
1942 ssiu37: ssiu-31 {
1943 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1944 dma-names = "rx", "tx";
1945 };
1946 ssiu40: ssiu-32 {
1947 dmas = <&audma0 0x71>, <&audma1 0x72>;
1948 dma-names = "rx", "tx";
1949 };
1950 ssiu41: ssiu-33 {
1951 dmas = <&audma0 0x17>, <&audma1 0x18>;
1952 dma-names = "rx", "tx";
1953 };
1954 ssiu42: ssiu-34 {
1955 dmas = <&audma0 0x19>, <&audma1 0x1A>;
1956 dma-names = "rx", "tx";
1957 };
1958 ssiu43: ssiu-35 {
1959 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1960 dma-names = "rx", "tx";
1961 };
1962 ssiu44: ssiu-36 {
1963 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1964 dma-names = "rx", "tx";
1965 };
1966 ssiu45: ssiu-37 {
1967 dmas = <&audma0 0x1F>, <&audma1 0x20>;
1968 dma-names = "rx", "tx";
1969 };
1970 ssiu46: ssiu-38 {
1971 dmas = <&audma0 0x31>, <&audma1 0x32>;
1972 dma-names = "rx", "tx";
1973 };
1974 ssiu47: ssiu-39 {
1975 dmas = <&audma0 0x33>, <&audma1 0x34>;
1976 dma-names = "rx", "tx";
1977 };
1978 ssiu50: ssiu-40 {
1979 dmas = <&audma0 0x73>, <&audma1 0x74>;
1980 dma-names = "rx", "tx";
1981 };
1982 ssiu60: ssiu-41 {
1983 dmas = <&audma0 0x75>, <&audma1 0x76>;
1984 dma-names = "rx", "tx";
1985 };
1986 ssiu70: ssiu-42 {
1987 dmas = <&audma0 0x79>, <&audma1 0x7a>;
1988 dma-names = "rx", "tx";
1989 };
1990 ssiu80: ssiu-43 {
1991 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1992 dma-names = "rx", "tx";
1993 };
1994 ssiu90: ssiu-44 {
1995 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1996 dma-names = "rx", "tx";
1997 };
1998 ssiu91: ssiu-45 {
1999 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2000 dma-names = "rx", "tx";
2001 };
2002 ssiu92: ssiu-46 {
2003 dmas = <&audma0 0x81>, <&audma1 0x82>;
2004 dma-names = "rx", "tx";
2005 };
2006 ssiu93: ssiu-47 {
2007 dmas = <&audma0 0x83>, <&audma1 0x84>;
2008 dma-names = "rx", "tx";
2009 };
2010 ssiu94: ssiu-48 {
2011 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2012 dma-names = "rx", "tx";
2013 };
2014 ssiu95: ssiu-49 {
2015 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2016 dma-names = "rx", "tx";
2017 };
2018 ssiu96: ssiu-50 {
2019 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2020 dma-names = "rx", "tx";
2021 };
2022 ssiu97: ssiu-51 {
2023 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2024 dma-names = "rx", "tx";
2025 };
2026 };
2028 rcar_sound,ssi {
2029 ssi0: ssi-0 {
2030 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2031 dmas = <&audma0 0x01>, <&audma1 0x02>;
2032 dma-names = "rx", "tx";
2033 };
2034 ssi1: ssi-1 {
2035 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2036 dmas = <&audma0 0x03>, <&audma1 0x04>;
2037 dma-names = "rx", "tx";
2038 };
2039 ssi2: ssi-2 {
2040 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2041 dmas = <&audma0 0x05>, <&audma1 0x06>;
2042 dma-names = "rx", "tx";
2043 };
2044 ssi3: ssi-3 {
2045 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2046 dmas = <&audma0 0x07>, <&audma1 0x08>;
2047 dma-names = "rx", "tx";
2048 };
2049 ssi4: ssi-4 {
2050 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2051 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2052 dma-names = "rx", "tx";
2053 };
2054 ssi5: ssi-5 {
2055 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2056 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2057 dma-names = "rx", "tx";
2058 };
2059 ssi6: ssi-6 {
2060 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2061 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2062 dma-names = "rx", "tx";
2063 };
2064 ssi7: ssi-7 {
2065 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2066 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2067 dma-names = "rx", "tx";
2068 };
2069 ssi8: ssi-8 {
2070 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2071 dmas = <&audma0 0x11>, <&audma1 0x12>;
2072 dma-names = "rx", "tx";
2073 };
2074 ssi9: ssi-9 {
2075 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2076 dmas = <&audma0 0x13>, <&audma1 0x14>;
2077 dma-names = "rx", "tx";
2078 };
2079 };
2080 };
2082 audma0: dma-controller@ec700000 {
2083 compatible = "renesas,dmac-r8a77965",
2084 "renesas,rcar-dmac";
2085 reg = <0 0xec700000 0 0x10000>;
2086 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2087 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2088 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2089 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2090 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2091 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2092 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2093 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2094 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2095 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2096 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2097 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2098 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2099 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2100 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2101 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2102 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2103 interrupt-names = "error",
2104 "ch0", "ch1", "ch2", "ch3",
2105 "ch4", "ch5", "ch6", "ch7",
2106 "ch8", "ch9", "ch10", "ch11",
2107 "ch12", "ch13", "ch14", "ch15";
2108 clocks = <&cpg CPG_MOD 502>;
2109 clock-names = "fck";
2110 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2111 resets = <&cpg 502>;
2112 #dma-cells = <1>;
2113 dma-channels = <16>;
2114 };
2116 audma1: dma-controller@ec720000 {
2117 compatible = "renesas,dmac-r8a77965",
2118 "renesas,rcar-dmac";
2119 reg = <0 0xec720000 0 0x10000>;
2120 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2121 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2122 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2123 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2124 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2125 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2126 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2127 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2128 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2129 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2130 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2131 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2132 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2133 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2134 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2135 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2136 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2137 interrupt-names = "error",
2138 "ch0", "ch1", "ch2", "ch3",
2139 "ch4", "ch5", "ch6", "ch7",
2140 "ch8", "ch9", "ch10", "ch11",
2141 "ch12", "ch13", "ch14", "ch15";
2142 clocks = <&cpg CPG_MOD 501>;
2143 clock-names = "fck";
2144 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2145 resets = <&cpg 501>;
2146 #dma-cells = <1>;
2147 dma-channels = <16>;
2148 };
2150 xhci0: usb@ee000000 {
2151 compatible = "renesas,xhci-r8a77965",
2152 "renesas,rcar-gen3-xhci";
2153 reg = <0 0xee000000 0 0xc00>;
2154 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2155 clocks = <&cpg CPG_MOD 328>;
2156 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2157 resets = <&cpg 328>;
2158 status = "disabled";
2159 };
2161 usb3_peri0: usb@ee020000 {
2162 compatible = "renesas,r8a77965-usb3-peri",
2163 "renesas,rcar-gen3-usb3-peri";
2164 reg = <0 0xee020000 0 0x400>;
2165 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2166 clocks = <&cpg CPG_MOD 328>;
2167 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2168 resets = <&cpg 328>;
2169 status = "disabled";
2170 };
2172 ohci0: usb@ee080000 {
2173 compatible = "generic-ohci";
2174 reg = <0 0xee080000 0 0x100>;
2175 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2176 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2177 phys = <&usb2_phy0 1>;
2178 phy-names = "usb";
2179 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2180 resets = <&cpg 703>, <&cpg 704>;
2181 status = "disabled";
2182 };
2184 ohci1: usb@ee0a0000 {
2185 compatible = "generic-ohci";
2186 reg = <0 0xee0a0000 0 0x100>;
2187 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2188 clocks = <&cpg CPG_MOD 702>;
2189 phys = <&usb2_phy1 1>;
2190 phy-names = "usb";
2191 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2192 resets = <&cpg 702>;
2193 status = "disabled";
2194 };
2196 ehci0: usb@ee080100 {
2197 compatible = "generic-ehci";
2198 reg = <0 0xee080100 0 0x100>;
2199 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2200 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2201 phys = <&usb2_phy0 2>;
2202 phy-names = "usb";
2203 companion = <&ohci0>;
2204 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2205 resets = <&cpg 703>, <&cpg 704>;
2206 status = "disabled";
2207 };
2209 ehci1: usb@ee0a0100 {
2210 compatible = "generic-ehci";
2211 reg = <0 0xee0a0100 0 0x100>;
2212 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2213 clocks = <&cpg CPG_MOD 702>;
2214 phys = <&usb2_phy1 2>;
2215 phy-names = "usb";
2216 companion = <&ohci1>;
2217 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2218 resets = <&cpg 702>;
2219 status = "disabled";
2220 };
2222 usb2_phy0: usb-phy@ee080200 {
2223 compatible = "renesas,usb2-phy-r8a77965",
2224 "renesas,rcar-gen3-usb2-phy";
2225 reg = <0 0xee080200 0 0x700>;
2226 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2227 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2228 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2229 resets = <&cpg 703>, <&cpg 704>;
2230 #phy-cells = <1>;
2231 status = "disabled";
2232 };
2234 usb2_phy1: usb-phy@ee0a0200 {
2235 compatible = "renesas,usb2-phy-r8a77965",
2236 "renesas,rcar-gen3-usb2-phy";
2237 reg = <0 0xee0a0200 0 0x700>;
2238 clocks = <&cpg CPG_MOD 702>;
2239 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2240 resets = <&cpg 702>;
2241 #phy-cells = <1>;
2242 status = "disabled";
2243 };
2245 sdhi0: mmc@ee100000 {
2246 compatible = "renesas,sdhi-r8a77965",
2247 "renesas,rcar-gen3-sdhi";
2248 reg = <0 0xee100000 0 0x2000>;
2249 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2250 clocks = <&cpg CPG_MOD 314>;
2251 max-frequency = <200000000>;
2252 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2253 resets = <&cpg 314>;
2254 iommus = <&ipmmu_ds1 32>;
2255 status = "disabled";
2256 };
2258 sdhi1: mmc@ee120000 {
2259 compatible = "renesas,sdhi-r8a77965",
2260 "renesas,rcar-gen3-sdhi";
2261 reg = <0 0xee120000 0 0x2000>;
2262 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2263 clocks = <&cpg CPG_MOD 313>;
2264 max-frequency = <200000000>;
2265 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2266 resets = <&cpg 313>;
2267 iommus = <&ipmmu_ds1 33>;
2268 status = "disabled";
2269 };
2271 sdhi2: mmc@ee140000 {
2272 compatible = "renesas,sdhi-r8a77965",
2273 "renesas,rcar-gen3-sdhi";
2274 reg = <0 0xee140000 0 0x2000>;
2275 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2276 clocks = <&cpg CPG_MOD 312>;
2277 max-frequency = <200000000>;
2278 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2279 resets = <&cpg 312>;
2280 iommus = <&ipmmu_ds1 34>;
2281 status = "disabled";
2282 };
2284 sdhi3: mmc@ee160000 {
2285 compatible = "renesas,sdhi-r8a77965",
2286 "renesas,rcar-gen3-sdhi";
2287 reg = <0 0xee160000 0 0x2000>;
2288 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2289 clocks = <&cpg CPG_MOD 311>;
2290 max-frequency = <200000000>;
2291 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2292 resets = <&cpg 311>;
2293 iommus = <&ipmmu_ds1 35>;
2294 status = "disabled";
2295 };
2297 sata: sata@ee300000 {
2298 compatible = "renesas,sata-r8a77965",
2299 "renesas,rcar-gen3-sata";
2300 reg = <0 0xee300000 0 0x200000>;
2301 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2302 clocks = <&cpg CPG_MOD 815>;
2303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2304 resets = <&cpg 815>;
2305 status = "disabled";
2306 };
2308 gic: interrupt-controller@f1010000 {
2309 compatible = "arm,gic-400";
2310 #interrupt-cells = <3>;
2311 #address-cells = <0>;
2312 interrupt-controller;
2313 reg = <0x0 0xf1010000 0 0x1000>,
2314 <0x0 0xf1020000 0 0x20000>,
2315 <0x0 0xf1040000 0 0x20000>,
2316 <0x0 0xf1060000 0 0x20000>;
2317 interrupts = <GIC_PPI 9
2318 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2319 clocks = <&cpg CPG_MOD 408>;
2320 clock-names = "clk";
2321 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2322 resets = <&cpg 408>;
2323 };
2325 pciec0: pcie@fe000000 {
2326 compatible = "renesas,pcie-r8a77965",
2327 "renesas,pcie-rcar-gen3";
2328 reg = <0 0xfe000000 0 0x80000>;
2329 #address-cells = <3>;
2330 #size-cells = <2>;
2331 bus-range = <0x00 0xff>;
2332 device_type = "pci";
2333 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2334 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2335 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2336 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2337 /* Map all possible DDR as inbound ranges */
2338 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2339 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2340 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2341 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2342 #interrupt-cells = <1>;
2343 interrupt-map-mask = <0 0 0 0>;
2344 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2345 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2346 clock-names = "pcie", "pcie_bus";
2347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2348 resets = <&cpg 319>;
2349 status = "disabled";
2350 };
2352 pciec1: pcie@ee800000 {
2353 compatible = "renesas,pcie-r8a77965",
2354 "renesas,pcie-rcar-gen3";
2355 reg = <0 0xee800000 0 0x80000>;
2356 #address-cells = <3>;
2357 #size-cells = <2>;
2358 bus-range = <0x00 0xff>;
2359 device_type = "pci";
2360 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2361 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2362 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2363 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2364 /* Map all possible DDR as inbound ranges */
2365 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2366 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2367 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2368 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2369 #interrupt-cells = <1>;
2370 interrupt-map-mask = <0 0 0 0>;
2371 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2372 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2373 clock-names = "pcie", "pcie_bus";
2374 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2375 resets = <&cpg 318>;
2376 status = "disabled";
2377 };
2379 fdp1@fe940000 {
2380 compatible = "renesas,fdp1";
2381 reg = <0 0xfe940000 0 0x2400>;
2382 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2383 clocks = <&cpg CPG_MOD 119>;
2384 power-domains = <&sysc R8A77965_PD_A3VP>;
2385 resets = <&cpg 119>;
2386 renesas,fcp = <&fcpf0>;
2387 };
2389 fcpf0: fcp@fe950000 {
2390 compatible = "renesas,fcpf";
2391 reg = <0 0xfe950000 0 0x200>;
2392 clocks = <&cpg CPG_MOD 615>;
2393 power-domains = <&sysc R8A77965_PD_A3VP>;
2394 resets = <&cpg 615>;
2395 };
2397 vspb: vsp@fe960000 {
2398 compatible = "renesas,vsp2";
2399 reg = <0 0xfe960000 0 0x8000>;
2400 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2401 clocks = <&cpg CPG_MOD 626>;
2402 power-domains = <&sysc R8A77965_PD_A3VP>;
2403 resets = <&cpg 626>;
2405 renesas,fcp = <&fcpvb0>;
2406 };
2408 vspi0: vsp@fe9a0000 {
2409 compatible = "renesas,vsp2";
2410 reg = <0 0xfe9a0000 0 0x8000>;
2411 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2412 clocks = <&cpg CPG_MOD 631>;
2413 power-domains = <&sysc R8A77965_PD_A3VP>;
2414 resets = <&cpg 631>;
2416 renesas,fcp = <&fcpvi0>;
2417 };
2419 vspd0: vsp@fea20000 {
2420 compatible = "renesas,vsp2";
2421 reg = <0 0xfea20000 0 0x5000>;
2422 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2423 clocks = <&cpg CPG_MOD 623>;
2424 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2425 resets = <&cpg 623>;
2427 renesas,fcp = <&fcpvd0>;
2428 };
2430 vspd1: vsp@fea28000 {
2431 compatible = "renesas,vsp2";
2432 reg = <0 0xfea28000 0 0x5000>;
2433 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2434 clocks = <&cpg CPG_MOD 622>;
2435 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2436 resets = <&cpg 622>;
2438 renesas,fcp = <&fcpvd1>;
2439 };
2441 fcpvb0: fcp@fe96f000 {
2442 compatible = "renesas,fcpv";
2443 reg = <0 0xfe96f000 0 0x200>;
2444 clocks = <&cpg CPG_MOD 607>;
2445 power-domains = <&sysc R8A77965_PD_A3VP>;
2446 resets = <&cpg 607>;
2447 };
2449 fcpvd0: fcp@fea27000 {
2450 compatible = "renesas,fcpv";
2451 reg = <0 0xfea27000 0 0x200>;
2452 clocks = <&cpg CPG_MOD 603>;
2453 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2454 resets = <&cpg 603>;
2455 };
2457 fcpvd1: fcp@fea2f000 {
2458 compatible = "renesas,fcpv";
2459 reg = <0 0xfea2f000 0 0x200>;
2460 clocks = <&cpg CPG_MOD 602>;
2461 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2462 resets = <&cpg 602>;
2463 };
2465 fcpvi0: fcp@fe9af000 {
2466 compatible = "renesas,fcpv";
2467 reg = <0 0xfe9af000 0 0x200>;
2468 clocks = <&cpg CPG_MOD 611>;
2469 power-domains = <&sysc R8A77965_PD_A3VP>;
2470 resets = <&cpg 611>;
2471 };
2473 cmm0: cmm@fea40000 {
2474 compatible = "renesas,r8a77965-cmm",
2475 "renesas,rcar-gen3-cmm";
2476 reg = <0 0xfea40000 0 0x1000>;
2477 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2478 clocks = <&cpg CPG_MOD 711>;
2479 resets = <&cpg 711>;
2480 };
2482 cmm1: cmm@fea50000 {
2483 compatible = "renesas,r8a77965-cmm",
2484 "renesas,rcar-gen3-cmm";
2485 reg = <0 0xfea50000 0 0x1000>;
2486 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2487 clocks = <&cpg CPG_MOD 710>;
2488 resets = <&cpg 710>;
2489 };
2491 cmm3: cmm@fea70000 {
2492 compatible = "renesas,r8a77965-cmm",
2493 "renesas,rcar-gen3-cmm";
2494 reg = <0 0xfea70000 0 0x1000>;
2495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2496 clocks = <&cpg CPG_MOD 708>;
2497 resets = <&cpg 708>;
2498 };
2500 csi20: csi2@fea80000 {
2501 compatible = "renesas,r8a77965-csi2";
2502 reg = <0 0xfea80000 0 0x10000>;
2503 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2504 clocks = <&cpg CPG_MOD 714>;
2505 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2506 resets = <&cpg 714>;
2507 status = "disabled";
2509 ports {
2510 #address-cells = <1>;
2511 #size-cells = <0>;
2513 port@1 {
2514 #address-cells = <1>;
2515 #size-cells = <0>;
2517 reg = <1>;
2519 csi20vin0: endpoint@0 {
2520 reg = <0>;
2521 remote-endpoint = <&vin0csi20>;
2522 };
2523 csi20vin1: endpoint@1 {
2524 reg = <1>;
2525 remote-endpoint = <&vin1csi20>;
2526 };
2527 csi20vin2: endpoint@2 {
2528 reg = <2>;
2529 remote-endpoint = <&vin2csi20>;
2530 };
2531 csi20vin3: endpoint@3 {
2532 reg = <3>;
2533 remote-endpoint = <&vin3csi20>;
2534 };
2535 csi20vin4: endpoint@4 {
2536 reg = <4>;
2537 remote-endpoint = <&vin4csi20>;
2538 };
2539 csi20vin5: endpoint@5 {
2540 reg = <5>;
2541 remote-endpoint = <&vin5csi20>;
2542 };
2543 csi20vin6: endpoint@6 {
2544 reg = <6>;
2545 remote-endpoint = <&vin6csi20>;
2546 };
2547 csi20vin7: endpoint@7 {
2548 reg = <7>;
2549 remote-endpoint = <&vin7csi20>;
2550 };
2551 };
2552 };
2553 };
2555 csi40: csi2@feaa0000 {
2556 compatible = "renesas,r8a77965-csi2";
2557 reg = <0 0xfeaa0000 0 0x10000>;
2558 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2559 clocks = <&cpg CPG_MOD 716>;
2560 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2561 resets = <&cpg 716>;
2562 status = "disabled";
2564 ports {
2565 #address-cells = <1>;
2566 #size-cells = <0>;
2568 port@1 {
2569 #address-cells = <1>;
2570 #size-cells = <0>;
2572 reg = <1>;
2574 csi40vin0: endpoint@0 {
2575 reg = <0>;
2576 remote-endpoint = <&vin0csi40>;
2577 };
2578 csi40vin1: endpoint@1 {
2579 reg = <1>;
2580 remote-endpoint = <&vin1csi40>;
2581 };
2582 csi40vin2: endpoint@2 {
2583 reg = <2>;
2584 remote-endpoint = <&vin2csi40>;
2585 };
2586 csi40vin3: endpoint@3 {
2587 reg = <3>;
2588 remote-endpoint = <&vin3csi40>;
2589 };
2590 csi40vin4: endpoint@4 {
2591 reg = <4>;
2592 remote-endpoint = <&vin4csi40>;
2593 };
2594 csi40vin5: endpoint@5 {
2595 reg = <5>;
2596 remote-endpoint = <&vin5csi40>;
2597 };
2598 csi40vin6: endpoint@6 {
2599 reg = <6>;
2600 remote-endpoint = <&vin6csi40>;
2601 };
2602 csi40vin7: endpoint@7 {
2603 reg = <7>;
2604 remote-endpoint = <&vin7csi40>;
2605 };
2606 };
2607 };
2608 };
2610 hdmi0: hdmi@fead0000 {
2611 compatible = "renesas,r8a77965-hdmi",
2612 "renesas,rcar-gen3-hdmi";
2613 reg = <0 0xfead0000 0 0x10000>;
2614 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2615 clocks = <&cpg CPG_MOD 729>,
2616 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2617 clock-names = "iahb", "isfr";
2618 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2619 resets = <&cpg 729>;
2620 status = "disabled";
2622 ports {
2623 #address-cells = <1>;
2624 #size-cells = <0>;
2625 port@0 {
2626 reg = <0>;
2627 dw_hdmi0_in: endpoint {
2628 remote-endpoint = <&du_out_hdmi0>;
2629 };
2630 };
2631 port@1 {
2632 reg = <1>;
2633 };
2634 };
2635 };
2637 du: display@feb00000 {
2638 compatible = "renesas,du-r8a77965";
2639 reg = <0 0xfeb00000 0 0x80000>;
2640 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2641 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2642 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2643 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2644 <&cpg CPG_MOD 721>;
2645 clock-names = "du.0", "du.1", "du.3";
2646 resets = <&cpg 724>, <&cpg 722>;
2647 reset-names = "du.0", "du.3";
2649 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2650 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2652 status = "disabled";
2654 ports {
2655 #address-cells = <1>;
2656 #size-cells = <0>;
2658 port@0 {
2659 reg = <0>;
2660 du_out_rgb: endpoint {
2661 };
2662 };
2663 port@1 {
2664 reg = <1>;
2665 du_out_hdmi0: endpoint {
2666 remote-endpoint = <&dw_hdmi0_in>;
2667 };
2668 };
2669 port@2 {
2670 reg = <2>;
2671 du_out_lvds0: endpoint {
2672 remote-endpoint = <&lvds0_in>;
2673 };
2674 };
2675 };
2676 };
2678 lvds0: lvds@feb90000 {
2679 compatible = "renesas,r8a77965-lvds";
2680 reg = <0 0xfeb90000 0 0x14>;
2681 clocks = <&cpg CPG_MOD 727>;
2682 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2683 resets = <&cpg 727>;
2684 status = "disabled";
2686 ports {
2687 #address-cells = <1>;
2688 #size-cells = <0>;
2690 port@0 {
2691 reg = <0>;
2692 lvds0_in: endpoint {
2693 remote-endpoint = <&du_out_lvds0>;
2694 };
2695 };
2696 port@1 {
2697 reg = <1>;
2698 lvds0_out: endpoint {
2699 };
2700 };
2701 };
2702 };
2704 prr: chipid@fff00044 {
2705 compatible = "renesas,prr";
2706 reg = <0 0xfff00044 0 4>;
2707 };
2708 };
2710 thermal-zones {
2711 sensor_thermal1: sensor-thermal1 {
2712 polling-delay-passive = <250>;
2713 polling-delay = <1000>;
2714 thermal-sensors = <&tsc 0>;
2715 sustainable-power = <2439>;
2717 trips {
2718 sensor1_crit: sensor1-crit {
2719 temperature = <120000>;
2720 hysteresis = <1000>;
2721 type = "critical";
2722 };
2723 };
2724 };
2726 sensor_thermal2: sensor-thermal2 {
2727 polling-delay-passive = <250>;
2728 polling-delay = <1000>;
2729 thermal-sensors = <&tsc 1>;
2730 sustainable-power = <2439>;
2732 trips {
2733 sensor2_crit: sensor2-crit {
2734 temperature = <120000>;
2735 hysteresis = <1000>;
2736 type = "critical";
2737 };
2738 };
2739 };
2741 sensor_thermal3: sensor-thermal3 {
2742 polling-delay-passive = <250>;
2743 polling-delay = <1000>;
2744 thermal-sensors = <&tsc 2>;
2745 sustainable-power = <2439>;
2747 trips {
2748 target: trip-point1 {
2749 /* miliCelsius */
2750 temperature = <100000>;
2751 hysteresis = <1000>;
2752 type = "passive";
2753 };
2755 sensor3_crit: sensor3-crit {
2756 temperature = <120000>;
2757 hysteresis = <1000>;
2758 type = "critical";
2759 };
2760 };
2762 cooling-maps {
2763 map0 {
2764 trip = <&target>;
2765 cooling-device = <&a57_0 2 4>;
2766 contribution = <1024>;
2767 };
2768 };
2769 };
2770 };
2772 timer {
2773 compatible = "arm,armv8-timer";
2774 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2775 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2776 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2777 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2778 };
2780 /* External USB clocks - can be overridden by the board */
2781 usb3s0_clk: usb3s0 {
2782 compatible = "fixed-clock";
2783 #clock-cells = <0>;
2784 clock-frequency = <0>;
2785 };
2787 usb_extal_clk: usb_extal {
2788 compatible = "fixed-clock";
2789 #clock-cells = <0>;
2790 clock-frequency = <0>;
2791 };
2792 };