| blob | 87d41bc076a99d95dc327bf5324a679c0156f367 |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car E3 (R8A77990) SoC
4 *
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
6 */
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77990-sysc.h>
12 / {
13 compatible = "renesas,r8a77990";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 aliases {
18 i2c0 = &i2c0;
19 i2c1 = &i2c1;
20 i2c2 = &i2c2;
21 i2c3 = &i2c3;
22 i2c4 = &i2c4;
23 i2c5 = &i2c5;
24 i2c6 = &i2c6;
25 i2c7 = &i2c7;
26 };
28 /*
29 * The external audio clocks are configured as 0 Hz fixed frequency
30 * clocks by default.
31 * Boards that provide audio clocks should override them.
32 */
33 audio_clk_a: audio_clk_a {
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <0>;
37 };
39 audio_clk_b: audio_clk_b {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <0>;
43 };
45 audio_clk_c: audio_clk_c {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <0>;
49 };
51 /* External CAN clock - to be overridden by boards that provide it */
52 can_clk: can {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <0>;
56 };
58 cluster1_opp: opp_table10 {
59 compatible = "operating-points-v2";
60 opp-shared;
61 opp-800000000 {
62 opp-hz = /bits/ 64 <800000000>;
63 opp-microvolt = <820000>;
64 clock-latency-ns = <300000>;
65 };
66 opp-1000000000 {
67 opp-hz = /bits/ 64 <1000000000>;
68 opp-microvolt = <820000>;
69 clock-latency-ns = <300000>;
70 };
71 opp-1200000000 {
72 opp-hz = /bits/ 64 <1200000000>;
73 opp-microvolt = <820000>;
74 clock-latency-ns = <300000>;
75 opp-suspend;
76 };
77 };
79 cpus {
80 #address-cells = <1>;
81 #size-cells = <0>;
83 a53_0: cpu@0 {
84 compatible = "arm,cortex-a53";
85 reg = <0>;
86 device_type = "cpu";
87 #cooling-cells = <2>;
88 power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
89 next-level-cache = <&L2_CA53>;
90 enable-method = "psci";
91 cpu-idle-states = <&CPU_SLEEP_0>;
92 dynamic-power-coefficient = <277>;
93 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
94 operating-points-v2 = <&cluster1_opp>;
95 };
97 a53_1: cpu@1 {
98 compatible = "arm,cortex-a53";
99 reg = <1>;
100 device_type = "cpu";
101 power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
102 next-level-cache = <&L2_CA53>;
103 enable-method = "psci";
104 cpu-idle-states = <&CPU_SLEEP_0>;
105 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
106 operating-points-v2 = <&cluster1_opp>;
107 };
109 L2_CA53: cache-controller-0 {
110 compatible = "cache";
111 power-domains = <&sysc R8A77990_PD_CA53_SCU>;
112 cache-unified;
113 cache-level = <2>;
114 };
116 idle-states {
117 entry-method = "psci";
119 CPU_SLEEP_0: cpu-sleep-0 {
120 compatible = "arm,idle-state";
121 arm,psci-suspend-param = <0x0010000>;
122 local-timer-stop;
123 entry-latency-us = <700>;
124 exit-latency-us = <700>;
125 min-residency-us = <5000>;
126 };
127 };
128 };
130 extal_clk: extal {
131 compatible = "fixed-clock";
132 #clock-cells = <0>;
133 /* This value must be overridden by the board */
134 clock-frequency = <0>;
135 };
137 /* External PCIe clock - can be overridden by the board */
138 pcie_bus_clk: pcie_bus {
139 compatible = "fixed-clock";
140 #clock-cells = <0>;
141 clock-frequency = <0>;
142 };
144 pmu_a53 {
145 compatible = "arm,cortex-a53-pmu";
146 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
147 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
148 interrupt-affinity = <&a53_0>, <&a53_1>;
149 };
151 psci {
152 compatible = "arm,psci-1.0", "arm,psci-0.2";
153 method = "smc";
154 };
156 /* External SCIF clock - to be overridden by boards that provide it */
157 scif_clk: scif {
158 compatible = "fixed-clock";
159 #clock-cells = <0>;
160 clock-frequency = <0>;
161 };
163 soc: soc {
164 compatible = "simple-bus";
165 interrupt-parent = <&gic>;
166 #address-cells = <2>;
167 #size-cells = <2>;
168 ranges;
170 rwdt: watchdog@e6020000 {
171 compatible = "renesas,r8a77990-wdt",
172 "renesas,rcar-gen3-wdt";
173 reg = <0 0xe6020000 0 0x0c>;
174 clocks = <&cpg CPG_MOD 402>;
175 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
176 resets = <&cpg 402>;
177 status = "disabled";
178 };
180 gpio0: gpio@e6050000 {
181 compatible = "renesas,gpio-r8a77990",
182 "renesas,rcar-gen3-gpio";
183 reg = <0 0xe6050000 0 0x50>;
184 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
185 #gpio-cells = <2>;
186 gpio-controller;
187 gpio-ranges = <&pfc 0 0 18>;
188 #interrupt-cells = <2>;
189 interrupt-controller;
190 clocks = <&cpg CPG_MOD 912>;
191 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
192 resets = <&cpg 912>;
193 };
195 gpio1: gpio@e6051000 {
196 compatible = "renesas,gpio-r8a77990",
197 "renesas,rcar-gen3-gpio";
198 reg = <0 0xe6051000 0 0x50>;
199 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
200 #gpio-cells = <2>;
201 gpio-controller;
202 gpio-ranges = <&pfc 0 32 23>;
203 #interrupt-cells = <2>;
204 interrupt-controller;
205 clocks = <&cpg CPG_MOD 911>;
206 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
207 resets = <&cpg 911>;
208 };
210 gpio2: gpio@e6052000 {
211 compatible = "renesas,gpio-r8a77990",
212 "renesas,rcar-gen3-gpio";
213 reg = <0 0xe6052000 0 0x50>;
214 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
215 #gpio-cells = <2>;
216 gpio-controller;
217 gpio-ranges = <&pfc 0 64 26>;
218 #interrupt-cells = <2>;
219 interrupt-controller;
220 clocks = <&cpg CPG_MOD 910>;
221 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
222 resets = <&cpg 910>;
223 };
225 gpio3: gpio@e6053000 {
226 compatible = "renesas,gpio-r8a77990",
227 "renesas,rcar-gen3-gpio";
228 reg = <0 0xe6053000 0 0x50>;
229 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
230 #gpio-cells = <2>;
231 gpio-controller;
232 gpio-ranges = <&pfc 0 96 16>;
233 #interrupt-cells = <2>;
234 interrupt-controller;
235 clocks = <&cpg CPG_MOD 909>;
236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
237 resets = <&cpg 909>;
238 };
240 gpio4: gpio@e6054000 {
241 compatible = "renesas,gpio-r8a77990",
242 "renesas,rcar-gen3-gpio";
243 reg = <0 0xe6054000 0 0x50>;
244 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
245 #gpio-cells = <2>;
246 gpio-controller;
247 gpio-ranges = <&pfc 0 128 11>;
248 #interrupt-cells = <2>;
249 interrupt-controller;
250 clocks = <&cpg CPG_MOD 908>;
251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
252 resets = <&cpg 908>;
253 };
255 gpio5: gpio@e6055000 {
256 compatible = "renesas,gpio-r8a77990",
257 "renesas,rcar-gen3-gpio";
258 reg = <0 0xe6055000 0 0x50>;
259 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
260 #gpio-cells = <2>;
261 gpio-controller;
262 gpio-ranges = <&pfc 0 160 20>;
263 #interrupt-cells = <2>;
264 interrupt-controller;
265 clocks = <&cpg CPG_MOD 907>;
266 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
267 resets = <&cpg 907>;
268 };
270 gpio6: gpio@e6055400 {
271 compatible = "renesas,gpio-r8a77990",
272 "renesas,rcar-gen3-gpio";
273 reg = <0 0xe6055400 0 0x50>;
274 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
275 #gpio-cells = <2>;
276 gpio-controller;
277 gpio-ranges = <&pfc 0 192 18>;
278 #interrupt-cells = <2>;
279 interrupt-controller;
280 clocks = <&cpg CPG_MOD 906>;
281 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
282 resets = <&cpg 906>;
283 };
285 pfc: pinctrl@e6060000 {
286 compatible = "renesas,pfc-r8a77990";
287 reg = <0 0xe6060000 0 0x508>;
288 };
290 i2c_dvfs: i2c@e60b0000 {
291 #address-cells = <1>;
292 #size-cells = <0>;
293 compatible = "renesas,iic-r8a77990";
294 reg = <0 0xe60b0000 0 0x15>;
295 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
296 clocks = <&cpg CPG_MOD 926>;
297 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
298 resets = <&cpg 926>;
299 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
300 dma-names = "tx", "rx";
301 status = "disabled";
302 };
304 cmt0: timer@e60f0000 {
305 compatible = "renesas,r8a77990-cmt0",
306 "renesas,rcar-gen3-cmt0";
307 reg = <0 0xe60f0000 0 0x1004>;
308 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
309 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
310 clocks = <&cpg CPG_MOD 303>;
311 clock-names = "fck";
312 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
313 resets = <&cpg 303>;
314 status = "disabled";
315 };
317 cmt1: timer@e6130000 {
318 compatible = "renesas,r8a77990-cmt1",
319 "renesas,rcar-gen3-cmt1";
320 reg = <0 0xe6130000 0 0x1004>;
321 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
322 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
323 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
324 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
325 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
326 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
327 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
328 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
329 clocks = <&cpg CPG_MOD 302>;
330 clock-names = "fck";
331 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
332 resets = <&cpg 302>;
333 status = "disabled";
334 };
336 cmt2: timer@e6140000 {
337 compatible = "renesas,r8a77990-cmt1",
338 "renesas,rcar-gen3-cmt1";
339 reg = <0 0xe6140000 0 0x1004>;
340 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
341 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
342 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
348 clocks = <&cpg CPG_MOD 301>;
349 clock-names = "fck";
350 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
351 resets = <&cpg 301>;
352 status = "disabled";
353 };
355 cmt3: timer@e6148000 {
356 compatible = "renesas,r8a77990-cmt1",
357 "renesas,rcar-gen3-cmt1";
358 reg = <0 0xe6148000 0 0x1004>;
359 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
367 clocks = <&cpg CPG_MOD 300>;
368 clock-names = "fck";
369 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
370 resets = <&cpg 300>;
371 status = "disabled";
372 };
374 cpg: clock-controller@e6150000 {
375 compatible = "renesas,r8a77990-cpg-mssr";
376 reg = <0 0xe6150000 0 0x1000>;
377 clocks = <&extal_clk>;
378 clock-names = "extal";
379 #clock-cells = <2>;
380 #power-domain-cells = <0>;
381 #reset-cells = <1>;
382 };
384 rst: reset-controller@e6160000 {
385 compatible = "renesas,r8a77990-rst";
386 reg = <0 0xe6160000 0 0x0200>;
387 };
389 sysc: system-controller@e6180000 {
390 compatible = "renesas,r8a77990-sysc";
391 reg = <0 0xe6180000 0 0x0400>;
392 #power-domain-cells = <1>;
393 };
395 thermal: thermal@e6190000 {
396 compatible = "renesas,thermal-r8a77990";
397 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
398 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
399 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
400 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
401 clocks = <&cpg CPG_MOD 522>;
402 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
403 resets = <&cpg 522>;
404 #thermal-sensor-cells = <0>;
405 };
407 intc_ex: interrupt-controller@e61c0000 {
408 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
409 #interrupt-cells = <2>;
410 interrupt-controller;
411 reg = <0 0xe61c0000 0 0x200>;
412 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
413 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
414 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
415 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
416 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
417 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
418 clocks = <&cpg CPG_MOD 407>;
419 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
420 resets = <&cpg 407>;
421 };
423 i2c0: i2c@e6500000 {
424 #address-cells = <1>;
425 #size-cells = <0>;
426 compatible = "renesas,i2c-r8a77990",
427 "renesas,rcar-gen3-i2c";
428 reg = <0 0xe6500000 0 0x40>;
429 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
430 clocks = <&cpg CPG_MOD 931>;
431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
432 resets = <&cpg 931>;
433 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
434 <&dmac2 0x91>, <&dmac2 0x90>;
435 dma-names = "tx", "rx", "tx", "rx";
436 i2c-scl-internal-delay-ns = <110>;
437 status = "disabled";
438 };
440 i2c1: i2c@e6508000 {
441 #address-cells = <1>;
442 #size-cells = <0>;
443 compatible = "renesas,i2c-r8a77990",
444 "renesas,rcar-gen3-i2c";
445 reg = <0 0xe6508000 0 0x40>;
446 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
447 clocks = <&cpg CPG_MOD 930>;
448 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
449 resets = <&cpg 930>;
450 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
451 <&dmac2 0x93>, <&dmac2 0x92>;
452 dma-names = "tx", "rx", "tx", "rx";
453 i2c-scl-internal-delay-ns = <6>;
454 status = "disabled";
455 };
457 i2c2: i2c@e6510000 {
458 #address-cells = <1>;
459 #size-cells = <0>;
460 compatible = "renesas,i2c-r8a77990",
461 "renesas,rcar-gen3-i2c";
462 reg = <0 0xe6510000 0 0x40>;
463 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
464 clocks = <&cpg CPG_MOD 929>;
465 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
466 resets = <&cpg 929>;
467 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
468 <&dmac2 0x95>, <&dmac2 0x94>;
469 dma-names = "tx", "rx", "tx", "rx";
470 i2c-scl-internal-delay-ns = <6>;
471 status = "disabled";
472 };
474 i2c3: i2c@e66d0000 {
475 #address-cells = <1>;
476 #size-cells = <0>;
477 compatible = "renesas,i2c-r8a77990",
478 "renesas,rcar-gen3-i2c";
479 reg = <0 0xe66d0000 0 0x40>;
480 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
481 clocks = <&cpg CPG_MOD 928>;
482 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
483 resets = <&cpg 928>;
484 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
485 dma-names = "tx", "rx";
486 i2c-scl-internal-delay-ns = <110>;
487 status = "disabled";
488 };
490 i2c4: i2c@e66d8000 {
491 #address-cells = <1>;
492 #size-cells = <0>;
493 compatible = "renesas,i2c-r8a77990",
494 "renesas,rcar-gen3-i2c";
495 reg = <0 0xe66d8000 0 0x40>;
496 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
497 clocks = <&cpg CPG_MOD 927>;
498 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
499 resets = <&cpg 927>;
500 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
501 dma-names = "tx", "rx";
502 i2c-scl-internal-delay-ns = <6>;
503 status = "disabled";
504 };
506 i2c5: i2c@e66e0000 {
507 #address-cells = <1>;
508 #size-cells = <0>;
509 compatible = "renesas,i2c-r8a77990",
510 "renesas,rcar-gen3-i2c";
511 reg = <0 0xe66e0000 0 0x40>;
512 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
513 clocks = <&cpg CPG_MOD 919>;
514 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
515 resets = <&cpg 919>;
516 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
517 dma-names = "tx", "rx";
518 i2c-scl-internal-delay-ns = <6>;
519 status = "disabled";
520 };
522 i2c6: i2c@e66e8000 {
523 #address-cells = <1>;
524 #size-cells = <0>;
525 compatible = "renesas,i2c-r8a77990",
526 "renesas,rcar-gen3-i2c";
527 reg = <0 0xe66e8000 0 0x40>;
528 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
529 clocks = <&cpg CPG_MOD 918>;
530 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
531 resets = <&cpg 918>;
532 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
533 dma-names = "tx", "rx";
534 i2c-scl-internal-delay-ns = <6>;
535 status = "disabled";
536 };
538 i2c7: i2c@e6690000 {
539 #address-cells = <1>;
540 #size-cells = <0>;
541 compatible = "renesas,i2c-r8a77990",
542 "renesas,rcar-gen3-i2c";
543 reg = <0 0xe6690000 0 0x40>;
544 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
545 clocks = <&cpg CPG_MOD 1003>;
546 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
547 resets = <&cpg 1003>;
548 i2c-scl-internal-delay-ns = <6>;
549 status = "disabled";
550 };
552 hscif0: serial@e6540000 {
553 compatible = "renesas,hscif-r8a77990",
554 "renesas,rcar-gen3-hscif",
555 "renesas,hscif";
556 reg = <0 0xe6540000 0 0x60>;
557 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 520>,
559 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
560 <&scif_clk>;
561 clock-names = "fck", "brg_int", "scif_clk";
562 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
563 <&dmac2 0x31>, <&dmac2 0x30>;
564 dma-names = "tx", "rx", "tx", "rx";
565 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
566 resets = <&cpg 520>;
567 status = "disabled";
568 };
570 hscif1: serial@e6550000 {
571 compatible = "renesas,hscif-r8a77990",
572 "renesas,rcar-gen3-hscif",
573 "renesas,hscif";
574 reg = <0 0xe6550000 0 0x60>;
575 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 519>,
577 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
578 <&scif_clk>;
579 clock-names = "fck", "brg_int", "scif_clk";
580 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
581 <&dmac2 0x33>, <&dmac2 0x32>;
582 dma-names = "tx", "rx", "tx", "rx";
583 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
584 resets = <&cpg 519>;
585 status = "disabled";
586 };
588 hscif2: serial@e6560000 {
589 compatible = "renesas,hscif-r8a77990",
590 "renesas,rcar-gen3-hscif",
591 "renesas,hscif";
592 reg = <0 0xe6560000 0 0x60>;
593 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
594 clocks = <&cpg CPG_MOD 518>,
595 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
596 <&scif_clk>;
597 clock-names = "fck", "brg_int", "scif_clk";
598 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
599 <&dmac2 0x35>, <&dmac2 0x34>;
600 dma-names = "tx", "rx", "tx", "rx";
601 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
602 resets = <&cpg 518>;
603 status = "disabled";
604 };
606 hscif3: serial@e66a0000 {
607 compatible = "renesas,hscif-r8a77990",
608 "renesas,rcar-gen3-hscif",
609 "renesas,hscif";
610 reg = <0 0xe66a0000 0 0x60>;
611 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
612 clocks = <&cpg CPG_MOD 517>,
613 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
614 <&scif_clk>;
615 clock-names = "fck", "brg_int", "scif_clk";
616 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
617 dma-names = "tx", "rx";
618 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
619 resets = <&cpg 517>;
620 status = "disabled";
621 };
623 hscif4: serial@e66b0000 {
624 compatible = "renesas,hscif-r8a77990",
625 "renesas,rcar-gen3-hscif",
626 "renesas,hscif";
627 reg = <0 0xe66b0000 0 0x60>;
628 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
629 clocks = <&cpg CPG_MOD 516>,
630 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
631 <&scif_clk>;
632 clock-names = "fck", "brg_int", "scif_clk";
633 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
634 dma-names = "tx", "rx";
635 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
636 resets = <&cpg 516>;
637 status = "disabled";
638 };
640 hsusb: usb@e6590000 {
641 compatible = "renesas,usbhs-r8a77990",
642 "renesas,rcar-gen3-usbhs";
643 reg = <0 0xe6590000 0 0x200>;
644 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
645 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
646 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
647 <&usb_dmac1 0>, <&usb_dmac1 1>;
648 dma-names = "ch0", "ch1", "ch2", "ch3";
649 renesas,buswait = <11>;
650 phys = <&usb2_phy0 3>;
651 phy-names = "usb";
652 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
653 resets = <&cpg 704>, <&cpg 703>;
654 status = "disabled";
655 };
657 usb_dmac0: dma-controller@e65a0000 {
658 compatible = "renesas,r8a77990-usb-dmac",
659 "renesas,usb-dmac";
660 reg = <0 0xe65a0000 0 0x100>;
661 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
662 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
663 interrupt-names = "ch0", "ch1";
664 clocks = <&cpg CPG_MOD 330>;
665 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
666 resets = <&cpg 330>;
667 #dma-cells = <1>;
668 dma-channels = <2>;
669 };
671 usb_dmac1: dma-controller@e65b0000 {
672 compatible = "renesas,r8a77990-usb-dmac",
673 "renesas,usb-dmac";
674 reg = <0 0xe65b0000 0 0x100>;
675 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
676 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
677 interrupt-names = "ch0", "ch1";
678 clocks = <&cpg CPG_MOD 331>;
679 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
680 resets = <&cpg 331>;
681 #dma-cells = <1>;
682 dma-channels = <2>;
683 };
685 arm_cc630p: crypto@e6601000 {
686 compatible = "arm,cryptocell-630p-ree";
687 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
688 reg = <0x0 0xe6601000 0 0x1000>;
689 clocks = <&cpg CPG_MOD 229>;
690 resets = <&cpg 229>;
691 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
692 };
694 dmac0: dma-controller@e6700000 {
695 compatible = "renesas,dmac-r8a77990",
696 "renesas,rcar-dmac";
697 reg = <0 0xe6700000 0 0x10000>;
698 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
699 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
700 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
701 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
702 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
703 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
704 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
709 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
710 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
711 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
712 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
714 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
715 interrupt-names = "error",
716 "ch0", "ch1", "ch2", "ch3",
717 "ch4", "ch5", "ch6", "ch7",
718 "ch8", "ch9", "ch10", "ch11",
719 "ch12", "ch13", "ch14", "ch15";
720 clocks = <&cpg CPG_MOD 219>;
721 clock-names = "fck";
722 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
723 resets = <&cpg 219>;
724 #dma-cells = <1>;
725 dma-channels = <16>;
726 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
727 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
728 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
729 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
730 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
731 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
732 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
733 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
734 };
736 dmac1: dma-controller@e7300000 {
737 compatible = "renesas,dmac-r8a77990",
738 "renesas,rcar-dmac";
739 reg = <0 0xe7300000 0 0x10000>;
740 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
741 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
742 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
744 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
745 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
746 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
747 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
748 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
757 interrupt-names = "error",
758 "ch0", "ch1", "ch2", "ch3",
759 "ch4", "ch5", "ch6", "ch7",
760 "ch8", "ch9", "ch10", "ch11",
761 "ch12", "ch13", "ch14", "ch15";
762 clocks = <&cpg CPG_MOD 218>;
763 clock-names = "fck";
764 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
765 resets = <&cpg 218>;
766 #dma-cells = <1>;
767 dma-channels = <16>;
768 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
769 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
770 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
771 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
772 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
773 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
774 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
775 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
776 };
778 dmac2: dma-controller@e7310000 {
779 compatible = "renesas,dmac-r8a77990",
780 "renesas,rcar-dmac";
781 reg = <0 0xe7310000 0 0x10000>;
782 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
783 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
794 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
796 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
797 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
798 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
799 interrupt-names = "error",
800 "ch0", "ch1", "ch2", "ch3",
801 "ch4", "ch5", "ch6", "ch7",
802 "ch8", "ch9", "ch10", "ch11",
803 "ch12", "ch13", "ch14", "ch15";
804 clocks = <&cpg CPG_MOD 217>;
805 clock-names = "fck";
806 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
807 resets = <&cpg 217>;
808 #dma-cells = <1>;
809 dma-channels = <16>;
810 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
811 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
812 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
813 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
814 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
815 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
816 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
817 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
818 };
820 ipmmu_ds0: iommu@e6740000 {
821 compatible = "renesas,ipmmu-r8a77990";
822 reg = <0 0xe6740000 0 0x1000>;
823 renesas,ipmmu-main = <&ipmmu_mm 0>;
824 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
825 #iommu-cells = <1>;
826 };
828 ipmmu_ds1: iommu@e7740000 {
829 compatible = "renesas,ipmmu-r8a77990";
830 reg = <0 0xe7740000 0 0x1000>;
831 renesas,ipmmu-main = <&ipmmu_mm 1>;
832 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
833 #iommu-cells = <1>;
834 };
836 ipmmu_hc: iommu@e6570000 {
837 compatible = "renesas,ipmmu-r8a77990";
838 reg = <0 0xe6570000 0 0x1000>;
839 renesas,ipmmu-main = <&ipmmu_mm 2>;
840 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
841 #iommu-cells = <1>;
842 };
844 ipmmu_mm: iommu@e67b0000 {
845 compatible = "renesas,ipmmu-r8a77990";
846 reg = <0 0xe67b0000 0 0x1000>;
847 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
849 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
850 #iommu-cells = <1>;
851 };
853 ipmmu_mp: iommu@ec670000 {
854 compatible = "renesas,ipmmu-r8a77990";
855 reg = <0 0xec670000 0 0x1000>;
856 renesas,ipmmu-main = <&ipmmu_mm 4>;
857 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
858 #iommu-cells = <1>;
859 };
861 ipmmu_pv0: iommu@fd800000 {
862 compatible = "renesas,ipmmu-r8a77990";
863 reg = <0 0xfd800000 0 0x1000>;
864 renesas,ipmmu-main = <&ipmmu_mm 6>;
865 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
866 #iommu-cells = <1>;
867 };
869 ipmmu_rt: iommu@ffc80000 {
870 compatible = "renesas,ipmmu-r8a77990";
871 reg = <0 0xffc80000 0 0x1000>;
872 renesas,ipmmu-main = <&ipmmu_mm 10>;
873 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
874 #iommu-cells = <1>;
875 };
877 ipmmu_vc0: iommu@fe6b0000 {
878 compatible = "renesas,ipmmu-r8a77990";
879 reg = <0 0xfe6b0000 0 0x1000>;
880 renesas,ipmmu-main = <&ipmmu_mm 12>;
881 power-domains = <&sysc R8A77990_PD_A3VC>;
882 #iommu-cells = <1>;
883 };
885 ipmmu_vi0: iommu@febd0000 {
886 compatible = "renesas,ipmmu-r8a77990";
887 reg = <0 0xfebd0000 0 0x1000>;
888 renesas,ipmmu-main = <&ipmmu_mm 14>;
889 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
890 #iommu-cells = <1>;
891 };
893 ipmmu_vp0: iommu@fe990000 {
894 compatible = "renesas,ipmmu-r8a77990";
895 reg = <0 0xfe990000 0 0x1000>;
896 renesas,ipmmu-main = <&ipmmu_mm 16>;
897 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
898 #iommu-cells = <1>;
899 };
901 avb: ethernet@e6800000 {
902 compatible = "renesas,etheravb-r8a77990",
903 "renesas,etheravb-rcar-gen3";
904 reg = <0 0xe6800000 0 0x800>;
905 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
908 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
909 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
910 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
911 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
912 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
913 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
914 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
915 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
916 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
917 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
918 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
919 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
920 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
921 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
922 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
923 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
924 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
925 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
926 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
927 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
928 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
929 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
930 interrupt-names = "ch0", "ch1", "ch2", "ch3",
931 "ch4", "ch5", "ch6", "ch7",
932 "ch8", "ch9", "ch10", "ch11",
933 "ch12", "ch13", "ch14", "ch15",
934 "ch16", "ch17", "ch18", "ch19",
935 "ch20", "ch21", "ch22", "ch23",
936 "ch24";
937 clocks = <&cpg CPG_MOD 812>;
938 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
939 resets = <&cpg 812>;
940 phy-mode = "rgmii";
941 rx-internal-delay-ps = <0>;
942 iommus = <&ipmmu_ds0 16>;
943 #address-cells = <1>;
944 #size-cells = <0>;
945 status = "disabled";
946 };
948 can0: can@e6c30000 {
949 compatible = "renesas,can-r8a77990",
950 "renesas,rcar-gen3-can";
951 reg = <0 0xe6c30000 0 0x1000>;
952 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
953 clocks = <&cpg CPG_MOD 916>,
954 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
955 <&can_clk>;
956 clock-names = "clkp1", "clkp2", "can_clk";
957 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
958 assigned-clock-rates = <40000000>;
959 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
960 resets = <&cpg 916>;
961 status = "disabled";
962 };
964 can1: can@e6c38000 {
965 compatible = "renesas,can-r8a77990",
966 "renesas,rcar-gen3-can";
967 reg = <0 0xe6c38000 0 0x1000>;
968 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
969 clocks = <&cpg CPG_MOD 915>,
970 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
971 <&can_clk>;
972 clock-names = "clkp1", "clkp2", "can_clk";
973 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
974 assigned-clock-rates = <40000000>;
975 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
976 resets = <&cpg 915>;
977 status = "disabled";
978 };
980 canfd: can@e66c0000 {
981 compatible = "renesas,r8a77990-canfd",
982 "renesas,rcar-gen3-canfd";
983 reg = <0 0xe66c0000 0 0x8000>;
984 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
985 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
986 clocks = <&cpg CPG_MOD 914>,
987 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
988 <&can_clk>;
989 clock-names = "fck", "canfd", "can_clk";
990 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
991 assigned-clock-rates = <40000000>;
992 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
993 resets = <&cpg 914>;
994 status = "disabled";
996 channel0 {
997 status = "disabled";
998 };
1000 channel1 {
1001 status = "disabled";
1002 };
1003 };
1005 pwm0: pwm@e6e30000 {
1006 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1007 reg = <0 0xe6e30000 0 0x8>;
1008 clocks = <&cpg CPG_MOD 523>;
1009 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1010 resets = <&cpg 523>;
1011 #pwm-cells = <2>;
1012 status = "disabled";
1013 };
1015 pwm1: pwm@e6e31000 {
1016 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1017 reg = <0 0xe6e31000 0 0x8>;
1018 clocks = <&cpg CPG_MOD 523>;
1019 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1020 resets = <&cpg 523>;
1021 #pwm-cells = <2>;
1022 status = "disabled";
1023 };
1025 pwm2: pwm@e6e32000 {
1026 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1027 reg = <0 0xe6e32000 0 0x8>;
1028 clocks = <&cpg CPG_MOD 523>;
1029 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1030 resets = <&cpg 523>;
1031 #pwm-cells = <2>;
1032 status = "disabled";
1033 };
1035 pwm3: pwm@e6e33000 {
1036 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1037 reg = <0 0xe6e33000 0 0x8>;
1038 clocks = <&cpg CPG_MOD 523>;
1039 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1040 resets = <&cpg 523>;
1041 #pwm-cells = <2>;
1042 status = "disabled";
1043 };
1045 pwm4: pwm@e6e34000 {
1046 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1047 reg = <0 0xe6e34000 0 0x8>;
1048 clocks = <&cpg CPG_MOD 523>;
1049 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1050 resets = <&cpg 523>;
1051 #pwm-cells = <2>;
1052 status = "disabled";
1053 };
1055 pwm5: pwm@e6e35000 {
1056 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1057 reg = <0 0xe6e35000 0 0x8>;
1058 clocks = <&cpg CPG_MOD 523>;
1059 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1060 resets = <&cpg 523>;
1061 #pwm-cells = <2>;
1062 status = "disabled";
1063 };
1065 pwm6: pwm@e6e36000 {
1066 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1067 reg = <0 0xe6e36000 0 0x8>;
1068 clocks = <&cpg CPG_MOD 523>;
1069 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1070 resets = <&cpg 523>;
1071 #pwm-cells = <2>;
1072 status = "disabled";
1073 };
1075 scif0: serial@e6e60000 {
1076 compatible = "renesas,scif-r8a77990",
1077 "renesas,rcar-gen3-scif", "renesas,scif";
1078 reg = <0 0xe6e60000 0 64>;
1079 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1080 clocks = <&cpg CPG_MOD 207>,
1081 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1082 <&scif_clk>;
1083 clock-names = "fck", "brg_int", "scif_clk";
1084 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1085 <&dmac2 0x51>, <&dmac2 0x50>;
1086 dma-names = "tx", "rx", "tx", "rx";
1087 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1088 resets = <&cpg 207>;
1089 status = "disabled";
1090 };
1092 scif1: serial@e6e68000 {
1093 compatible = "renesas,scif-r8a77990",
1094 "renesas,rcar-gen3-scif", "renesas,scif";
1095 reg = <0 0xe6e68000 0 64>;
1096 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1097 clocks = <&cpg CPG_MOD 206>,
1098 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1099 <&scif_clk>;
1100 clock-names = "fck", "brg_int", "scif_clk";
1101 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1102 <&dmac2 0x53>, <&dmac2 0x52>;
1103 dma-names = "tx", "rx", "tx", "rx";
1104 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1105 resets = <&cpg 206>;
1106 status = "disabled";
1107 };
1109 scif2: serial@e6e88000 {
1110 compatible = "renesas,scif-r8a77990",
1111 "renesas,rcar-gen3-scif", "renesas,scif";
1112 reg = <0 0xe6e88000 0 64>;
1113 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1114 clocks = <&cpg CPG_MOD 310>,
1115 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1116 <&scif_clk>;
1117 clock-names = "fck", "brg_int", "scif_clk";
1118 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1119 <&dmac2 0x13>, <&dmac2 0x12>;
1120 dma-names = "tx", "rx", "tx", "rx";
1121 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1122 resets = <&cpg 310>;
1123 status = "disabled";
1124 };
1126 scif3: serial@e6c50000 {
1127 compatible = "renesas,scif-r8a77990",
1128 "renesas,rcar-gen3-scif", "renesas,scif";
1129 reg = <0 0xe6c50000 0 64>;
1130 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1131 clocks = <&cpg CPG_MOD 204>,
1132 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1133 <&scif_clk>;
1134 clock-names = "fck", "brg_int", "scif_clk";
1135 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1136 dma-names = "tx", "rx";
1137 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1138 resets = <&cpg 204>;
1139 status = "disabled";
1140 };
1142 scif4: serial@e6c40000 {
1143 compatible = "renesas,scif-r8a77990",
1144 "renesas,rcar-gen3-scif", "renesas,scif";
1145 reg = <0 0xe6c40000 0 64>;
1146 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1147 clocks = <&cpg CPG_MOD 203>,
1148 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1149 <&scif_clk>;
1150 clock-names = "fck", "brg_int", "scif_clk";
1151 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1152 dma-names = "tx", "rx";
1153 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1154 resets = <&cpg 203>;
1155 status = "disabled";
1156 };
1158 scif5: serial@e6f30000 {
1159 compatible = "renesas,scif-r8a77990",
1160 "renesas,rcar-gen3-scif", "renesas,scif";
1161 reg = <0 0xe6f30000 0 64>;
1162 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1163 clocks = <&cpg CPG_MOD 202>,
1164 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1165 <&scif_clk>;
1166 clock-names = "fck", "brg_int", "scif_clk";
1167 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1168 dma-names = "tx", "rx";
1169 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1170 resets = <&cpg 202>;
1171 status = "disabled";
1172 };
1174 msiof0: spi@e6e90000 {
1175 compatible = "renesas,msiof-r8a77990",
1176 "renesas,rcar-gen3-msiof";
1177 reg = <0 0xe6e90000 0 0x0064>;
1178 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1179 clocks = <&cpg CPG_MOD 211>;
1180 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1181 <&dmac2 0x41>, <&dmac2 0x40>;
1182 dma-names = "tx", "rx", "tx", "rx";
1183 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1184 resets = <&cpg 211>;
1185 #address-cells = <1>;
1186 #size-cells = <0>;
1187 status = "disabled";
1188 };
1190 msiof1: spi@e6ea0000 {
1191 compatible = "renesas,msiof-r8a77990",
1192 "renesas,rcar-gen3-msiof";
1193 reg = <0 0xe6ea0000 0 0x0064>;
1194 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1195 clocks = <&cpg CPG_MOD 210>;
1196 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1197 dma-names = "tx", "rx";
1198 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1199 resets = <&cpg 210>;
1200 #address-cells = <1>;
1201 #size-cells = <0>;
1202 status = "disabled";
1203 };
1205 msiof2: spi@e6c00000 {
1206 compatible = "renesas,msiof-r8a77990",
1207 "renesas,rcar-gen3-msiof";
1208 reg = <0 0xe6c00000 0 0x0064>;
1209 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MOD 209>;
1211 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1212 dma-names = "tx", "rx";
1213 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1214 resets = <&cpg 209>;
1215 #address-cells = <1>;
1216 #size-cells = <0>;
1217 status = "disabled";
1218 };
1220 msiof3: spi@e6c10000 {
1221 compatible = "renesas,msiof-r8a77990",
1222 "renesas,rcar-gen3-msiof";
1223 reg = <0 0xe6c10000 0 0x0064>;
1224 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1225 clocks = <&cpg CPG_MOD 208>;
1226 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1227 dma-names = "tx", "rx";
1228 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1229 resets = <&cpg 208>;
1230 #address-cells = <1>;
1231 #size-cells = <0>;
1232 status = "disabled";
1233 };
1235 vin4: video@e6ef4000 {
1236 compatible = "renesas,vin-r8a77990";
1237 reg = <0 0xe6ef4000 0 0x1000>;
1238 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1239 clocks = <&cpg CPG_MOD 807>;
1240 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1241 resets = <&cpg 807>;
1242 renesas,id = <4>;
1243 status = "disabled";
1245 ports {
1246 #address-cells = <1>;
1247 #size-cells = <0>;
1249 port@1 {
1250 #address-cells = <1>;
1251 #size-cells = <0>;
1253 reg = <1>;
1255 vin4csi40: endpoint@2 {
1256 reg = <2>;
1257 remote-endpoint= <&csi40vin4>;
1258 };
1259 };
1260 };
1261 };
1263 vin5: video@e6ef5000 {
1264 compatible = "renesas,vin-r8a77990";
1265 reg = <0 0xe6ef5000 0 0x1000>;
1266 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1267 clocks = <&cpg CPG_MOD 806>;
1268 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1269 resets = <&cpg 806>;
1270 renesas,id = <5>;
1271 status = "disabled";
1273 ports {
1274 #address-cells = <1>;
1275 #size-cells = <0>;
1277 port@1 {
1278 #address-cells = <1>;
1279 #size-cells = <0>;
1281 reg = <1>;
1283 vin5csi40: endpoint@2 {
1284 reg = <2>;
1285 remote-endpoint= <&csi40vin5>;
1286 };
1287 };
1288 };
1289 };
1291 drif00: rif@e6f40000 {
1292 compatible = "renesas,r8a77990-drif",
1293 "renesas,rcar-gen3-drif";
1294 reg = <0 0xe6f40000 0 0x84>;
1295 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1296 clocks = <&cpg CPG_MOD 515>;
1297 clock-names = "fck";
1298 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1299 dma-names = "rx", "rx";
1300 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1301 resets = <&cpg 515>;
1302 renesas,bonding = <&drif01>;
1303 status = "disabled";
1304 };
1306 drif01: rif@e6f50000 {
1307 compatible = "renesas,r8a77990-drif",
1308 "renesas,rcar-gen3-drif";
1309 reg = <0 0xe6f50000 0 0x84>;
1310 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1311 clocks = <&cpg CPG_MOD 514>;
1312 clock-names = "fck";
1313 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1314 dma-names = "rx", "rx";
1315 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1316 resets = <&cpg 514>;
1317 renesas,bonding = <&drif00>;
1318 status = "disabled";
1319 };
1321 drif10: rif@e6f60000 {
1322 compatible = "renesas,r8a77990-drif",
1323 "renesas,rcar-gen3-drif";
1324 reg = <0 0xe6f60000 0 0x84>;
1325 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1326 clocks = <&cpg CPG_MOD 513>;
1327 clock-names = "fck";
1328 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1329 dma-names = "rx", "rx";
1330 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1331 resets = <&cpg 513>;
1332 renesas,bonding = <&drif11>;
1333 status = "disabled";
1334 };
1336 drif11: rif@e6f70000 {
1337 compatible = "renesas,r8a77990-drif",
1338 "renesas,rcar-gen3-drif";
1339 reg = <0 0xe6f70000 0 0x84>;
1340 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1341 clocks = <&cpg CPG_MOD 512>;
1342 clock-names = "fck";
1343 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1344 dma-names = "rx", "rx";
1345 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1346 resets = <&cpg 512>;
1347 renesas,bonding = <&drif10>;
1348 status = "disabled";
1349 };
1351 drif20: rif@e6f80000 {
1352 compatible = "renesas,r8a77990-drif",
1353 "renesas,rcar-gen3-drif";
1354 reg = <0 0xe6f80000 0 0x84>;
1355 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1356 clocks = <&cpg CPG_MOD 511>;
1357 clock-names = "fck";
1358 dmas = <&dmac0 0x28>;
1359 dma-names = "rx";
1360 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1361 resets = <&cpg 511>;
1362 renesas,bonding = <&drif21>;
1363 status = "disabled";
1364 };
1366 drif21: rif@e6f90000 {
1367 compatible = "renesas,r8a77990-drif",
1368 "renesas,rcar-gen3-drif";
1369 reg = <0 0xe6f90000 0 0x84>;
1370 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1371 clocks = <&cpg CPG_MOD 510>;
1372 clock-names = "fck";
1373 dmas = <&dmac0 0x2a>;
1374 dma-names = "rx";
1375 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1376 resets = <&cpg 510>;
1377 renesas,bonding = <&drif20>;
1378 status = "disabled";
1379 };
1381 drif30: rif@e6fa0000 {
1382 compatible = "renesas,r8a77990-drif",
1383 "renesas,rcar-gen3-drif";
1384 reg = <0 0xe6fa0000 0 0x84>;
1385 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1386 clocks = <&cpg CPG_MOD 509>;
1387 clock-names = "fck";
1388 dmas = <&dmac0 0x2c>;
1389 dma-names = "rx";
1390 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1391 resets = <&cpg 509>;
1392 renesas,bonding = <&drif31>;
1393 status = "disabled";
1394 };
1396 drif31: rif@e6fb0000 {
1397 compatible = "renesas,r8a77990-drif",
1398 "renesas,rcar-gen3-drif";
1399 reg = <0 0xe6fb0000 0 0x84>;
1400 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1401 clocks = <&cpg CPG_MOD 508>;
1402 clock-names = "fck";
1403 dmas = <&dmac0 0x2e>;
1404 dma-names = "rx";
1405 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1406 resets = <&cpg 508>;
1407 renesas,bonding = <&drif30>;
1408 status = "disabled";
1409 };
1411 rcar_sound: sound@ec500000 {
1412 /*
1413 * #sound-dai-cells is required
1414 *
1415 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1416 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1417 */
1418 /*
1419 * #clock-cells is required for audio_clkout0/1/2/3
1420 *
1421 * clkout : #clock-cells = <0>; <&rcar_sound>;
1422 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1423 */
1424 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1425 reg = <0 0xec500000 0 0x1000>, /* SCU */
1426 <0 0xec5a0000 0 0x100>, /* ADG */
1427 <0 0xec540000 0 0x1000>, /* SSIU */
1428 <0 0xec541000 0 0x280>, /* SSI */
1429 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1430 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1432 clocks = <&cpg CPG_MOD 1005>,
1433 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1434 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1435 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1436 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1437 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1438 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1439 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1440 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1441 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1442 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1443 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1444 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1445 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1446 <&audio_clk_a>, <&audio_clk_b>,
1447 <&audio_clk_c>,
1448 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1449 clock-names = "ssi-all",
1450 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1451 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1452 "ssi.1", "ssi.0",
1453 "src.9", "src.8", "src.7", "src.6",
1454 "src.5", "src.4", "src.3", "src.2",
1455 "src.1", "src.0",
1456 "mix.1", "mix.0",
1457 "ctu.1", "ctu.0",
1458 "dvc.0", "dvc.1",
1459 "clk_a", "clk_b", "clk_c", "clk_i";
1460 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1461 resets = <&cpg 1005>,
1462 <&cpg 1006>, <&cpg 1007>,
1463 <&cpg 1008>, <&cpg 1009>,
1464 <&cpg 1010>, <&cpg 1011>,
1465 <&cpg 1012>, <&cpg 1013>,
1466 <&cpg 1014>, <&cpg 1015>;
1467 reset-names = "ssi-all",
1468 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1469 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1470 "ssi.1", "ssi.0";
1471 status = "disabled";
1473 rcar_sound,ctu {
1474 ctu00: ctu-0 { };
1475 ctu01: ctu-1 { };
1476 ctu02: ctu-2 { };
1477 ctu03: ctu-3 { };
1478 ctu10: ctu-4 { };
1479 ctu11: ctu-5 { };
1480 ctu12: ctu-6 { };
1481 ctu13: ctu-7 { };
1482 };
1484 rcar_sound,dvc {
1485 dvc0: dvc-0 {
1486 dmas = <&audma0 0xbc>;
1487 dma-names = "tx";
1488 };
1489 dvc1: dvc-1 {
1490 dmas = <&audma0 0xbe>;
1491 dma-names = "tx";
1492 };
1493 };
1495 rcar_sound,mix {
1496 mix0: mix-0 { };
1497 mix1: mix-1 { };
1498 };
1500 rcar_sound,src {
1501 src0: src-0 {
1502 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1503 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1504 dma-names = "rx", "tx";
1505 };
1506 src1: src-1 {
1507 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1508 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1509 dma-names = "rx", "tx";
1510 };
1511 src2: src-2 {
1512 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1513 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1514 dma-names = "rx", "tx";
1515 };
1516 src3: src-3 {
1517 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1518 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1519 dma-names = "rx", "tx";
1520 };
1521 src4: src-4 {
1522 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1523 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1524 dma-names = "rx", "tx";
1525 };
1526 src5: src-5 {
1527 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1528 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1529 dma-names = "rx", "tx";
1530 };
1531 src6: src-6 {
1532 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1533 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1534 dma-names = "rx", "tx";
1535 };
1536 src7: src-7 {
1537 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1538 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1539 dma-names = "rx", "tx";
1540 };
1541 src8: src-8 {
1542 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1543 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1544 dma-names = "rx", "tx";
1545 };
1546 src9: src-9 {
1547 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1548 dmas = <&audma0 0x97>, <&audma0 0xba>;
1549 dma-names = "rx", "tx";
1550 };
1551 };
1553 rcar_sound,ssi {
1554 ssi0: ssi-0 {
1555 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1556 dmas = <&audma0 0x01>, <&audma0 0x02>,
1557 <&audma0 0x15>, <&audma0 0x16>;
1558 dma-names = "rx", "tx", "rxu", "txu";
1559 };
1560 ssi1: ssi-1 {
1561 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1562 dmas = <&audma0 0x03>, <&audma0 0x04>,
1563 <&audma0 0x49>, <&audma0 0x4a>;
1564 dma-names = "rx", "tx", "rxu", "txu";
1565 };
1566 ssi2: ssi-2 {
1567 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1568 dmas = <&audma0 0x05>, <&audma0 0x06>,
1569 <&audma0 0x63>, <&audma0 0x64>;
1570 dma-names = "rx", "tx", "rxu", "txu";
1571 };
1572 ssi3: ssi-3 {
1573 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1574 dmas = <&audma0 0x07>, <&audma0 0x08>,
1575 <&audma0 0x6f>, <&audma0 0x70>;
1576 dma-names = "rx", "tx", "rxu", "txu";
1577 };
1578 ssi4: ssi-4 {
1579 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1580 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1581 <&audma0 0x71>, <&audma0 0x72>;
1582 dma-names = "rx", "tx", "rxu", "txu";
1583 };
1584 ssi5: ssi-5 {
1585 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1587 <&audma0 0x73>, <&audma0 0x74>;
1588 dma-names = "rx", "tx", "rxu", "txu";
1589 };
1590 ssi6: ssi-6 {
1591 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1592 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1593 <&audma0 0x75>, <&audma0 0x76>;
1594 dma-names = "rx", "tx", "rxu", "txu";
1595 };
1596 ssi7: ssi-7 {
1597 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1598 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1599 <&audma0 0x79>, <&audma0 0x7a>;
1600 dma-names = "rx", "tx", "rxu", "txu";
1601 };
1602 ssi8: ssi-8 {
1603 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1604 dmas = <&audma0 0x11>, <&audma0 0x12>,
1605 <&audma0 0x7b>, <&audma0 0x7c>;
1606 dma-names = "rx", "tx", "rxu", "txu";
1607 };
1608 ssi9: ssi-9 {
1609 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1610 dmas = <&audma0 0x13>, <&audma0 0x14>,
1611 <&audma0 0x7d>, <&audma0 0x7e>;
1612 dma-names = "rx", "tx", "rxu", "txu";
1613 };
1614 };
1615 };
1617 audma0: dma-controller@ec700000 {
1618 compatible = "renesas,dmac-r8a77990",
1619 "renesas,rcar-dmac";
1620 reg = <0 0xec700000 0 0x10000>;
1621 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1622 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1623 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1624 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1625 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1626 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1627 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1628 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1629 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1630 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1631 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1632 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1633 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1634 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1635 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1636 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1637 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1638 interrupt-names = "error",
1639 "ch0", "ch1", "ch2", "ch3",
1640 "ch4", "ch5", "ch6", "ch7",
1641 "ch8", "ch9", "ch10", "ch11",
1642 "ch12", "ch13", "ch14", "ch15";
1643 clocks = <&cpg CPG_MOD 502>;
1644 clock-names = "fck";
1645 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1646 resets = <&cpg 502>;
1647 #dma-cells = <1>;
1648 dma-channels = <16>;
1649 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1650 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1651 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1652 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1653 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1654 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1655 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1656 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1657 };
1659 xhci0: usb@ee000000 {
1660 compatible = "renesas,xhci-r8a77990",
1661 "renesas,rcar-gen3-xhci";
1662 reg = <0 0xee000000 0 0xc00>;
1663 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1664 clocks = <&cpg CPG_MOD 328>;
1665 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1666 resets = <&cpg 328>;
1667 status = "disabled";
1668 };
1670 usb3_peri0: usb@ee020000 {
1671 compatible = "renesas,r8a77990-usb3-peri",
1672 "renesas,rcar-gen3-usb3-peri";
1673 reg = <0 0xee020000 0 0x400>;
1674 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1675 clocks = <&cpg CPG_MOD 328>;
1676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1677 resets = <&cpg 328>;
1678 status = "disabled";
1679 };
1681 ohci0: usb@ee080000 {
1682 compatible = "generic-ohci";
1683 reg = <0 0xee080000 0 0x100>;
1684 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1685 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1686 phys = <&usb2_phy0 1>;
1687 phy-names = "usb";
1688 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1689 resets = <&cpg 703>, <&cpg 704>;
1690 status = "disabled";
1691 };
1693 ehci0: usb@ee080100 {
1694 compatible = "generic-ehci";
1695 reg = <0 0xee080100 0 0x100>;
1696 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1697 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1698 phys = <&usb2_phy0 2>;
1699 phy-names = "usb";
1700 companion = <&ohci0>;
1701 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1702 resets = <&cpg 703>, <&cpg 704>;
1703 status = "disabled";
1704 };
1706 usb2_phy0: usb-phy@ee080200 {
1707 compatible = "renesas,usb2-phy-r8a77990",
1708 "renesas,rcar-gen3-usb2-phy";
1709 reg = <0 0xee080200 0 0x700>;
1710 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1711 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1712 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1713 resets = <&cpg 703>, <&cpg 704>;
1714 #phy-cells = <1>;
1715 status = "disabled";
1716 };
1718 sdhi0: mmc@ee100000 {
1719 compatible = "renesas,sdhi-r8a77990",
1720 "renesas,rcar-gen3-sdhi";
1721 reg = <0 0xee100000 0 0x2000>;
1722 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1723 clocks = <&cpg CPG_MOD 314>;
1724 max-frequency = <200000000>;
1725 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1726 resets = <&cpg 314>;
1727 iommus = <&ipmmu_ds1 32>;
1728 status = "disabled";
1729 };
1731 sdhi1: mmc@ee120000 {
1732 compatible = "renesas,sdhi-r8a77990",
1733 "renesas,rcar-gen3-sdhi";
1734 reg = <0 0xee120000 0 0x2000>;
1735 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1736 clocks = <&cpg CPG_MOD 313>;
1737 max-frequency = <200000000>;
1738 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1739 resets = <&cpg 313>;
1740 iommus = <&ipmmu_ds1 33>;
1741 status = "disabled";
1742 };
1744 sdhi3: mmc@ee160000 {
1745 compatible = "renesas,sdhi-r8a77990",
1746 "renesas,rcar-gen3-sdhi";
1747 reg = <0 0xee160000 0 0x2000>;
1748 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1749 clocks = <&cpg CPG_MOD 311>;
1750 max-frequency = <200000000>;
1751 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1752 resets = <&cpg 311>;
1753 iommus = <&ipmmu_ds1 35>;
1754 status = "disabled";
1755 };
1757 gic: interrupt-controller@f1010000 {
1758 compatible = "arm,gic-400";
1759 #interrupt-cells = <3>;
1760 #address-cells = <0>;
1761 interrupt-controller;
1762 reg = <0x0 0xf1010000 0 0x1000>,
1763 <0x0 0xf1020000 0 0x20000>,
1764 <0x0 0xf1040000 0 0x20000>,
1765 <0x0 0xf1060000 0 0x20000>;
1766 interrupts = <GIC_PPI 9
1767 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1768 clocks = <&cpg CPG_MOD 408>;
1769 clock-names = "clk";
1770 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1771 resets = <&cpg 408>;
1772 };
1774 pciec0: pcie@fe000000 {
1775 compatible = "renesas,pcie-r8a77990",
1776 "renesas,pcie-rcar-gen3";
1777 reg = <0 0xfe000000 0 0x80000>;
1778 #address-cells = <3>;
1779 #size-cells = <2>;
1780 bus-range = <0x00 0xff>;
1781 device_type = "pci";
1782 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1783 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1784 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1785 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1786 /* Map all possible DDR as inbound ranges */
1787 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1788 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1789 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1790 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1791 #interrupt-cells = <1>;
1792 interrupt-map-mask = <0 0 0 0>;
1793 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1794 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1795 clock-names = "pcie", "pcie_bus";
1796 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1797 resets = <&cpg 319>;
1798 status = "disabled";
1799 };
1801 vspb0: vsp@fe960000 {
1802 compatible = "renesas,vsp2";
1803 reg = <0 0xfe960000 0 0x8000>;
1804 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1805 clocks = <&cpg CPG_MOD 626>;
1806 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1807 resets = <&cpg 626>;
1808 renesas,fcp = <&fcpvb0>;
1809 };
1811 fcpvb0: fcp@fe96f000 {
1812 compatible = "renesas,fcpv";
1813 reg = <0 0xfe96f000 0 0x200>;
1814 clocks = <&cpg CPG_MOD 607>;
1815 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1816 resets = <&cpg 607>;
1817 iommus = <&ipmmu_vp0 5>;
1818 };
1820 vspi0: vsp@fe9a0000 {
1821 compatible = "renesas,vsp2";
1822 reg = <0 0xfe9a0000 0 0x8000>;
1823 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1824 clocks = <&cpg CPG_MOD 631>;
1825 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1826 resets = <&cpg 631>;
1827 renesas,fcp = <&fcpvi0>;
1828 };
1830 fcpvi0: fcp@fe9af000 {
1831 compatible = "renesas,fcpv";
1832 reg = <0 0xfe9af000 0 0x200>;
1833 clocks = <&cpg CPG_MOD 611>;
1834 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1835 resets = <&cpg 611>;
1836 iommus = <&ipmmu_vp0 8>;
1837 };
1839 vspd0: vsp@fea20000 {
1840 compatible = "renesas,vsp2";
1841 reg = <0 0xfea20000 0 0x7000>;
1842 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1843 clocks = <&cpg CPG_MOD 623>;
1844 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1845 resets = <&cpg 623>;
1846 renesas,fcp = <&fcpvd0>;
1847 };
1849 fcpvd0: fcp@fea27000 {
1850 compatible = "renesas,fcpv";
1851 reg = <0 0xfea27000 0 0x200>;
1852 clocks = <&cpg CPG_MOD 603>;
1853 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1854 resets = <&cpg 603>;
1855 iommus = <&ipmmu_vi0 8>;
1856 };
1858 vspd1: vsp@fea28000 {
1859 compatible = "renesas,vsp2";
1860 reg = <0 0xfea28000 0 0x7000>;
1861 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1862 clocks = <&cpg CPG_MOD 622>;
1863 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1864 resets = <&cpg 622>;
1865 renesas,fcp = <&fcpvd1>;
1866 };
1868 fcpvd1: fcp@fea2f000 {
1869 compatible = "renesas,fcpv";
1870 reg = <0 0xfea2f000 0 0x200>;
1871 clocks = <&cpg CPG_MOD 602>;
1872 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1873 resets = <&cpg 602>;
1874 iommus = <&ipmmu_vi0 9>;
1875 };
1877 cmm0: cmm@fea40000 {
1878 compatible = "renesas,r8a77990-cmm",
1879 "renesas,rcar-gen3-cmm";
1880 reg = <0 0xfea40000 0 0x1000>;
1881 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1882 clocks = <&cpg CPG_MOD 711>;
1883 resets = <&cpg 711>;
1884 };
1886 cmm1: cmm@fea50000 {
1887 compatible = "renesas,r8a77990-cmm",
1888 "renesas,rcar-gen3-cmm";
1889 reg = <0 0xfea50000 0 0x1000>;
1890 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1891 clocks = <&cpg CPG_MOD 710>;
1892 resets = <&cpg 710>;
1893 };
1895 csi40: csi2@feaa0000 {
1896 compatible = "renesas,r8a77990-csi2";
1897 reg = <0 0xfeaa0000 0 0x10000>;
1898 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1899 clocks = <&cpg CPG_MOD 716>;
1900 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1901 resets = <&cpg 716>;
1902 status = "disabled";
1904 ports {
1905 #address-cells = <1>;
1906 #size-cells = <0>;
1908 port@1 {
1909 #address-cells = <1>;
1910 #size-cells = <0>;
1912 reg = <1>;
1914 csi40vin4: endpoint@0 {
1915 reg = <0>;
1916 remote-endpoint = <&vin4csi40>;
1917 };
1918 csi40vin5: endpoint@1 {
1919 reg = <1>;
1920 remote-endpoint = <&vin5csi40>;
1921 };
1922 };
1923 };
1924 };
1926 du: display@feb00000 {
1927 compatible = "renesas,du-r8a77990";
1928 reg = <0 0xfeb00000 0 0x40000>;
1929 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1930 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1931 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1932 clock-names = "du.0", "du.1";
1933 resets = <&cpg 724>;
1934 reset-names = "du.0";
1936 renesas,cmms = <&cmm0>, <&cmm1>;
1937 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1939 status = "disabled";
1941 ports {
1942 #address-cells = <1>;
1943 #size-cells = <0>;
1945 port@0 {
1946 reg = <0>;
1947 du_out_rgb: endpoint {
1948 };
1949 };
1951 port@1 {
1952 reg = <1>;
1953 du_out_lvds0: endpoint {
1954 remote-endpoint = <&lvds0_in>;
1955 };
1956 };
1958 port@2 {
1959 reg = <2>;
1960 du_out_lvds1: endpoint {
1961 remote-endpoint = <&lvds1_in>;
1962 };
1963 };
1964 };
1965 };
1967 lvds0: lvds-encoder@feb90000 {
1968 compatible = "renesas,r8a77990-lvds";
1969 reg = <0 0xfeb90000 0 0x20>;
1970 clocks = <&cpg CPG_MOD 727>;
1971 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1972 resets = <&cpg 727>;
1973 status = "disabled";
1975 renesas,companion = <&lvds1>;
1977 ports {
1978 #address-cells = <1>;
1979 #size-cells = <0>;
1981 port@0 {
1982 reg = <0>;
1983 lvds0_in: endpoint {
1984 remote-endpoint = <&du_out_lvds0>;
1985 };
1986 };
1988 port@1 {
1989 reg = <1>;
1990 lvds0_out: endpoint {
1991 };
1992 };
1993 };
1994 };
1996 lvds1: lvds-encoder@feb90100 {
1997 compatible = "renesas,r8a77990-lvds";
1998 reg = <0 0xfeb90100 0 0x20>;
1999 clocks = <&cpg CPG_MOD 727>;
2000 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2001 resets = <&cpg 726>;
2002 status = "disabled";
2004 ports {
2005 #address-cells = <1>;
2006 #size-cells = <0>;
2008 port@0 {
2009 reg = <0>;
2010 lvds1_in: endpoint {
2011 remote-endpoint = <&du_out_lvds1>;
2012 };
2013 };
2015 port@1 {
2016 reg = <1>;
2017 lvds1_out: endpoint {
2018 };
2019 };
2020 };
2021 };
2023 prr: chipid@fff00044 {
2024 compatible = "renesas,prr";
2025 reg = <0 0xfff00044 0 4>;
2026 };
2027 };
2029 thermal-zones {
2030 cpu-thermal {
2031 polling-delay-passive = <250>;
2032 polling-delay = <0>;
2033 thermal-sensors = <&thermal 0>;
2034 sustainable-power = <717>;
2036 cooling-maps {
2037 map0 {
2038 trip = <&target>;
2039 cooling-device = <&a53_0 0 2>;
2040 contribution = <1024>;
2041 };
2042 };
2044 trips {
2045 sensor1_crit: sensor1-crit {
2046 temperature = <120000>;
2047 hysteresis = <2000>;
2048 type = "critical";
2049 };
2051 target: trip-point1 {
2052 temperature = <100000>;
2053 hysteresis = <2000>;
2054 type = "passive";
2055 };
2056 };
2057 };
2058 };
2060 timer {
2061 compatible = "arm,armv8-timer";
2062 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2063 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2064 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2065 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2066 };
2067 };