arch/arm64/boot/dts/renesas/ulcb.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car Gen3 ULCB board
   4  *
   5  * Copyright (C) 2016 Renesas Electronics Corp.
   6  * Copyright (C) 2016 Cogent Embedded, Inc.
   7  */
   8
   9 /*
  10  * SSI-AK4613
  11  *      aplay   -D plughw:0,0 xxx.wav
  12  *      arecord -D plughw:0,0 xxx.wav
  13  * SSI-HDMI
  14  *      aplay   -D plughw:0,1 xxx.wav
  15  */
  16
  17 #include <dt-bindings/gpio/gpio.h>
  18 #include <dt-bindings/input/input.h>
  19
  20 / {
  21         model = "Renesas R-Car Gen3 ULCB board";
  22
  23         aliases {
  24                 serial0 = &scif2;
  25                 ethernet0 = &avb;
  26         };
  27
  28         chosen {
  29                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  30                 stdout-path = "serial0:115200n8";
  31         };
  32
  33         audio_clkout: audio-clkout {
  34                 /*
  35                  * This is same as <&rcar_sound 0>
  36                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  37                  */
  38                 compatible = "fixed-clock";
  39                 #clock-cells = <0>;
  40                 clock-frequency = <12288000>;
  41         };
  42
  43         hdmi0-out {
  44                 compatible = "hdmi-connector";
  45                 type = "a";
  46
  47                 port {
  48                         hdmi0_con: endpoint {
  49                         };
  50                 };
  51         };
  52
  53         keyboard {
  54                 compatible = "gpio-keys";
  55
  56                 key-1 {
  57                         linux,code = <KEY_1>;
  58                         label = "SW3";
  59                         wakeup-source;
  60                         debounce-interval = <20>;
  61                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  62                 };
  63         };
  64
  65         leds {
  66                 compatible = "gpio-leds";
  67
  68                 led5 {
  69                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  70                 };
  71                 led6 {
  72                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  73                 };
  74         };
  75
  76         reg_1p8v: regulator0 {
  77                 compatible = "regulator-fixed";
  78                 regulator-name = "fixed-1.8V";
  79                 regulator-min-microvolt = <1800000>;
  80                 regulator-max-microvolt = <1800000>;
  81                 regulator-boot-on;
  82                 regulator-always-on;
  83         };
  84
  85         reg_3p3v: regulator1 {
  86                 compatible = "regulator-fixed";
  87                 regulator-name = "fixed-3.3V";
  88                 regulator-min-microvolt = <3300000>;
  89                 regulator-max-microvolt = <3300000>;
  90                 regulator-boot-on;
  91                 regulator-always-on;
  92         };
  93
  94         sound_card: sound {
  95                 compatible = "audio-graph-card";
  96                 label = "rcar-sound";
  97
  98                 dais = <&rsnd_port0     /* ak4613 */
  99                         &rsnd_port1     /* HDMI0  */
 100                         >;
 101         };
 102
 103         vcc_sdhi0: regulator-vcc-sdhi0 {
 104                 compatible = "regulator-fixed";
 105
 106                 regulator-name = "SDHI0 Vcc";
 107                 regulator-min-microvolt = <3300000>;
 108                 regulator-max-microvolt = <3300000>;
 109
 110                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 111                 enable-active-high;
 112         };
 113
 114         vccq_sdhi0: regulator-vccq-sdhi0 {
 115                 compatible = "regulator-gpio";
 116
 117                 regulator-name = "SDHI0 VccQ";
 118                 regulator-min-microvolt = <1800000>;
 119                 regulator-max-microvolt = <3300000>;
 120
 121                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 122                 gpios-states = <1>;
 123                 states = <3300000 1>, <1800000 0>;
 124         };
 125
 126         x12_clk: x12 {
 127                 compatible = "fixed-clock";
 128                 #clock-cells = <0>;
 129                 clock-frequency = <24576000>;
 130         };
 131
 132         x23_clk: x23-clock {
 133                 compatible = "fixed-clock";
 134                 #clock-cells = <0>;
 135                 clock-frequency = <25000000>;
 136         };
 137 };
 138
 139 &audio_clk_a {
 140         clock-frequency = <22579200>;
 141 };
 142
 143 &avb {
 144         pinctrl-0 = <&avb_pins>;
 145         pinctrl-names = "default";
 146         phy-handle = <&phy0>;
 147         tx-internal-delay-ps = <2000>;
 148         status = "okay";
 149
 150         phy0: ethernet-phy@0 {
 151                 rxc-skew-ps = <1500>;
 152                 reg = <0>;
 153                 interrupt-parent = <&gpio2>;
 154                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 155                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 156         };
 157 };
 158
 159 &du {
 160         status = "okay";
 161 };
 162
 163 &ehci1 {
 164         status = "okay";
 165 };
 166
 167 &extal_clk {
 168         clock-frequency = <16666666>;
 169 };
 170
 171 &extalr_clk {
 172         clock-frequency = <32768>;
 173 };
 174
 175 &hdmi0 {
 176         status = "okay";
 177
 178         ports {
 179                 port@1 {
 180                         reg = <1>;
 181                         rcar_dw_hdmi0_out: endpoint {
 182                                 remote-endpoint = <&hdmi0_con>;
 183                         };
 184                 };
 185                 port@2 {
 186                         reg = <2>;
 187                         dw_hdmi0_snd_in: endpoint {
 188                                 remote-endpoint = <&rsnd_for_hdmi>;
 189                         };
 190                 };
 191         };
 192 };
 193
 194 &hdmi0_con {
 195         remote-endpoint = <&rcar_dw_hdmi0_out>;
 196 };
 197
 198 &i2c2 {
 199         pinctrl-0 = <&i2c2_pins>;
 200         pinctrl-names = "default";
 201
 202         status = "okay";
 203
 204         clock-frequency = <100000>;
 205
 206         ak4613: codec@10 {
 207                 compatible = "asahi-kasei,ak4613";
 208                 #sound-dai-cells = <0>;
 209                 reg = <0x10>;
 210                 clocks = <&rcar_sound 3>;
 211
 212                 asahi-kasei,in1-single-end;
 213                 asahi-kasei,in2-single-end;
 214                 asahi-kasei,out1-single-end;
 215                 asahi-kasei,out2-single-end;
 216                 asahi-kasei,out3-single-end;
 217                 asahi-kasei,out4-single-end;
 218                 asahi-kasei,out5-single-end;
 219                 asahi-kasei,out6-single-end;
 220
 221                 port {
 222                         ak4613_endpoint: endpoint {
 223                                 remote-endpoint = <&rsnd_for_ak4613>;
 224                         };
 225                 };
 226         };
 227
 228         cs2000: clk-multiplier@4f {
 229                 #clock-cells = <0>;
 230                 compatible = "cirrus,cs2000-cp";
 231                 reg = <0x4f>;
 232                 clocks = <&audio_clkout>, <&x12_clk>;
 233                 clock-names = "clk_in", "ref_clk";
 234
 235                 assigned-clocks = <&cs2000>;
 236                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 237         };
 238 };
 239
 240 &i2c4 {
 241         status = "okay";
 242
 243         clock-frequency = <400000>;
 244
 245         versaclock5: clock-generator@6a {
 246                 compatible = "idt,5p49v5925";
 247                 reg = <0x6a>;
 248                 #clock-cells = <1>;
 249                 clocks = <&x23_clk>;
 250                 clock-names = "xin";
 251         };
 252 };
 253
 254 &i2c_dvfs {
 255         status = "okay";
 256
 257         clock-frequency = <400000>;
 258
 259         pmic: pmic@30 {
 260                 pinctrl-0 = <&irq0_pins>;
 261                 pinctrl-names = "default";
 262
 263                 compatible = "rohm,bd9571mwv";
 264                 reg = <0x30>;
 265                 interrupt-parent = <&intc_ex>;
 266                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 267                 interrupt-controller;
 268                 #interrupt-cells = <2>;
 269                 gpio-controller;
 270                 #gpio-cells = <2>;
 271                 rohm,ddr-backup-power = <0xf>;
 272                 rohm,rstbmode-pulse;
 273
 274                 regulators {
 275                         dvfs: dvfs {
 276                                 regulator-name = "dvfs";
 277                                 regulator-min-microvolt = <750000>;
 278                                 regulator-max-microvolt = <1030000>;
 279                                 regulator-boot-on;
 280                                 regulator-always-on;
 281                         };
 282                 };
 283         };
 284 };
 285
 286 &ohci1 {
 287         status = "okay";
 288 };
 289
 290 &pfc {
 291         pinctrl-0 = <&scif_clk_pins>;
 292         pinctrl-names = "default";
 293
 294         avb_pins: avb {
 295                 mux {
 296                         groups = "avb_link", "avb_mdio", "avb_mii";
 297                         function = "avb";
 298                 };
 299
 300                 pins_mdio {
 301                         groups = "avb_mdio";
 302                         drive-strength = <24>;
 303                 };
 304
 305                 pins_mii_tx {
 306                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 307                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 308                         drive-strength = <12>;
 309                 };
 310         };
 311
 312         i2c2_pins: i2c2 {
 313                 groups = "i2c2_a";
 314                 function = "i2c2";
 315         };
 316
 317         irq0_pins: irq0 {
 318                 groups = "intc_ex_irq0";
 319                 function = "intc_ex";
 320         };
 321
 322         scif2_pins: scif2 {
 323                 groups = "scif2_data_a";
 324                 function = "scif2";
 325         };
 326
 327         scif_clk_pins: scif_clk {
 328                 groups = "scif_clk_a";
 329                 function = "scif_clk";
 330         };
 331
 332         sdhi0_pins: sd0 {
 333                 groups = "sdhi0_data4", "sdhi0_ctrl";
 334                 function = "sdhi0";
 335                 power-source = <3300>;
 336         };
 337
 338         sdhi0_pins_uhs: sd0_uhs {
 339                 groups = "sdhi0_data4", "sdhi0_ctrl";
 340                 function = "sdhi0";
 341                 power-source = <1800>;
 342         };
 343
 344         sdhi2_pins: sd2 {
 345                 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
 346                 function = "sdhi2";
 347                 power-source = <1800>;
 348         };
 349
 350         sound_pins: sound {
 351                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 352                 function = "ssi";
 353         };
 354
 355         sound_clk_pins: sound-clk {
 356                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 357                          "audio_clkout_a", "audio_clkout3_a";
 358                 function = "audio_clk";
 359         };
 360
 361         usb1_pins: usb1 {
 362                 groups = "usb1";
 363                 function = "usb1";
 364         };
 365 };
 366
 367 &rcar_sound {
 368         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 369         pinctrl-names = "default";
 370
 371         /* Single DAI */
 372         #sound-dai-cells = <0>;
 373
 374         /* audio_clkout0/1/2/3 */
 375         #clock-cells = <1>;
 376         clock-frequency = <12288000 11289600>;
 377
 378         status = "okay";
 379
 380         /* update <audio_clk_b> to <cs2000> */
 381         clocks = <&cpg CPG_MOD 1005>,
 382                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 383                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 384                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 385                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 386                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 387                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 388                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 389                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 390                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 391                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 392                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 393                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 394                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 395                  <&audio_clk_a>, <&cs2000>,
 396                  <&audio_clk_c>,
 397                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 398
 399         ports {
 400                 #address-cells = <1>;
 401                 #size-cells = <0>;
 402                 rsnd_port0: port@0 {
 403                         reg = <0>;
 404                         rsnd_for_ak4613: endpoint {
 405                                 remote-endpoint = <&ak4613_endpoint>;
 406
 407                                 dai-format = "left_j";
 408                                 bitclock-master = <&rsnd_for_ak4613>;
 409                                 frame-master = <&rsnd_for_ak4613>;
 410
 411                                 playback = <&ssi0 &src0 &dvc0>;
 412                                 capture  = <&ssi1 &src1 &dvc1>;
 413                         };
 414                 };
 415                 rsnd_port1: port@1 {
 416                         reg = <1>;
 417                         rsnd_for_hdmi: endpoint {
 418                                 remote-endpoint = <&dw_hdmi0_snd_in>;
 419
 420                                 dai-format = "i2s";
 421                                 bitclock-master = <&rsnd_for_hdmi>;
 422                                 frame-master = <&rsnd_for_hdmi>;
 423
 424                                 playback = <&ssi2>;
 425                         };
 426                 };
 427         };
 428 };
 429
 430 &rwdt {
 431         timeout-sec = <60>;
 432         status = "okay";
 433 };
 434
 435 &scif2 {
 436         pinctrl-0 = <&scif2_pins>;
 437         pinctrl-names = "default";
 438
 439         status = "okay";
 440 };
 441
 442 &scif_clk {
 443         clock-frequency = <14745600>;
 444 };
 445
 446 &sdhi0 {
 447         pinctrl-0 = <&sdhi0_pins>;
 448         pinctrl-1 = <&sdhi0_pins_uhs>;
 449         pinctrl-names = "default", "state_uhs";
 450
 451         vmmc-supply = <&vcc_sdhi0>;
 452         vqmmc-supply = <&vccq_sdhi0>;
 453         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 454         bus-width = <4>;
 455         sd-uhs-sdr50;
 456         sd-uhs-sdr104;
 457         status = "okay";
 458 };
 459
 460 &sdhi2 {
 461         /* used for on-board 8bit eMMC */
 462         pinctrl-0 = <&sdhi2_pins>;
 463         pinctrl-1 = <&sdhi2_pins>;
 464         pinctrl-names = "default", "state_uhs";
 465
 466         vmmc-supply = <&reg_3p3v>;
 467         vqmmc-supply = <&reg_1p8v>;
 468         bus-width = <8>;
 469         mmc-hs200-1_8v;
 470         mmc-hs400-1_8v;
 471         non-removable;
 472         full-pwr-cycle-in-suspend;
 473         status = "okay";
 474 };
 475
 476 &ssi1 {
 477         shared-pin;
 478 };
 479
 480 &usb2_phy1 {
 481         pinctrl-0 = <&usb1_pins>;
 482         pinctrl-names = "default";
 483
 484         status = "okay";
 485 };