1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 Hardkernel Co., Ltd
4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include "rk3326.dtsi"
14 model = "ODROID-GO Advance";
15 compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326";
18 stdout-path = "serial2:115200n8";
22 compatible = "adc-joystick";
23 io-channels = <&saradc 1>,
32 abs-range = <172 772>;
40 abs-range = <278 815>;
45 backlight: backlight {
46 compatible = "pwm-backlight";
47 power-supply = <&vcc_bl>;
48 pwms = <&pwm1 0 25000 0>;
52 compatible = "gpio-keys";
53 pinctrl-names = "default";
54 pinctrl-0 = <&btn_pins>;
57 * *** ODROIDGO2-Advance Switch layout ***
58 * |------------------------------------------------|
60 * |------------------------------------------------|
61 * | sw1 |-------------------| sw8 |
62 * | sw3 sw4 | | sw7 sw5 |
63 * | sw2 | LCD Display | sw6 |
65 * | |-------------------| |
66 * | sw9 sw10 sw11 sw12 sw13 sw14 |
67 * |------------------------------------------------|
71 gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
73 linux,code = <BTN_DPAD_UP>;
76 gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
78 linux,code = <BTN_DPAD_DOWN>;
81 gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
83 linux,code = <BTN_DPAD_LEFT>;
86 gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
88 linux,code = <BTN_DPAD_RIGHT>;
91 gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
93 linux,code = <BTN_EAST>;
96 gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
98 linux,code = <BTN_SOUTH>;
101 gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
103 linux,code = <BTN_WEST>;
106 gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
108 linux,code = <BTN_NORTH>;
111 gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
113 linux,code = <BTN_TRIGGER_HAPPY1>;
116 gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
118 linux,code = <BTN_TRIGGER_HAPPY2>;
121 gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
123 linux,code = <BTN_TRIGGER_HAPPY3>;
126 gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
128 linux,code = <BTN_TRIGGER_HAPPY4>;
131 gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
133 linux,code = <BTN_TRIGGER_HAPPY5>;
136 gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
138 linux,code = <BTN_TRIGGER_HAPPY6>;
141 gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
143 linux,code = <BTN_TL>;
146 gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
148 linux,code = <BTN_TR>;
153 compatible = "gpio-leds";
154 pinctrl-names = "default";
155 pinctrl-0 = <&blue_led_pin>;
158 label = "blue:heartbeat";
159 gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
160 linux,default-trigger = "heartbeat";
165 compatible = "regulator-fixed";
166 regulator-name = "vcc3v8_sys";
168 regulator-min-microvolt = <3800000>;
169 regulator-max-microvolt = <3800000>;
173 compatible = "regulator-fixed";
174 regulator-name = "vcc_host";
175 regulator-min-microvolt = <5000000>;
176 regulator-max-microvolt = <5000000>;
178 gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
181 vin-supply = <&vccsys>;
186 cpu-supply = <&vdd_arm>;
190 cpu-supply = <&vdd_arm>;
194 cpu-supply = <&vdd_arm>;
198 cpu-supply = <&vdd_arm>;
202 assigned-clocks = <&cru PLL_NPLL>,
203 <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
204 <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
205 <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>,
208 assigned-clock-rates = <1188000000>,
209 <200000000>, <200000000>,
210 <150000000>, <150000000>,
211 <100000000>, <200000000>,
226 mipi_out_panel: endpoint {
227 remote-endpoint = <&mipi_in_panel>;
233 compatible = "elida,kd35t133";
235 backlight = <&backlight>;
236 iovcc-supply = <&vcc_lcd>;
237 reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
238 vdd-supply = <&vcc_lcd>;
241 mipi_in_panel: endpoint {
242 remote-endpoint = <&mipi_out_panel>;
253 mali-supply = <&vdd_logic>;
258 clock-frequency = <400000>;
259 i2c-scl-falling-time-ns = <16>;
260 i2c-scl-rising-time-ns = <280>;
264 compatible = "rockchip,rk817";
266 interrupt-parent = <&gpio0>;
267 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
268 pinctrl-names = "default";
269 pinctrl-0 = <&pmic_int>;
272 clock-output-names = "rk808-clkout1", "xin32k";
274 vcc1-supply = <&vccsys>;
275 vcc2-supply = <&vccsys>;
276 vcc3-supply = <&vccsys>;
277 vcc4-supply = <&vccsys>;
278 vcc5-supply = <&vccsys>;
279 vcc6-supply = <&vccsys>;
280 vcc7-supply = <&vccsys>;
283 vdd_logic: DCDC_REG1 {
284 regulator-name = "vdd_logic";
285 regulator-min-microvolt = <950000>;
286 regulator-max-microvolt = <1150000>;
287 regulator-ramp-delay = <6001>;
291 regulator-state-mem {
292 regulator-on-in-suspend;
293 regulator-suspend-microvolt = <950000>;
298 regulator-name = "vdd_arm";
299 regulator-min-microvolt = <950000>;
300 regulator-max-microvolt = <1350000>;
301 regulator-ramp-delay = <6001>;
305 regulator-state-mem {
306 regulator-off-in-suspend;
307 regulator-suspend-microvolt = <950000>;
312 regulator-name = "vcc_ddr";
316 regulator-state-mem {
317 regulator-on-in-suspend;
322 regulator-name = "vcc_3v3";
323 regulator-min-microvolt = <3300000>;
324 regulator-max-microvolt = <3300000>;
328 regulator-state-mem {
329 regulator-off-in-suspend;
330 regulator-suspend-microvolt = <3300000>;
335 regulator-name = "vcc_1v8";
336 regulator-min-microvolt = <1800000>;
337 regulator-max-microvolt = <1800000>;
341 regulator-state-mem {
342 regulator-on-in-suspend;
343 regulator-suspend-microvolt = <1800000>;
348 regulator-name = "vdd_1v0";
349 regulator-min-microvolt = <1000000>;
350 regulator-max-microvolt = <1000000>;
354 regulator-state-mem {
355 regulator-on-in-suspend;
356 regulator-suspend-microvolt = <1000000>;
360 vcc3v3_pmu: LDO_REG4 {
361 regulator-name = "vcc3v3_pmu";
362 regulator-min-microvolt = <3300000>;
363 regulator-max-microvolt = <3300000>;
367 regulator-state-mem {
368 regulator-on-in-suspend;
369 regulator-suspend-microvolt = <3300000>;
374 regulator-name = "vccio_sd";
375 regulator-min-microvolt = <1800000>;
376 regulator-max-microvolt = <3300000>;
380 regulator-state-mem {
381 regulator-on-in-suspend;
382 regulator-suspend-microvolt = <3300000>;
387 regulator-name = "vcc_sd";
388 regulator-min-microvolt = <3300000>;
389 regulator-max-microvolt = <3300000>;
392 regulator-state-mem {
393 regulator-on-in-suspend;
394 regulator-suspend-microvolt = <3300000>;
399 regulator-name = "vcc_bl";
400 regulator-min-microvolt = <3300000>;
401 regulator-max-microvolt = <3300000>;
403 regulator-state-mem {
404 regulator-off-in-suspend;
405 regulator-suspend-microvolt = <3300000>;
410 regulator-name = "vcc_lcd";
411 regulator-min-microvolt = <2800000>;
412 regulator-max-microvolt = <2800000>;
414 regulator-state-mem {
415 regulator-off-in-suspend;
416 regulator-suspend-microvolt = <2800000>;
421 regulator-name = "vcc_cam";
422 regulator-min-microvolt = <3000000>;
423 regulator-max-microvolt = <3000000>;
425 regulator-state-mem {
426 regulator-off-in-suspend;
427 regulator-suspend-microvolt = <3000000>;
434 /* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */
436 clock-frequency = <400000>;
440 /* I2S 1 Channel Used */
446 vccio1-supply = <&vcc_3v3>;
447 vccio2-supply = <&vccio_sd>;
448 vccio3-supply = <&vcc_3v3>;
449 vccio4-supply = <&vcc_3v3>;
450 vccio5-supply = <&vcc_3v3>;
451 vccio6-supply = <&vcc_3v3>;
456 pmuio1-supply = <&vcc3v3_pmu>;
457 pmuio2-supply = <&vcc3v3_pmu>;
466 vref-supply = <&vcc_1v8>;
472 card-detect-delay = <200>;
473 cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
478 vmmc-supply = <&vcc_sd>;
479 vqmmc-supply = <&vccio_sd>;
490 u2phy_host: host-port {
494 u2phy_otg: otg-port {
503 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
505 pinctrl-names = "default";
506 pinctrl-0 = <&uart1_xfer &uart1_cts>;
511 pinctrl-names = "default";
512 pinctrl-0 = <&uart2m1_xfer>;
527 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
528 <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
529 <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
530 <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
531 <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
532 <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
533 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
534 <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
535 <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
536 <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
537 <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
538 <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
539 <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
540 <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
541 <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
542 <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
548 rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
553 blue_led_pin: blue-led-pin {
554 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
560 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
564 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
567 soc_slppin_gpio: soc_slppin_gpio {
568 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
571 soc_slppin_rst: soc_slppin_rst {
572 rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
575 soc_slppin_slp: soc_slppin_slp {
576 rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;