1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
13 model = "Firefly-RK3399 Board";
14 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
17 stdout-path = "serial2:1500000n8";
20 backlight: backlight {
21 compatible = "pwm-backlight";
22 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
23 pwms = <&pwm0 0 25000 0>;
27 16 17 18 19 20 21 22 23
28 24 25 26 27 28 29 30 31
29 32 33 34 35 36 37 38 39
30 40 41 42 43 44 45 46 47
31 48 49 50 51 52 53 54 55
32 56 57 58 59 60 61 62 63
33 64 65 66 67 68 69 70 71
34 72 73 74 75 76 77 78 79
35 80 81 82 83 84 85 86 87
36 88 89 90 91 92 93 94 95
37 96 97 98 99 100 101 102 103
38 104 105 106 107 108 109 110 111
39 112 113 114 115 116 117 118 119
40 120 121 122 123 124 125 126 127
41 128 129 130 131 132 133 134 135
42 136 137 138 139 140 141 142 143
43 144 145 146 147 148 149 150 151
44 152 153 154 155 156 157 158 159
45 160 161 162 163 164 165 166 167
46 168 169 170 171 172 173 174 175
47 176 177 178 179 180 181 182 183
48 184 185 186 187 188 189 190 191
49 192 193 194 195 196 197 198 199
50 200 201 202 203 204 205 206 207
51 208 209 210 211 212 213 214 215
52 216 217 218 219 220 221 222 223
53 224 225 226 227 228 229 230 231
54 232 233 234 235 236 237 238 239
55 240 241 242 243 244 245 246 247
56 248 249 250 251 252 253 254 255>;
57 default-brightness-level = <200>;
60 clkin_gmac: external-gmac-clock {
61 compatible = "fixed-clock";
62 clock-frequency = <125000000>;
63 clock-output-names = "clkin_gmac";
68 compatible = "regulator-fixed";
69 regulator-name = "dc_12v";
72 regulator-min-microvolt = <12000000>;
73 regulator-max-microvolt = <12000000>;
77 compatible = "gpio-keys";
79 pinctrl-names = "default";
80 pinctrl-0 = <&pwrbtn>;
83 debounce-interval = <100>;
84 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
85 label = "GPIO Key Power";
86 linux,code = <KEY_POWER>;
92 compatible = "gpio-leds";
93 pinctrl-names = "default";
94 pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
99 gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
104 default-state = "off";
105 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
110 compatible = "simple-audio-card";
111 simple-audio-card,name = "rockchip,rt5640-codec";
112 simple-audio-card,format = "i2s";
113 simple-audio-card,mclk-fs = <256>;
114 simple-audio-card,widgets =
115 "Microphone", "Mic Jack",
116 "Headphone", "Headphone Jack";
117 simple-audio-card,routing =
118 "Mic Jack", "MICBIAS1",
120 "Headphone Jack", "HPOL",
121 "Headphone Jack", "HPOR";
123 simple-audio-card,cpu {
127 simple-audio-card,codec {
128 sound-dai = <&rt5640>;
132 sdio_pwrseq: sdio-pwrseq {
133 compatible = "mmc-pwrseq-simple";
135 clock-names = "ext_clock";
136 pinctrl-names = "default";
137 pinctrl-0 = <&wifi_enable_h>;
140 * On the module itself this is one of these (depending
141 * on the actual card populated):
142 * - SDIO_RESET_L_WL_REG_ON
143 * - PDN (power down when low)
145 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
148 /* switched by pmic_sleep */
149 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
150 compatible = "regulator-fixed";
151 regulator-name = "vcc1v8_s3";
154 regulator-min-microvolt = <1800000>;
155 regulator-max-microvolt = <1800000>;
156 vin-supply = <&vcc_1v8>;
159 vcc3v3_pcie: vcc3v3-pcie-regulator {
160 compatible = "regulator-fixed";
162 gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
163 pinctrl-names = "default";
164 pinctrl-0 = <&pcie_pwr_en>;
165 regulator-name = "vcc3v3_pcie";
168 vin-supply = <&dc_12v>;
171 vcc3v3_sys: vcc3v3-sys {
172 compatible = "regulator-fixed";
173 regulator-name = "vcc3v3_sys";
176 regulator-min-microvolt = <3300000>;
177 regulator-max-microvolt = <3300000>;
178 vin-supply = <&vcc_sys>;
181 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
182 vcc5v0_host: vcc5v0-host-regulator {
183 compatible = "regulator-fixed";
185 gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&vcc5v0_host_en>;
188 regulator-name = "vcc5v0_host";
190 vin-supply = <&vcc_sys>;
194 compatible = "regulator-fixed";
195 regulator-name = "vcc_sys";
198 regulator-min-microvolt = <5000000>;
199 regulator-max-microvolt = <5000000>;
200 vin-supply = <&dc_12v>;
204 compatible = "pwm-regulator";
205 pwms = <&pwm2 0 25000 1>;
206 regulator-name = "vdd_log";
209 regulator-min-microvolt = <430000>;
210 regulator-max-microvolt = <1400000>;
211 vin-supply = <&vcc_sys>;
216 cpu-supply = <&vdd_cpu_l>;
220 cpu-supply = <&vdd_cpu_l>;
224 cpu-supply = <&vdd_cpu_l>;
228 cpu-supply = <&vdd_cpu_l>;
232 cpu-supply = <&vdd_cpu_b>;
236 cpu-supply = <&vdd_cpu_b>;
244 assigned-clocks = <&cru SCLK_RMII_SRC>;
245 assigned-clock-parents = <&clkin_gmac>;
246 clock_in_out = "input";
247 phy-supply = <&vcc_lan>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&rgmii_pins>;
251 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
252 snps,reset-active-low;
253 snps,reset-delays-us = <0 10000 50000>;
260 ddc-i2c-bus = <&i2c3>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&hdmi_cec>;
267 clock-frequency = <400000>;
268 i2c-scl-rising-time-ns = <168>;
269 i2c-scl-falling-time-ns = <4>;
273 compatible = "rockchip,rk808";
275 interrupt-parent = <&gpio1>;
276 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
278 clock-output-names = "xin32k", "rk808-clkout2";
279 pinctrl-names = "default";
280 pinctrl-0 = <&pmic_int_l>;
281 rockchip,system-power-controller;
284 vcc1-supply = <&vcc_sys>;
285 vcc2-supply = <&vcc_sys>;
286 vcc3-supply = <&vcc_sys>;
287 vcc4-supply = <&vcc_sys>;
288 vcc6-supply = <&vcc_sys>;
289 vcc7-supply = <&vcc_sys>;
290 vcc8-supply = <&vcc3v3_sys>;
291 vcc9-supply = <&vcc_sys>;
292 vcc10-supply = <&vcc_sys>;
293 vcc11-supply = <&vcc_sys>;
294 vcc12-supply = <&vcc3v3_sys>;
295 vddio-supply = <&vcc1v8_pmu>;
298 vdd_center: DCDC_REG1 {
299 regulator-name = "vdd_center";
302 regulator-min-microvolt = <750000>;
303 regulator-max-microvolt = <1350000>;
304 regulator-ramp-delay = <6001>;
305 regulator-state-mem {
306 regulator-off-in-suspend;
310 vdd_cpu_l: DCDC_REG2 {
311 regulator-name = "vdd_cpu_l";
314 regulator-min-microvolt = <750000>;
315 regulator-max-microvolt = <1350000>;
316 regulator-ramp-delay = <6001>;
317 regulator-state-mem {
318 regulator-off-in-suspend;
323 regulator-name = "vcc_ddr";
326 regulator-state-mem {
327 regulator-on-in-suspend;
332 regulator-name = "vcc_1v8";
335 regulator-min-microvolt = <1800000>;
336 regulator-max-microvolt = <1800000>;
337 regulator-state-mem {
338 regulator-on-in-suspend;
339 regulator-suspend-microvolt = <1800000>;
343 vcc1v8_dvp: LDO_REG1 {
344 regulator-name = "vcc1v8_dvp";
347 regulator-min-microvolt = <1800000>;
348 regulator-max-microvolt = <1800000>;
349 regulator-state-mem {
350 regulator-off-in-suspend;
354 vcc2v8_dvp: LDO_REG2 {
355 regulator-name = "vcc2v8_dvp";
358 regulator-min-microvolt = <2800000>;
359 regulator-max-microvolt = <2800000>;
360 regulator-state-mem {
361 regulator-off-in-suspend;
365 vcc1v8_pmu: LDO_REG3 {
366 regulator-name = "vcc1v8_pmu";
369 regulator-min-microvolt = <1800000>;
370 regulator-max-microvolt = <1800000>;
371 regulator-state-mem {
372 regulator-on-in-suspend;
373 regulator-suspend-microvolt = <1800000>;
378 regulator-name = "vcc_sdio";
381 regulator-min-microvolt = <1800000>;
382 regulator-max-microvolt = <3000000>;
383 regulator-state-mem {
384 regulator-on-in-suspend;
385 regulator-suspend-microvolt = <3000000>;
389 vcca3v0_codec: LDO_REG5 {
390 regulator-name = "vcca3v0_codec";
393 regulator-min-microvolt = <3000000>;
394 regulator-max-microvolt = <3000000>;
395 regulator-state-mem {
396 regulator-off-in-suspend;
401 regulator-name = "vcc_1v5";
404 regulator-min-microvolt = <1500000>;
405 regulator-max-microvolt = <1500000>;
406 regulator-state-mem {
407 regulator-on-in-suspend;
408 regulator-suspend-microvolt = <1500000>;
412 vcca1v8_codec: LDO_REG7 {
413 regulator-name = "vcca1v8_codec";
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <1800000>;
418 regulator-state-mem {
419 regulator-off-in-suspend;
424 regulator-name = "vcc_3v0";
427 regulator-min-microvolt = <3000000>;
428 regulator-max-microvolt = <3000000>;
429 regulator-state-mem {
430 regulator-on-in-suspend;
431 regulator-suspend-microvolt = <3000000>;
435 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
436 regulator-name = "vcc3v3_s3";
439 regulator-state-mem {
440 regulator-off-in-suspend;
444 vcc3v3_s0: SWITCH_REG2 {
445 regulator-name = "vcc3v3_s0";
448 regulator-state-mem {
449 regulator-off-in-suspend;
455 vdd_cpu_b: regulator@40 {
456 compatible = "silergy,syr827";
458 fcs,suspend-voltage-selector = <0>;
459 regulator-name = "vdd_cpu_b";
460 regulator-min-microvolt = <712500>;
461 regulator-max-microvolt = <1500000>;
462 regulator-ramp-delay = <1000>;
465 vin-supply = <&vcc_sys>;
467 regulator-state-mem {
468 regulator-off-in-suspend;
472 vdd_gpu: regulator@41 {
473 compatible = "silergy,syr828";
475 fcs,suspend-voltage-selector = <1>;
476 regulator-name = "vdd_gpu";
477 regulator-min-microvolt = <712500>;
478 regulator-max-microvolt = <1500000>;
479 regulator-ramp-delay = <1000>;
482 vin-supply = <&vcc_sys>;
484 regulator-state-mem {
485 regulator-off-in-suspend;
491 i2c-scl-rising-time-ns = <300>;
492 i2c-scl-falling-time-ns = <15>;
496 compatible = "realtek,rt5640";
498 clocks = <&cru SCLK_I2S_8CH_OUT>;
499 clock-names = "mclk";
500 realtek,in1-differential;
501 #sound-dai-cells = <0>;
502 pinctrl-names = "default";
503 pinctrl-0 = <&rt5640_hpcon>;
508 i2c-scl-rising-time-ns = <450>;
509 i2c-scl-falling-time-ns = <15>;
514 i2c-scl-rising-time-ns = <600>;
515 i2c-scl-falling-time-ns = <20>;
519 compatible = "invensense,mpu6500";
521 interrupt-parent = <&gpio1>;
522 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
527 rockchip,playback-channels = <8>;
528 rockchip,capture-channels = <8>;
533 rockchip,playback-channels = <2>;
534 rockchip,capture-channels = <2>;
545 bt656-supply = <&vcc1v8_dvp>;
546 audio-supply = <&vcca1v8_codec>;
547 sdmmc-supply = <&vcc_sdio>;
548 gpio1830-supply = <&vcc_3v0>;
556 ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pcie_clkreqn_cpm>;
564 pmu1830-supply = <&vcc_3v0>;
571 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
576 lcd_panel_reset: lcd-panel-reset {
577 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
582 pcie_pwr_en: pcie-pwr-en {
583 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
586 pcie_3g_drv: pcie-3g-drv {
587 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
592 vsel1_pin: vsel1-pin {
593 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
596 vsel2_pin: vsel2-pin {
597 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
602 wifi_enable_h: wifi-enable-h {
603 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
608 rt5640_hpcon: rt5640-hpcon {
609 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
614 pmic_int_l: pmic-int-l {
615 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
620 vcc5v0_host_en: vcc5v0-host-en {
621 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
626 wifi_host_wake_l: wifi-host-wake-l {
627 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
632 work_led_pin: work-led-pin {
633 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
636 diy_led_pin: diy-led-pin {
637 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
651 vref-supply = <&vcca1v8_s3>;
656 /* WiFi & BT combo module Ampak AP6356S */
660 keep-power-in-suspend;
661 mmc-pwrseq = <&sdio_pwrseq>;
663 pinctrl-names = "default";
664 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
668 vqmmc-supply = &vcc1v8_s3; /* IO line */
669 vmmc-supply = &vcc_sdio; /* card's power */
671 #address-cells = <1>;
677 compatible = "brcm,bcm4329-fmac";
678 interrupt-parent = <&gpio0>;
679 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
680 interrupt-names = "host-wake";
681 brcm,drive-strength = <5>;
682 pinctrl-names = "default";
683 pinctrl-0 = <&wifi_host_wake_l>;
691 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
693 max-frequency = <150000000>;
694 pinctrl-names = "default";
695 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
702 mmc-hs400-enhanced-strobe;
716 /* tshut mode 0:CRU 1:GPIO */
717 rockchip,hw-tshut-mode = <1>;
718 /* tshut polarity 0:LOW 1:HIGH */
719 rockchip,hw-tshut-polarity = <1>;
726 u2phy0_otg: otg-port {
730 u2phy0_host: host-port {
731 phy-supply = <&vcc5v0_host>;
739 u2phy1_otg: otg-port {
743 u2phy1_host: host-port {
744 phy-supply = <&vcc5v0_host>;
750 pinctrl-names = "default";
751 pinctrl-0 = <&uart0_xfer &uart0_cts>;