1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * RK3399-based FriendlyElec boards device tree source
5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8 * (http://www.friendlyarm.com)
10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd.
15 #include <dt-bindings/input/linux-event-codes.h>
16 #include "rk3399.dtsi"
17 #include "rk3399-opp.dtsi"
21 stdout-path = "serial2:1500000n8";
24 clkin_gmac: external-gmac-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "clkin_gmac";
31 vcc3v3_sys: vcc3v3-sys {
32 compatible = "regulator-fixed";
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
37 regulator-name = "vcc3v3_sys";
40 vcc5v0_sys: vcc5v0-sys {
41 compatible = "regulator-fixed";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
46 regulator-name = "vcc5v0_sys";
47 vin-supply = <&vdd_5v>;
50 /* switched by pmic_sleep */
51 vcc1v8_s3: vcc1v8-s3 {
52 compatible = "regulator-fixed";
55 regulator-min-microvolt = <1800000>;
56 regulator-max-microvolt = <1800000>;
57 regulator-name = "vcc1v8_s3";
58 vin-supply = <&vcc_1v8>;
61 vcc3v0_sd: vcc3v0-sd {
62 compatible = "regulator-fixed";
64 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&sdmmc0_pwr_h>;
68 regulator-min-microvolt = <3000000>;
69 regulator-max-microvolt = <3000000>;
70 regulator-name = "vcc3v0_sd";
71 vin-supply = <&vcc3v3_sys>;
75 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
76 * drives the enable pin, but we can't quite model that.
78 vcca0v9_s3: vcca0v9-s3 {
79 compatible = "regulator-fixed";
80 regulator-min-microvolt = <900000>;
81 regulator-max-microvolt = <900000>;
82 regulator-name = "vcca0v9_s3";
83 vin-supply = <&vcc1v8_s3>;
86 /* As above, actually supplied by vcc3v3_sys */
87 vcca1v8_s3: vcca1v8-s3 {
88 compatible = "regulator-fixed";
89 regulator-min-microvolt = <1800000>;
90 regulator-max-microvolt = <1800000>;
91 regulator-name = "vcca1v8_s3";
92 vin-supply = <&vcc1v8_s3>;
95 vbus_typec: vbus-typec {
96 compatible = "regulator-fixed";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99 regulator-name = "vbus_typec";
103 compatible = "gpio-keys";
105 pinctrl-names = "default";
106 pinctrl-0 = <&power_key>;
109 debounce-interval = <100>;
110 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
111 label = "GPIO Key Power";
112 linux,code = <KEY_POWER>;
118 compatible = "gpio-leds";
119 pinctrl-names = "default";
120 pinctrl-0 = <&status_led_pin>;
123 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
124 label = "status_led";
125 linux,default-trigger = "heartbeat";
129 sdio_pwrseq: sdio-pwrseq {
130 compatible = "mmc-pwrseq-simple";
132 clock-names = "ext_clock";
133 pinctrl-names = "default";
134 pinctrl-0 = <&wifi_reg_on_h>;
135 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
140 cpu-supply = <&vdd_cpu_b>;
144 cpu-supply = <&vdd_cpu_b>;
148 cpu-supply = <&vdd_cpu_l>;
152 cpu-supply = <&vdd_cpu_l>;
156 cpu-supply = <&vdd_cpu_l>;
160 cpu-supply = <&vdd_cpu_l>;
168 assigned-clock-parents = <&clkin_gmac>;
169 assigned-clocks = <&cru SCLK_RMII_SRC>;
170 clock_in_out = "input";
171 pinctrl-names = "default";
172 pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
173 phy-handle = <&rtl8211e>;
175 phy-supply = <&vcc3v3_s3>;
181 compatible = "snps,dwmac-mdio";
182 #address-cells = <1>;
185 rtl8211e: ethernet-phy@1 {
187 interrupt-parent = <&gpio3>;
188 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
189 reset-assert-us = <10000>;
190 reset-deassert-us = <30000>;
191 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
197 mali-supply = <&vdd_gpu>;
202 ddc-i2c-bus = <&i2c7>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&hdmi_cec>;
213 clock-frequency = <400000>;
214 i2c-scl-rising-time-ns = <160>;
215 i2c-scl-falling-time-ns = <30>;
218 vdd_cpu_b: regulator@40 {
219 compatible = "silergy,syr827";
221 fcs,suspend-voltage-selector = <1>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&cpu_b_sleep>;
226 regulator-min-microvolt = <712500>;
227 regulator-max-microvolt = <1500000>;
228 regulator-name = "vdd_cpu_b";
229 regulator-ramp-delay = <1000>;
230 vin-supply = <&vcc3v3_sys>;
232 regulator-state-mem {
233 regulator-off-in-suspend;
237 vdd_gpu: regulator@41 {
238 compatible = "silergy,syr828";
240 fcs,suspend-voltage-selector = <1>;
241 pinctrl-names = "default";
242 pinctrl-0 = <&gpu_sleep>;
245 regulator-min-microvolt = <712500>;
246 regulator-max-microvolt = <1500000>;
247 regulator-name = "vdd_gpu";
248 regulator-ramp-delay = <1000>;
249 vin-supply = <&vcc3v3_sys>;
251 regulator-state-mem {
252 regulator-off-in-suspend;
257 compatible = "rockchip,rk808";
259 clock-output-names = "xin32k", "rtc_clko_wifi";
261 interrupt-parent = <&gpio1>;
262 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
263 pinctrl-names = "default";
264 pinctrl-0 = <&pmic_int_l>;
265 rockchip,system-power-controller;
268 vcc1-supply = <&vcc3v3_sys>;
269 vcc2-supply = <&vcc3v3_sys>;
270 vcc3-supply = <&vcc3v3_sys>;
271 vcc4-supply = <&vcc3v3_sys>;
272 vcc6-supply = <&vcc3v3_sys>;
273 vcc7-supply = <&vcc3v3_sys>;
274 vcc8-supply = <&vcc3v3_sys>;
275 vcc9-supply = <&vcc3v3_sys>;
276 vcc10-supply = <&vcc3v3_sys>;
277 vcc11-supply = <&vcc3v3_sys>;
278 vcc12-supply = <&vcc3v3_sys>;
279 vddio-supply = <&vcc_3v0>;
282 vdd_center: DCDC_REG1 {
285 regulator-min-microvolt = <750000>;
286 regulator-max-microvolt = <1350000>;
287 regulator-name = "vdd_center";
288 regulator-ramp-delay = <6001>;
290 regulator-state-mem {
291 regulator-off-in-suspend;
295 vdd_cpu_l: DCDC_REG2 {
298 regulator-min-microvolt = <750000>;
299 regulator-max-microvolt = <1350000>;
300 regulator-name = "vdd_cpu_l";
301 regulator-ramp-delay = <6001>;
303 regulator-state-mem {
304 regulator-off-in-suspend;
311 regulator-name = "vcc_ddr";
313 regulator-state-mem {
314 regulator-on-in-suspend;
321 regulator-min-microvolt = <1800000>;
322 regulator-max-microvolt = <1800000>;
323 regulator-name = "vcc_1v8";
325 regulator-state-mem {
326 regulator-on-in-suspend;
327 regulator-suspend-microvolt = <1800000>;
331 vcc1v8_cam: LDO_REG1 {
334 regulator-min-microvolt = <1800000>;
335 regulator-max-microvolt = <1800000>;
336 regulator-name = "vcc1v8_cam";
338 regulator-state-mem {
339 regulator-off-in-suspend;
343 vcc3v0_touch: LDO_REG2 {
346 regulator-min-microvolt = <3000000>;
347 regulator-max-microvolt = <3000000>;
348 regulator-name = "vcc3v0_touch";
350 regulator-state-mem {
351 regulator-off-in-suspend;
355 vcc1v8_pmupll: LDO_REG3 {
358 regulator-min-microvolt = <1800000>;
359 regulator-max-microvolt = <1800000>;
360 regulator-name = "vcc1v8_pmupll";
362 regulator-state-mem {
363 regulator-on-in-suspend;
364 regulator-suspend-microvolt = <1800000>;
371 regulator-init-microvolt = <3000000>;
372 regulator-min-microvolt = <1800000>;
373 regulator-max-microvolt = <3300000>;
374 regulator-name = "vcc_sdio";
376 regulator-state-mem {
377 regulator-on-in-suspend;
378 regulator-suspend-microvolt = <3000000>;
382 vcca3v0_codec: LDO_REG5 {
385 regulator-min-microvolt = <3000000>;
386 regulator-max-microvolt = <3000000>;
387 regulator-name = "vcca3v0_codec";
389 regulator-state-mem {
390 regulator-off-in-suspend;
397 regulator-min-microvolt = <1500000>;
398 regulator-max-microvolt = <1500000>;
399 regulator-name = "vcc_1v5";
401 regulator-state-mem {
402 regulator-on-in-suspend;
403 regulator-suspend-microvolt = <1500000>;
407 vcca1v8_codec: LDO_REG7 {
410 regulator-min-microvolt = <1800000>;
411 regulator-max-microvolt = <1800000>;
412 regulator-name = "vcca1v8_codec";
414 regulator-state-mem {
415 regulator-off-in-suspend;
422 regulator-min-microvolt = <3000000>;
423 regulator-max-microvolt = <3000000>;
424 regulator-name = "vcc_3v0";
426 regulator-state-mem {
427 regulator-on-in-suspend;
428 regulator-suspend-microvolt = <3000000>;
432 vcc3v3_s3: SWITCH_REG1 {
435 regulator-name = "vcc3v3_s3";
437 regulator-state-mem {
438 regulator-off-in-suspend;
442 vcc3v3_s0: SWITCH_REG2 {
445 regulator-name = "vcc3v3_s0";
447 regulator-state-mem {
448 regulator-off-in-suspend;
456 clock-frequency = <200000>;
457 i2c-scl-rising-time-ns = <150>;
458 i2c-scl-falling-time-ns = <30>;
467 clock-frequency = <400000>;
468 i2c-scl-rising-time-ns = <160>;
469 i2c-scl-falling-time-ns = <30>;
472 fusb0: typec-portc@22 {
473 compatible = "fcs,fusb302";
475 interrupt-parent = <&gpio1>;
476 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
477 pinctrl-names = "default";
478 pinctrl-0 = <&fusb0_int>;
479 vbus-supply = <&vbus_typec>;
492 bt656-supply = <&vcc_1v8>;
493 audio-supply = <&vcca1v8_codec>;
494 sdmmc-supply = <&vcc_sdio>;
495 gpio1830-supply = <&vcc_3v0>;
500 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
501 assigned-clock-rates = <100000000>;
502 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
507 ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
508 max-link-speed = <2>;
510 vpcie0v9-supply = <&vcca0v9_s3>;
511 vpcie1v8-supply = <&vcca1v8_s3>;
517 fusb0_int: fusb0-int {
518 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
523 status_led_pin: status-led-pin {
524 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
530 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
534 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
539 cpu_b_sleep: cpu-b-sleep {
540 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
543 gpu_sleep: gpu-sleep {
544 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
547 pmic_int_l: pmic-int-l {
548 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
553 power_key: power-key {
554 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
559 bt_host_wake_l: bt-host-wake-l {
560 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
563 bt_reg_on_h: bt-reg-on-h {
564 /* external pullup to VCC1V8_PMUPLL */
565 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
568 bt_wake_l: bt-wake-l {
569 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
572 wifi_reg_on_h: wifi-reg_on-h {
573 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
578 sdmmc0_det_l: sdmmc0-det-l {
579 rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
582 sdmmc0_pwr_h: sdmmc0-pwr-h {
583 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
589 pmu1830-supply = <&vcc_3v0>;
602 pinctrl-names = "active";
603 pinctrl-0 = <&pwm2_pin_pull_down>;
608 vref-supply = <&vcca1v8_s3>;
623 keep-power-in-suspend;
624 mmc-pwrseq = <&sdio_pwrseq>;
626 pinctrl-names = "default";
627 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
636 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
638 pinctrl-names = "default";
639 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
641 vmmc-supply = <&vcc3v0_sd>;
642 vqmmc-supply = <&vcc_sdio>;
655 /* tshut mode 0:CRU 1:GPIO */
656 rockchip,hw-tshut-mode = <1>;
657 /* tshut polarity 0:LOW 1:HIGH */
658 rockchip,hw-tshut-polarity = <1>;
687 pinctrl-names = "default";
688 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
692 compatible = "brcm,bcm43438-bt";
695 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
696 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
697 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
698 max-speed = <4000000>;
699 pinctrl-names = "default";
700 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
701 vbat-supply = <&vcc3v3_sys>;
702 vddio-supply = <&vcc_1v8>;