arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * dts file for Xilinx ZynqMP ZCU111
   4  *
   5  * (C) Copyright 2017 - 2019, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "zynqmp.dtsi"
  13 #include "zynqmp-clk-ccf.dtsi"
  14 #include <dt-bindings/input/input.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16
  17 / {
  18         model = "ZynqMP ZCU111 RevA";
  19         compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
  20
  21         aliases {
  22                 ethernet0 = &gem3;
  23                 i2c0 = &i2c0;
  24                 i2c1 = &i2c1;
  25                 mmc0 = &sdhci1;
  26                 rtc0 = &rtc;
  27                 serial0 = &uart0;
  28                 serial1 = &dcc;
  29         };
  30
  31         chosen {
  32                 bootargs = "earlycon";
  33                 stdout-path = "serial0:115200n8";
  34         };
  35
  36         memory@0 {
  37                 device_type = "memory";
  38                 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
  39                 /* Another 4GB connected to PL */
  40         };
  41
  42         gpio-keys {
  43                 compatible = "gpio-keys";
  44                 autorepeat;
  45                 sw19 {
  46                         label = "sw19";
  47                         gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
  48                         linux,code = <KEY_DOWN>;
  49                         wakeup-source;
  50                         autorepeat;
  51                 };
  52         };
  53
  54         leds {
  55                 compatible = "gpio-leds";
  56                 heartbeat-led {
  57                         label = "heartbeat";
  58                         gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
  59                         linux,default-trigger = "heartbeat";
  60                 };
  61         };
  62
  63         ina226-u67 {
  64                 compatible = "iio-hwmon";
  65                 io-channels = <&u67 0>, <&u67 1>, <&u67 2>, <&u67 3>;
  66         };
  67         ina226-u59 {
  68                 compatible = "iio-hwmon";
  69                 io-channels = <&u59 0>, <&u59 1>, <&u59 2>, <&u59 3>;
  70         };
  71         ina226-u61 {
  72                 compatible = "iio-hwmon";
  73                 io-channels = <&u61 0>, <&u61 1>, <&u61 2>, <&u61 3>;
  74         };
  75         ina226-u60 {
  76                 compatible = "iio-hwmon";
  77                 io-channels = <&u60 0>, <&u60 1>, <&u60 2>, <&u60 3>;
  78         };
  79         ina226-u64 {
  80                 compatible = "iio-hwmon";
  81                 io-channels = <&u64 0>, <&u64 1>, <&u64 2>, <&u64 3>;
  82         };
  83         ina226-u69 {
  84                 compatible = "iio-hwmon";
  85                 io-channels = <&u69 0>, <&u69 1>, <&u69 2>, <&u69 3>;
  86         };
  87         ina226-u66 {
  88                 compatible = "iio-hwmon";
  89                 io-channels = <&u66 0>, <&u66 1>, <&u66 2>, <&u66 3>;
  90         };
  91         ina226-u65 {
  92                 compatible = "iio-hwmon";
  93                 io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
  94         };
  95         ina226-u63 {
  96                 compatible = "iio-hwmon";
  97                 io-channels = <&u63 0>, <&u63 1>, <&u63 2>, <&u63 3>;
  98         };
  99         ina226-u3 {
 100                 compatible = "iio-hwmon";
 101                 io-channels = <&u3 0>, <&u3 1>, <&u3 2>, <&u3 3>;
 102         };
 103         ina226-u71 {
 104                 compatible = "iio-hwmon";
 105                 io-channels = <&u71 0>, <&u71 1>, <&u71 2>, <&u71 3>;
 106         };
 107         ina226-u77 {
 108                 compatible = "iio-hwmon";
 109                 io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
 110         };
 111         ina226-u73 {
 112                 compatible = "iio-hwmon";
 113                 io-channels = <&u73 0>, <&u73 1>, <&u73 2>, <&u73 3>;
 114         };
 115         ina226-u79 {
 116                 compatible = "iio-hwmon";
 117                 io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
 118         };
 119 };
 120
 121 &dcc {
 122         status = "okay";
 123 };
 124
 125 &fpd_dma_chan1 {
 126         status = "okay";
 127 };
 128
 129 &fpd_dma_chan2 {
 130         status = "okay";
 131 };
 132
 133 &fpd_dma_chan3 {
 134         status = "okay";
 135 };
 136
 137 &fpd_dma_chan4 {
 138         status = "okay";
 139 };
 140
 141 &fpd_dma_chan5 {
 142         status = "okay";
 143 };
 144
 145 &fpd_dma_chan6 {
 146         status = "okay";
 147 };
 148
 149 &fpd_dma_chan7 {
 150         status = "okay";
 151 };
 152
 153 &fpd_dma_chan8 {
 154         status = "okay";
 155 };
 156
 157 &gem3 {
 158         status = "okay";
 159         phy-handle = <&phy0>;
 160         phy-mode = "rgmii-id";
 161         phy0: ethernet-phy@c {
 162                 reg = <0xc>;
 163                 ti,rx-internal-delay = <0x8>;
 164                 ti,tx-internal-delay = <0xa>;
 165                 ti,fifo-depth = <0x1>;
 166                 ti,dp83867-rxctrl-strap-quirk;
 167         };
 168 };
 169
 170 &gpio {
 171         status = "okay";
 172 };
 173
 174 &i2c0 {
 175         status = "okay";
 176         clock-frequency = <400000>;
 177
 178         tca6416_u22: gpio@20 {
 179                 compatible = "ti,tca6416";
 180                 reg = <0x20>;
 181                 gpio-controller; /* interrupt not connected */
 182                 #gpio-cells = <2>;
 183                 /*
 184                  * IRQ not connected
 185                  * Lines:
 186                  * 0 - MAX6643_OT_B
 187                  * 1 - MAX6643_FANFAIL_B
 188                  * 2 - MIO26_PMU_INPUT_LS
 189                  * 4 - SFP_SI5382_INT_ALM
 190                  * 5 - IIC_MUX_RESET_B
 191                  * 6 - GEM3_EXP_RESET_B
 192                  * 10 - FMCP_HSPC_PRSNT_M2C_B
 193                  * 11 - CLK_SPI_MUX_SEL0
 194                  * 12 - CLK_SPI_MUX_SEL1
 195                  * 16 - IRPS5401_ALERT_B
 196                  * 17 - INA226_PMBUS_ALERT
 197                  * 3, 7, 13-15 - not connected
 198                  */
 199         };
 200
 201         i2c-mux@75 { /* u23 */
 202                 compatible = "nxp,pca9544";
 203                 #address-cells = <1>;
 204                 #size-cells = <0>;
 205                 reg = <0x75>;
 206                 i2c@0 {
 207                         #address-cells = <1>;
 208                         #size-cells = <0>;
 209                         reg = <0>;
 210                         /* PS_PMBUS */
 211                         /* PMBUS_ALERT done via pca9544 */
 212                         u67: ina226@40 { /* u67 */
 213                                 compatible = "ti,ina226";
 214                                 #io-channel-cells = <1>;
 215                                 label = "ina226-u67";
 216                                 reg = <0x40>;
 217                                 shunt-resistor = <2000>;
 218                         };
 219                         u59: ina226@41 { /* u59 */
 220                                 compatible = "ti,ina226";
 221                                 #io-channel-cells = <1>;
 222                                 label = "ina226-u59";
 223                                 reg = <0x41>;
 224                                 shunt-resistor = <5000>;
 225                         };
 226                         u61: ina226@42 { /* u61 */
 227                                 compatible = "ti,ina226";
 228                                 #io-channel-cells = <1>;
 229                                 label = "ina226-u61";
 230                                 reg = <0x42>;
 231                                 shunt-resistor = <5000>;
 232                         };
 233                         u60: ina226@43 { /* u60 */
 234                                 compatible = "ti,ina226";
 235                                 #io-channel-cells = <1>;
 236                                 label = "ina226-u60";
 237                                 reg = <0x43>;
 238                                 shunt-resistor = <5000>;
 239                         };
 240                         u64: ina226@45 { /* u64 */
 241                                 compatible = "ti,ina226";
 242                                 #io-channel-cells = <1>;
 243                                 label = "ina226-u64";
 244                                 reg = <0x45>;
 245                                 shunt-resistor = <5000>;
 246                         };
 247                         u69: ina226@46 { /* u69 */
 248                                 compatible = "ti,ina226";
 249                                 #io-channel-cells = <1>;
 250                                 label = "ina226-u69";
 251                                 reg = <0x46>;
 252                                 shunt-resistor = <2000>;
 253                         };
 254                         u66: ina226@47 { /* u66 */
 255                                 compatible = "ti,ina226";
 256                                 #io-channel-cells = <1>;
 257                                 label = "ina226-u66";
 258                                 reg = <0x47>;
 259                                 shunt-resistor = <5000>;
 260                         };
 261                         u65: ina226@48 { /* u65 */
 262                                 compatible = "ti,ina226";
 263                                 #io-channel-cells = <1>;
 264                                 label = "ina226-u65";
 265                                 reg = <0x48>;
 266                                 shunt-resistor = <5000>;
 267                         };
 268                         u63: ina226@49 { /* u63 */
 269                                 compatible = "ti,ina226";
 270                                 #io-channel-cells = <1>;
 271                                 label = "ina226-u63";
 272                                 reg = <0x49>;
 273                                 shunt-resistor = <5000>;
 274                         };
 275                         u3: ina226@4a { /* u3 */
 276                                 compatible = "ti,ina226";
 277                                 #io-channel-cells = <1>;
 278                                 label = "ina226-u3";
 279                                 reg = <0x4a>;
 280                                 shunt-resistor = <5000>;
 281                         };
 282                         u71: ina226@4b { /* u71 */
 283                                 compatible = "ti,ina226";
 284                                 #io-channel-cells = <1>;
 285                                 label = "ina226-u71";
 286                                 reg = <0x4b>;
 287                                 shunt-resistor = <5000>;
 288                         };
 289                         u77: ina226@4c { /* u77 */
 290                                 compatible = "ti,ina226";
 291                                 #io-channel-cells = <1>;
 292                                 label = "ina226-u77";
 293                                 reg = <0x4c>;
 294                                 shunt-resistor = <5000>;
 295                         };
 296                         u73: ina226@4d { /* u73 */
 297                                 compatible = "ti,ina226";
 298                                 #io-channel-cells = <1>;
 299                                 label = "ina226-u73";
 300                                 reg = <0x4d>;
 301                                 shunt-resistor = <5000>;
 302                         };
 303                         u79: ina226@4e { /* u79 */
 304                                 compatible = "ti,ina226";
 305                                 #io-channel-cells = <1>;
 306                                 label = "ina226-u79";
 307                                 reg = <0x4e>;
 308                                 shunt-resistor = <5000>;
 309                         };
 310                 };
 311                 i2c@1 {
 312                         #address-cells = <1>;
 313                         #size-cells = <0>;
 314                         reg = <1>;
 315                         /* NC */
 316                 };
 317                 i2c@2 {
 318                         #address-cells = <1>;
 319                         #size-cells = <0>;
 320                         reg = <2>;
 321                         irps5401_43: irps54012@43 { /* IRPS5401 - u53 check these */
 322                                 reg = <0x43>;
 323                         };
 324                         irps5401_44: irps54012@44 { /* IRPS5401 - u55 */
 325                                 reg = <0x44>;
 326                         };
 327                         irps5401_45: irps54012@45 { /* IRPS5401 - u57 */
 328                                 reg = <0x45>;
 329                         };
 330                         /* u68 IR38064 +0 */
 331                         /* u70 IR38060 +1 */
 332                         /* u74 IR38060 +2 */
 333                         /* u75 IR38060 +6 */
 334                         /* J19 header too */
 335
 336                 };
 337                 i2c@3 {
 338                         #address-cells = <1>;
 339                         #size-cells = <0>;
 340                         reg = <3>;
 341                         /* SYSMON */
 342                 };
 343         };
 344 };
 345
 346 &i2c1 {
 347         status = "okay";
 348         clock-frequency = <400000>;
 349
 350         i2c-mux@74 { /* u26 */
 351                 compatible = "nxp,pca9548";
 352                 #address-cells = <1>;
 353                 #size-cells = <0>;
 354                 reg = <0x74>;
 355                 i2c@0 {
 356                         #address-cells = <1>;
 357                         #size-cells = <0>;
 358                         reg = <0>;
 359                         /*
 360                          * IIC_EEPROM 1kB memory which uses 256B blocks
 361                          * where every block has different address.
 362                          *    0 - 256B address 0x54
 363                          * 256B - 512B address 0x55
 364                          * 512B - 768B address 0x56
 365                          * 768B - 1024B address 0x57
 366                          */
 367                         eeprom: eeprom@54 { /* u88 */
 368                                 compatible = "atmel,24c08";
 369                                 reg = <0x54>;
 370                         };
 371                 };
 372                 i2c@1 {
 373                         #address-cells = <1>;
 374                         #size-cells = <0>;
 375                         reg = <1>;
 376                         si5341: clock-generator@36 { /* SI5341 - u46 */
 377                                 reg = <0x36>;
 378                         };
 379
 380                 };
 381                 i2c@2 {
 382                         #address-cells = <1>;
 383                         #size-cells = <0>;
 384                         reg = <2>;
 385                         si570_1: clock-generator@5d { /* USER SI570 - u47 */
 386                                 #clock-cells = <0>;
 387                                 compatible = "silabs,si570";
 388                                 reg = <0x5d>;
 389                                 temperature-stability = <50>;
 390                                 factory-fout = <300000000>;
 391                                 clock-frequency = <300000000>;
 392                                 clock-output-names = "si570_user";
 393                         };
 394                 };
 395                 i2c@3 {
 396                         #address-cells = <1>;
 397                         #size-cells = <0>;
 398                         reg = <3>;
 399                         si570_2: clock-generator@5d { /* USER MGT SI570 - u49 */
 400                                 #clock-cells = <0>;
 401                                 compatible = "silabs,si570";
 402                                 reg = <0x5d>;
 403                                 temperature-stability = <50>;
 404                                 factory-fout = <156250000>;
 405                                 clock-frequency = <156250000>;
 406                                 clock-output-names = "si570_mgt";
 407                         };
 408                 };
 409                 i2c@4 {
 410                         #address-cells = <1>;
 411                         #size-cells = <0>;
 412                         reg = <4>;
 413                         si5328: clock-generator@69 { /* SI5328 - u48 */
 414                                 reg = <0x69>;
 415                         };
 416                 };
 417                 i2c@5 {
 418                         #address-cells = <1>;
 419                         #size-cells = <0>;
 420                         reg = <5>;
 421                                 sc18is603@2f { /* sc18is602 - u93 */
 422                                         compatible = "nxp,sc18is603";
 423                                         reg = <0x2f>;
 424                                         /* 4 gpios for CS not handled by driver */
 425                                         /*
 426                                          * USB2ANY cable or
 427                                          * LMK04208 - u90 or
 428                                          * LMX2594 - u102 or
 429                                          * LMX2594 - u103 or
 430                                          * LMX2594 - u104
 431                                          */
 432                                 };
 433                 };
 434                 i2c@6 {
 435                         #address-cells = <1>;
 436                         #size-cells = <0>;
 437                         reg = <6>;
 438                         /* FMC connector */
 439                 };
 440                 /* 7 NC */
 441         };
 442
 443         i2c-mux@75 {
 444                 compatible = "nxp,pca9548"; /* u27 */
 445                 #address-cells = <1>;
 446                 #size-cells = <0>;
 447                 reg = <0x75>;
 448
 449                 i2c@0 {
 450                         #address-cells = <1>;
 451                         #size-cells = <0>;
 452                         reg = <0>;
 453                         /* FMCP_HSPC_IIC */
 454                 };
 455                 i2c@1 {
 456                         #address-cells = <1>;
 457                         #size-cells = <0>;
 458                         reg = <1>;
 459                         /* NC */
 460                 };
 461                 i2c@2 {
 462                         #address-cells = <1>;
 463                         #size-cells = <0>;
 464                         reg = <2>;
 465                         /* SYSMON */
 466                 };
 467                 i2c@3 {
 468                         #address-cells = <1>;
 469                         #size-cells = <0>;
 470                         reg = <3>;
 471                         /* DDR4 SODIMM */
 472                 };
 473                 i2c@4 {
 474                         #address-cells = <1>;
 475                         #size-cells = <0>;
 476                         reg = <4>;
 477                         /* SFP3 */
 478                 };
 479                 i2c@5 {
 480                         #address-cells = <1>;
 481                         #size-cells = <0>;
 482                         reg = <5>;
 483                         /* SFP2 */
 484                 };
 485                 i2c@6 {
 486                         #address-cells = <1>;
 487                         #size-cells = <0>;
 488                         reg = <6>;
 489                         /* SFP1 */
 490                 };
 491                 i2c@7 {
 492                         #address-cells = <1>;
 493                         #size-cells = <0>;
 494                         reg = <7>;
 495                         /* SFP0 */
 496                 };
 497         };
 498 };
 499
 500 &rtc {
 501         status = "okay";
 502 };
 503
 504 &sata {
 505         status = "okay";
 506         /* SATA OOB timing settings */
 507         ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
 508         ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
 509         ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 510         ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 511         ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
 512         ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
 513         ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 514         ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 515 };
 516
 517 /* SD1 with level shifter */
 518 &sdhci1 {
 519         status = "okay";
 520         no-1-8-v;
 521 };
 522
 523 &uart0 {
 524         status = "okay";
 525 };
 526
 527 /* ULPI SMSC USB3320 */
 528 &usb0 {
 529         status = "okay";
 530         dr_mode = "host";
 531 };