1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Port on Texas Instruments TMS320C6x architecture
5 * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
6 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
12 * ELF register definitions..
14 #include <asm/ptrace.h>
16 typedef unsigned long elf_greg_t
;
17 typedef unsigned long elf_fpreg_t
;
22 typedef elf_greg_t elf_gregset_t
[ELF_NGREG
];
23 typedef elf_fpreg_t elf_fpregset_t
[ELF_NFPREG
];
26 * This is used to ensure we don't load something for the wrong architecture.
28 #define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000)
30 #define elf_check_fdpic(x) (1)
31 #define elf_check_const_displacement(x) (0)
33 #define ELF_FDPIC_PLAT_INIT(_regs, _exec_map, _interp_map, _dynamic_addr) \
35 _regs->b4 = (_exec_map); \
36 _regs->a6 = (_interp_map); \
37 _regs->b6 = (_dynamic_addr); \
40 #define ELF_FDPIC_CORE_EFLAGS 0
43 * These are used to set parameters in the core dumps.
45 #ifdef __LITTLE_ENDIAN__
46 #define ELF_DATA ELFDATA2LSB
48 #define ELF_DATA ELFDATA2MSB
51 #define ELF_CLASS ELFCLASS32
52 #define ELF_ARCH EM_TI_C6000
54 /* Nothing for now. Need to setup DP... */
55 #define ELF_PLAT_INIT(_r)
57 #define ELF_EXEC_PAGESIZE 4096
59 #define ELF_CORE_COPY_REGS(_dest, _regs) \
60 memcpy((char *) &_dest, (char *) _regs, \
61 sizeof(struct pt_regs));
63 /* This yields a mask that user programs can use to figure out what
64 instruction set this cpu supports. */
68 /* This yields a string that ld.so will use to load implementation
69 specific libraries for optimization. This is more specific in
70 intent than poking at uname or /proc/cpuinfo. */
72 #define ELF_PLATFORM (NULL)
74 /* C6X specific section types */
75 #define SHT_C6000_UNWIND 0x70000001
76 #define SHT_C6000_PREEMPTMAP 0x70000002
77 #define SHT_C6000_ATTRIBUTES 0x70000003
79 /* C6X specific DT_ tags */
80 #define DT_C6000_DSBT_BASE 0x70000000
81 #define DT_C6000_DSBT_SIZE 0x70000001
82 #define DT_C6000_PREEMPTMAP 0x70000002
83 #define DT_C6000_DSBT_INDEX 0x70000003
85 /* C6X specific relocs */
86 #define R_C6000_NONE 0
87 #define R_C6000_ABS32 1
88 #define R_C6000_ABS16 2
89 #define R_C6000_ABS8 3
90 #define R_C6000_PCR_S21 4
91 #define R_C6000_PCR_S12 5
92 #define R_C6000_PCR_S10 6
93 #define R_C6000_PCR_S7 7
94 #define R_C6000_ABS_S16 8
95 #define R_C6000_ABS_L16 9
96 #define R_C6000_ABS_H16 10
97 #define R_C6000_SBR_U15_B 11
98 #define R_C6000_SBR_U15_H 12
99 #define R_C6000_SBR_U15_W 13
100 #define R_C6000_SBR_S16 14
101 #define R_C6000_SBR_L16_B 15
102 #define R_C6000_SBR_L16_H 16
103 #define R_C6000_SBR_L16_W 17
104 #define R_C6000_SBR_H16_B 18
105 #define R_C6000_SBR_H16_H 19
106 #define R_C6000_SBR_H16_W 20
107 #define R_C6000_SBR_GOT_U15_W 21
108 #define R_C6000_SBR_GOT_L16_W 22
109 #define R_C6000_SBR_GOT_H16_W 23
110 #define R_C6000_DSBT_INDEX 24
111 #define R_C6000_PREL31 25
112 #define R_C6000_COPY 26
113 #define R_C6000_ALIGN 253
114 #define R_C6000_FPHEAD 254
115 #define R_C6000_NOCMP 255
117 #endif /*_ASM_C6X_ELF_H */