1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_IA64_PCI_H
3 #define _ASM_IA64_PCI_H
6 #include <linux/slab.h>
7 #include <linux/spinlock.h>
8 #include <linux/string.h>
9 #include <linux/types.h>
10 #include <linux/scatterlist.h>
13 #include <asm/hw_irq.h>
15 struct pci_vector_struct
{
16 __u16 segment
; /* PCI Segment number */
17 __u16 bus
; /* PCI Bus number */
18 __u32 pci_id
; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
19 __u8 pin
; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
20 __u32 irq
; /* IRQ assigned */
24 * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
25 * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
28 #define pcibios_assign_all_busses() 0
30 #define PCIBIOS_MIN_IO 0x1000
31 #define PCIBIOS_MIN_MEM 0x10000000
34 #define ARCH_GENERIC_PCI_MMAP_RESOURCE
35 #define arch_can_pci_mmap_wc() 1
37 #define HAVE_PCI_LEGACY
38 extern int pci_mmap_legacy_page_range(struct pci_bus
*bus
,
39 struct vm_area_struct
*vma
,
40 enum pci_mmap_state mmap_state
);
42 char *pci_get_legacy_mem(struct pci_bus
*bus
);
43 int pci_legacy_read(struct pci_bus
*bus
, u16 port
, u32
*val
, u8 size
);
44 int pci_legacy_write(struct pci_bus
*bus
, u16 port
, u32 val
, u8 size
);
46 struct pci_controller
{
47 struct acpi_device
*companion
;
50 int node
; /* nearest node with memory or NUMA_NO_NODE for global allocation */
56 #define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
57 #define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
59 extern struct pci_ops pci_root_ops
;
61 static inline int pci_proc_domain(struct pci_bus
*bus
)
63 return (pci_domain_nr(bus
) != 0);
66 #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
67 static inline int pci_get_legacy_ide_irq(struct pci_dev
*dev
, int channel
)
69 return channel
? isa_irq_to_vector(15) : isa_irq_to_vector(14);
72 #endif /* _ASM_IA64_PCI_H */