2 * stmark2.c -- Support for Sysam AMCORE open board
4 * (C) Copyright 2017, Angelo Dureghello <angelo@sysam.it>
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
11 #include <linux/platform_device.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/spi/spi.h>
14 #include <linux/spi/spi-fsl-dspi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/dma-mapping.h>
17 #include <asm/mcfsim.h>
20 * Partitioning of parallel NOR flash (39VF3201B)
22 static struct mtd_partition stmark2_partitions
[] = {
24 .name
= "U-Boot (1024K)",
28 .name
= "Kernel+initramfs (7168K)",
30 .offset
= MTDPART_OFS_APPEND
32 .name
= "Flash Free Space (8192K)",
33 .size
= MTDPART_SIZ_FULL
,
34 .offset
= MTDPART_OFS_APPEND
38 static struct flash_platform_data stmark2_spi_flash_data
= {
40 .parts
= stmark2_partitions
,
41 .nr_parts
= ARRAY_SIZE(stmark2_partitions
),
45 static struct spi_board_info stmark2_board_info
[] __initdata
= {
48 .max_speed_hz
= 5000000,
51 .platform_data
= &stmark2_spi_flash_data
,
56 /* SPI controller data, SPI (0) */
57 static struct fsl_dspi_platform_data dspi_spi0_info
= {
64 static struct resource dspi_spi0_resource
[] = {
66 .start
= MCFDSPI_BASE0
,
67 .end
= MCFDSPI_BASE0
+ 0xFF,
68 .flags
= IORESOURCE_MEM
,
73 .flags
= IORESOURCE_DMA
,
76 .start
= MCF_IRQ_DSPI0
,
78 .flags
= IORESOURCE_IRQ
,
82 static u64 stmark2_dspi_mask
= DMA_BIT_MASK(32);
84 /* SPI controller, id = bus number */
85 static struct platform_device dspi_spi0_device
= {
88 .num_resources
= ARRAY_SIZE(dspi_spi0_resource
),
89 .resource
= dspi_spi0_resource
,
91 .platform_data
= &dspi_spi0_info
,
92 .dma_mask
= &stmark2_dspi_mask
,
93 .coherent_dma_mask
= DMA_BIT_MASK(32),
97 static struct platform_device
*stmark2_devices
[] __initdata
= {
102 * Note: proper pin-mux setup is mandatory for proper SPI functionality.
104 static int __init
init_stmark2(void)
106 /* DSPI0, all pins as DSPI, and using CS1 */
107 __raw_writeb(0x80, MCFGPIO_PAR_DSPIOWL
);
108 __raw_writeb(0xfc, MCFGPIO_PAR_DSPIOWH
);
110 /* Board gpio setup */
111 __raw_writeb(0x00, MCFGPIO_PAR_BE
);
112 __raw_writeb(0x00, MCFGPIO_PAR_FBCTL
);
113 __raw_writeb(0x00, MCFGPIO_PAR_CS
);
114 __raw_writeb(0x00, MCFGPIO_PAR_CANI2C
);
116 platform_add_devices(stmark2_devices
, ARRAY_SIZE(stmark2_devices
));
118 spi_register_board_info(stmark2_board_info
,
119 ARRAY_SIZE(stmark2_board_info
));
124 late_initcall(init_stmark2
);