1 /* SPDX-License-Identifier: GPL-2.0 */
2 /****************************************************************************/
5 * nettel.h -- Lineo (formerly Moreton Bay) NETtel support.
7 * (C) Copyright 1999-2000, Moreton Bay (www.moretonbay.com)
8 * (C) Copyright 2000-2001, Lineo Inc. (www.lineo.com)
9 * (C) Copyright 2001-2002, SnapGear Inc., (www.snapgear.com)
12 /****************************************************************************/
15 /****************************************************************************/
18 /****************************************************************************/
20 /****************************************************************************/
22 #ifdef CONFIG_COLDFIRE
23 #include <asm/coldfire.h>
24 #include <asm/mcfsim.h>
28 /*---------------------------------------------------------------------------*/
29 #if defined(CONFIG_M5307)
31 * NETtel/5307 based hardware first. DTR/DCD lines are wired to
32 * GPIO lines. Most of the LED's are driver through a latch
35 #define MCFPP_DCD1 0x0001
36 #define MCFPP_DCD0 0x0002
37 #define MCFPP_DTR1 0x0004
38 #define MCFPP_DTR0 0x0008
40 #define NETtel_LEDADDR 0x30400000
44 extern volatile unsigned short ppdata
;
47 * These functions defined to give quasi generic access to the
48 * PPIO bits used for DTR/DCD.
50 static __inline__
unsigned int mcf_getppdata(void)
52 volatile unsigned short *pp
;
53 pp
= (volatile unsigned short *) MCFSIM_PADAT
;
54 return((unsigned int) *pp
);
57 static __inline__
void mcf_setppdata(unsigned int mask
, unsigned int bits
)
59 volatile unsigned short *pp
;
60 pp
= (volatile unsigned short *) MCFSIM_PADAT
;
61 ppdata
= (ppdata
& ~mask
) | bits
;
66 /*---------------------------------------------------------------------------*/
67 #elif defined(CONFIG_M5206e)
69 * NETtel/5206e based hardware has leds on latch on CS3.
70 * No support modem for lines??
72 #define NETtel_LEDADDR 0x50000000
74 /*---------------------------------------------------------------------------*/
75 #elif defined(CONFIG_M5272)
77 * NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines.
79 #define MCFPP_DCD0 0x0080
80 #define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */
81 #define MCFPP_DTR0 0x0040
82 #define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */
86 * These functions defined to give quasi generic access to the
87 * PPIO bits used for DTR/DCD.
89 static __inline__
unsigned int mcf_getppdata(void)
91 return readw(MCFSIM_PBDAT
);
94 static __inline__
void mcf_setppdata(unsigned int mask
, unsigned int bits
)
96 writew((readw(MCFSIM_PBDAT
) & ~mask
) | bits
, MCFSIM_PBDAT
);
101 /*---------------------------------------------------------------------------*/
103 /****************************************************************************/
104 #endif /* CONFIG_NETtel */
105 /****************************************************************************/
106 #endif /* nettel_h */