WIP FPC-III support
[linux/fpc-iii.git] / arch / microblaze / include / asm / exceptions.h
blob967f175173e1412f55e4178663c4948c97783ff0
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Preliminary support for HW exception handing for Microblaze
5 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
6 * Copyright (C) 2008-2009 PetaLogix
7 * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
8 */
10 #ifndef _ASM_MICROBLAZE_EXCEPTIONS_H
11 #define _ASM_MICROBLAZE_EXCEPTIONS_H
13 #ifdef __KERNEL__
14 #ifndef __ASSEMBLY__
16 /* Macros to enable and disable HW exceptions in the MSR */
17 /* Define MSR enable bit for HW exceptions */
18 #define HWEX_MSR_BIT (1 << 8)
20 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
21 #define __enable_hw_exceptions() \
22 __asm__ __volatile__ (" msrset r0, %0; \
23 nop;" \
24 : \
25 : "i" (HWEX_MSR_BIT) \
26 : "memory")
28 #define __disable_hw_exceptions() \
29 __asm__ __volatile__ (" msrclr r0, %0; \
30 nop;" \
31 : \
32 : "i" (HWEX_MSR_BIT) \
33 : "memory")
34 #else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
35 #define __enable_hw_exceptions() \
36 __asm__ __volatile__ (" \
37 mfs r12, rmsr; \
38 nop; \
39 ori r12, r12, %0; \
40 mts rmsr, r12; \
41 nop;" \
42 : \
43 : "i" (HWEX_MSR_BIT) \
44 : "memory", "r12")
46 #define __disable_hw_exceptions() \
47 __asm__ __volatile__ (" \
48 mfs r12, rmsr; \
49 nop; \
50 andi r12, r12, ~%0; \
51 mts rmsr, r12; \
52 nop;" \
53 : \
54 : "i" (HWEX_MSR_BIT) \
55 : "memory", "r12")
56 #endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
58 asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
59 int fsr, int addr);
61 asmlinkage void sw_exception(struct pt_regs *regs);
62 void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig);
64 void die(const char *str, struct pt_regs *fp, long err);
65 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
67 #endif /*__ASSEMBLY__ */
68 #endif /* __KERNEL__ */
69 #endif /* _ASM_MICROBLAZE_EXCEPTIONS_H */