WIP FPC-III support
[linux/fpc-iii.git] / arch / microblaze / include / asm / registers.h
blob6b36693fc62184d2f9f71291cfa738ae59462dff
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
4 * Copyright (C) 2008-2009 PetaLogix
5 * Copyright (C) 2006 Atmark Techno, Inc.
6 */
8 #ifndef _ASM_MICROBLAZE_REGISTERS_H
9 #define _ASM_MICROBLAZE_REGISTERS_H
11 #define MSR_BE (1<<0) /* 0x001 */
12 #define MSR_IE (1<<1) /* 0x002 */
13 #define MSR_C (1<<2) /* 0x004 */
14 #define MSR_BIP (1<<3) /* 0x008 */
15 #define MSR_FSL (1<<4) /* 0x010 */
16 #define MSR_ICE (1<<5) /* 0x020 */
17 #define MSR_DZ (1<<6) /* 0x040 */
18 #define MSR_DCE (1<<7) /* 0x080 */
19 #define MSR_EE (1<<8) /* 0x100 */
20 #define MSR_EIP (1<<9) /* 0x200 */
21 #define MSR_CC (1<<31)
23 /* Floating Point Status Register (FSR) Bits */
24 #define FSR_IO (1<<4) /* Invalid operation */
25 #define FSR_DZ (1<<3) /* Divide-by-zero */
26 #define FSR_OF (1<<2) /* Overflow */
27 #define FSR_UF (1<<1) /* Underflow */
28 #define FSR_DO (1<<0) /* Denormalized operand error */
30 /* Machine State Register (MSR) Fields */
31 # define MSR_UM (1<<11) /* User Mode */
32 # define MSR_UMS (1<<12) /* User Mode Save */
33 # define MSR_VM (1<<13) /* Virtual Mode */
34 # define MSR_VMS (1<<14) /* Virtual Mode Save */
36 # define MSR_KERNEL (MSR_EE | MSR_VM)
37 /* # define MSR_USER (MSR_KERNEL | MSR_UM | MSR_IE) */
38 # define MSR_KERNEL_VMS (MSR_EE | MSR_VMS)
39 /* # define MSR_USER_VMS (MSR_KERNEL_VMS | MSR_UMS | MSR_IE) */
41 /* Exception State Register (ESR) Fields */
42 # define ESR_DIZ (1<<11) /* Zone Protection */
43 # define ESR_S (1<<10) /* Store instruction */
45 #endif /* _ASM_MICROBLAZE_REGISTERS_H */