1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "brcm,bcm3368";
11 mips-hpt-frequency = <150000000>;
14 compatible = "brcm,bmips4350";
20 compatible = "brcm,bmips4350";
27 periph_clk: periph-clk {
28 compatible = "fixed-clock";
30 clock-frequency = <50000000>;
39 cpu_intc: interrupt-controller {
41 compatible = "mti,cpu-interrupt-controller";
44 #interrupt-cells = <1>;
51 compatible = "simple-bus";
54 clkctl: clock-controller@fff8c004 {
55 compatible = "brcm,bcm3368-clocks";
56 reg = <0xfff8c004 0x4>;
60 periph_cntl: syscon@fff8c008 {
61 compatible = "syscon";
62 reg = <0xfff8c000 0x4>;
66 reboot: syscon-reboot@fff8c008 {
67 compatible = "syscon-reboot";
68 regmap = <&periph_cntl>;
73 periph_intc: interrupt-controller@fff8c00c {
74 compatible = "brcm,bcm6345-l1-intc";
75 reg = <0xfff8c00c 0x8>;
78 #interrupt-cells = <1>;
80 interrupt-parent = <&cpu_intc>;
84 uart0: serial@fff8c100 {
85 compatible = "brcm,bcm6345-uart";
86 reg = <0xfff8c100 0x18>;
88 interrupt-parent = <&periph_intc>;
91 clocks = <&periph_clk>;
92 clock-names = "refclk";
97 uart1: serial@fff8c120 {
98 compatible = "brcm,bcm6345-uart";
99 reg = <0xfff8c120 0x18>;
101 interrupt-parent = <&periph_intc>;
104 clocks = <&periph_clk>;
105 clock-names = "refclk";