1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
8 device_type = "memory";
10 /* Typical ranges. The bootloader should fill these in. */
11 reg = <0x06000000 0x02000000>,
12 <0x0e000000 0x02000000>;
19 /* 1/2 of the CPU core clock (standard MIPS behavior) */
20 mips-hpt-frequency = <300000000>;
23 compatible = "brcm,bmips4350";
31 compatible = "mti,cpu-interrupt-controller";
34 #interrupt-cells = <1>;
38 periph_clk: periph_clk {
39 compatible = "fixed-clock";
41 clock-frequency = <54000000>;
53 compatible = "brcm,ubus", "simple-bus";
55 /* No dma-ranges on Viper. */
57 periph_intc: periph_intc@14e00048 {
58 compatible = "brcm,bcm3380-l2-intc";
59 reg = <0x14e00048 0x4 0x14e0004c 0x4>,
60 <0x14e00350 0x4 0x14e00354 0x4>;
63 #interrupt-cells = <1>;
65 interrupt-parent = <&cpu_intc>;
69 cmips_intc: cmips_intc@151f8048 {
70 compatible = "brcm,bcm3380-l2-intc";
71 reg = <0x151f8048 0x4 0x151f804c 0x4>;
74 #interrupt-cells = <1>;
76 interrupt-parent = <&periph_intc>;
78 brcm,int-map-mask = <0xffffffff>;
81 uart0: serial@14e00520 {
82 compatible = "brcm,bcm6345-uart";
83 reg = <0x14e00520 0x18>;
84 interrupt-parent = <&periph_intc>;
86 clocks = <&periph_clk>;
91 compatible = "brcm,bcm3384-ehci", "generic-ehci";
92 reg = <0x15400300 0x100>;
94 interrupt-parent = <&periph_intc>;
100 compatible = "brcm,bcm3384-ohci", "generic-ohci";
101 reg = <0x15400400 0x100>;
104 interrupt-parent = <&periph_intc>;