arch/mips/boot/dts/brcm/bcm6328.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 / {
   3         #address-cells = <1>;
   4         #size-cells = <1>;
   5         compatible = "brcm,bcm6328";
   6
   7         cpus {
   8                 #address-cells = <1>;
   9                 #size-cells = <0>;
  10
  11                 mips-hpt-frequency = <160000000>;
  12
  13                 cpu@0 {
  14                         compatible = "brcm,bmips4350";
  15                         device_type = "cpu";
  16                         reg = <0>;
  17                 };
  18
  19                 cpu@1 {
  20                         compatible = "brcm,bmips4350";
  21                         device_type = "cpu";
  22                         reg = <1>;
  23                 };
  24         };
  25
  26         clocks {
  27                 periph_clk: periph-clk {
  28                         compatible = "fixed-clock";
  29                         #clock-cells = <0>;
  30                         clock-frequency = <50000000>;
  31                 };
  32         };
  33
  34         aliases {
  35                 serial0 = &uart0;
  36                 serial1 = &uart1;
  37         };
  38
  39         cpu_intc: interrupt-controller {
  40                 #address-cells = <0>;
  41                 compatible = "mti,cpu-interrupt-controller";
  42
  43                 interrupt-controller;
  44                 #interrupt-cells = <1>;
  45         };
  46
  47         ubus {
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50
  51                 compatible = "simple-bus";
  52                 ranges;
  53
  54                 clkctl: clock-controller@10000004 {
  55                         compatible = "brcm,bcm6328-clocks";
  56                         reg = <0x10000004 0x4>;
  57                         #clock-cells = <1>;
  58                 };
  59
  60                 periph_rst: reset-controller@10000010 {
  61                         compatible = "brcm,bcm6345-reset";
  62                         reg = <0x10000010 0x4>;
  63                         #reset-cells = <1>;
  64                 };
  65
  66                 periph_intc: interrupt-controller@10000020 {
  67                         compatible = "brcm,bcm6345-l1-intc";
  68                         reg = <0x10000020 0x10>,
  69                               <0x10000030 0x10>;
  70
  71                         interrupt-controller;
  72                         #interrupt-cells = <1>;
  73
  74                         interrupt-parent = <&cpu_intc>;
  75                         interrupts = <2>, <3>;
  76                 };
  77
  78                 uart0: serial@10000100 {
  79                         compatible = "brcm,bcm6345-uart";
  80                         reg = <0x10000100 0x18>;
  81                         interrupt-parent = <&periph_intc>;
  82                         interrupts = <28>;
  83                         clocks = <&periph_clk>;
  84                         clock-names = "refclk";
  85                         status = "disabled";
  86                 };
  87
  88                 uart1: serial@10000120 {
  89                         compatible = "brcm,bcm6345-uart";
  90                         reg = <0x10000120 0x18>;
  91                         interrupt-parent = <&periph_intc>;
  92                         interrupts = <39>;
  93                         clocks = <&periph_clk>;
  94                         clock-names = "refclk";
  95                         status = "disabled";
  96                 };
  97
  98                 timer: syscon@10000040 {
  99                         compatible = "syscon";
 100                         reg = <0x10000040 0x2c>;
 101                         native-endian;
 102                 };
 103
 104                 reboot: syscon-reboot@10000068 {
 105                         compatible = "syscon-reboot";
 106                         regmap = <&timer>;
 107                         offset = <0x28>;
 108                         mask = <0x1>;
 109                 };
 110
 111                 leds0: led-controller@10000800 {
 112                         #address-cells = <1>;
 113                         #size-cells = <0>;
 114                         compatible = "brcm,bcm6328-leds";
 115                         reg = <0x10000800 0x24>;
 116                         status = "disabled";
 117                 };
 118
 119                 periph_pwr: power-controller@10001848 {
 120                         compatible = "brcm,bcm6328-power-controller";
 121                         reg = <0x10001848 0x4>;
 122                         #power-domain-cells = <1>;
 123                 };
 124
 125                 ehci: usb@10002500 {
 126                         compatible = "brcm,bcm6328-ehci", "generic-ehci";
 127                         reg = <0x10002500 0x100>;
 128                         big-endian;
 129                         interrupt-parent = <&periph_intc>;
 130                         interrupts = <42>;
 131                         status = "disabled";
 132                 };
 133
 134                 ohci: usb@10002600 {
 135                         compatible = "brcm,bcm6328-ohci", "generic-ohci";
 136                         reg = <0x10002600 0x100>;
 137                         big-endian;
 138                         no-big-frame-no;
 139                         interrupt-parent = <&periph_intc>;
 140                         interrupts = <41>;
 141                         status = "disabled";
 142                 };
 143         };
 144 };