1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
9 compatible = "ingenic,jz4780";
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clocks = <&cgu JZ4780_CLK_CPU>;
26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
29 clocks = <&cgu JZ4780_CLK_CORE1>;
34 cpuintc: interrupt-controller {
36 #interrupt-cells = <1>;
38 compatible = "mti,cpu-interrupt-controller";
41 intc: interrupt-controller@10001000 {
42 compatible = "ingenic,jz4780-intc";
43 reg = <0x10001000 0x50>;
46 #interrupt-cells = <1>;
48 interrupt-parent = <&cpuintc>;
53 compatible = "fixed-clock";
58 compatible = "fixed-clock";
60 clock-frequency = <32768>;
63 cgu: jz4780-cgu@10000000 {
64 compatible = "ingenic,jz4780-cgu", "simple-mfd";
65 reg = <0x10000000 0x100>;
68 ranges = <0x0 0x10000000 0x100>;
72 clocks = <&ext>, <&rtc>;
73 clock-names = "ext", "rtc";
76 compatible = "ingenic,jz4780-phy";
79 clocks = <&cgu JZ4780_CLK_OTG1>;
87 compatible = "ingenic,jz4780-rng";
95 compatible = "ingenic,jz4780-tcu",
98 reg = <0x10002000 0x1000>;
101 ranges = <0x0 0x10002000 0x1000>;
105 clocks = <&cgu JZ4780_CLK_RTCLK>,
106 <&cgu JZ4780_CLK_EXCLK>,
107 <&cgu JZ4780_CLK_PCLK>;
108 clock-names = "rtc", "ext", "pclk";
110 interrupt-controller;
111 #interrupt-cells = <1>;
113 interrupt-parent = <&intc>;
114 interrupts = <27 26 25>;
116 watchdog: watchdog@0 {
117 compatible = "ingenic,jz4780-watchdog";
120 clocks = <&tcu TCU_CLK_WDT>;
125 compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
130 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
131 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
132 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
133 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
134 clock-names = "timer0", "timer1", "timer2", "timer3",
135 "timer4", "timer5", "timer6", "timer7";
139 compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
142 clocks = <&tcu TCU_CLK_OST>;
149 rtc_dev: rtc@10003000 {
150 compatible = "ingenic,jz4780-rtc";
151 reg = <0x10003000 0x4c>;
153 interrupt-parent = <&intc>;
156 clocks = <&cgu JZ4780_CLK_RTCLK>;
160 pinctrl: pin-controller@10010000 {
161 compatible = "ingenic,jz4780-pinctrl";
162 reg = <0x10010000 0x600>;
164 #address-cells = <1>;
168 compatible = "ingenic,jz4780-gpio";
172 gpio-ranges = <&pinctrl 0 0 32>;
175 interrupt-controller;
176 #interrupt-cells = <2>;
178 interrupt-parent = <&intc>;
183 compatible = "ingenic,jz4780-gpio";
187 gpio-ranges = <&pinctrl 0 32 32>;
190 interrupt-controller;
191 #interrupt-cells = <2>;
193 interrupt-parent = <&intc>;
198 compatible = "ingenic,jz4780-gpio";
202 gpio-ranges = <&pinctrl 0 64 32>;
205 interrupt-controller;
206 #interrupt-cells = <2>;
208 interrupt-parent = <&intc>;
213 compatible = "ingenic,jz4780-gpio";
217 gpio-ranges = <&pinctrl 0 96 32>;
220 interrupt-controller;
221 #interrupt-cells = <2>;
223 interrupt-parent = <&intc>;
228 compatible = "ingenic,jz4780-gpio";
232 gpio-ranges = <&pinctrl 0 128 32>;
235 interrupt-controller;
236 #interrupt-cells = <2>;
238 interrupt-parent = <&intc>;
243 compatible = "ingenic,jz4780-gpio";
247 gpio-ranges = <&pinctrl 0 160 32>;
250 interrupt-controller;
251 #interrupt-cells = <2>;
253 interrupt-parent = <&intc>;
259 compatible = "spi-gpio";
260 #address-cells = <1>;
262 num-chipselects = <2>;
264 gpio-miso = <&gpe 14 0>;
265 gpio-sck = <&gpe 15 0>;
266 gpio-mosi = <&gpe 17 0>;
267 cs-gpios = <&gpe 16 0>, <&gpe 18 0>;
270 compatible = "spidev";
272 spi-max-frequency = <1000000>;
276 uart0: serial@10030000 {
277 compatible = "ingenic,jz4780-uart";
278 reg = <0x10030000 0x100>;
280 interrupt-parent = <&intc>;
283 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
284 clock-names = "baud", "module";
289 uart1: serial@10031000 {
290 compatible = "ingenic,jz4780-uart";
291 reg = <0x10031000 0x100>;
293 interrupt-parent = <&intc>;
296 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
297 clock-names = "baud", "module";
302 uart2: serial@10032000 {
303 compatible = "ingenic,jz4780-uart";
304 reg = <0x10032000 0x100>;
306 interrupt-parent = <&intc>;
309 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
310 clock-names = "baud", "module";
315 uart3: serial@10033000 {
316 compatible = "ingenic,jz4780-uart";
317 reg = <0x10033000 0x100>;
319 interrupt-parent = <&intc>;
322 clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
323 clock-names = "baud", "module";
328 uart4: serial@10034000 {
329 compatible = "ingenic,jz4780-uart";
330 reg = <0x10034000 0x100>;
332 interrupt-parent = <&intc>;
335 clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
336 clock-names = "baud", "module";
342 compatible = "ingenic,jz4780-i2c";
343 #address-cells = <1>;
346 reg = <0x10050000 0x1000>;
348 interrupt-parent = <&intc>;
351 clocks = <&cgu JZ4780_CLK_SMB0>;
352 clock-frequency = <100000>;
353 pinctrl-names = "default";
354 pinctrl-0 = <&pins_i2c0_data>;
360 compatible = "ingenic,jz4780-i2c";
361 #address-cells = <1>;
363 reg = <0x10051000 0x1000>;
365 interrupt-parent = <&intc>;
368 clocks = <&cgu JZ4780_CLK_SMB1>;
369 clock-frequency = <100000>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&pins_i2c1_data>;
377 compatible = "ingenic,jz4780-i2c";
378 #address-cells = <1>;
380 reg = <0x10052000 0x1000>;
382 interrupt-parent = <&intc>;
385 clocks = <&cgu JZ4780_CLK_SMB2>;
386 clock-frequency = <100000>;
387 pinctrl-names = "default";
388 pinctrl-0 = <&pins_i2c2_data>;
394 compatible = "ingenic,jz4780-i2c";
395 #address-cells = <1>;
397 reg = <0x10053000 0x1000>;
399 interrupt-parent = <&intc>;
402 clocks = <&cgu JZ4780_CLK_SMB3>;
403 clock-frequency = <100000>;
404 pinctrl-names = "default";
405 pinctrl-0 = <&pins_i2c3_data>;
411 compatible = "ingenic,jz4780-i2c";
412 #address-cells = <1>;
414 reg = <0x10054000 0x1000>;
416 interrupt-parent = <&intc>;
419 clocks = <&cgu JZ4780_CLK_SMB4>;
420 clock-frequency = <100000>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&pins_i2c4_data>;
427 nemc: nemc@13410000 {
428 compatible = "ingenic,jz4780-nemc", "simple-mfd";
429 reg = <0x13410000 0x10000>;
430 #address-cells = <2>;
432 ranges = <0 0 0x13410000 0x10000>,
433 <1 0 0x1b000000 0x1000000>,
434 <2 0 0x1a000000 0x1000000>,
435 <3 0 0x19000000 0x1000000>,
436 <4 0 0x18000000 0x1000000>,
437 <5 0 0x17000000 0x1000000>,
438 <6 0 0x16000000 0x1000000>;
440 clocks = <&cgu JZ4780_CLK_NEMC>;
446 compatible = "ingenic,jz4780-efuse";
448 clocks = <&cgu JZ4780_CLK_AHB2>;
450 #address-cells = <1>;
453 eth0_addr: eth-mac-addr@0x22 {
460 compatible = "ingenic,jz4780-dma";
461 reg = <0x13420000 0x400>, <0x13421000 0x40>;
464 interrupt-parent = <&intc>;
467 clocks = <&cgu JZ4780_CLK_PDMA>;
471 compatible = "ingenic,jz4780-mmc";
472 reg = <0x13450000 0x1000>;
474 interrupt-parent = <&intc>;
477 clocks = <&cgu JZ4780_CLK_MSC0>;
483 dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
484 <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
485 dma-names = "rx", "tx";
491 compatible = "ingenic,jz4780-mmc";
492 reg = <0x13460000 0x1000>;
494 interrupt-parent = <&intc>;
497 clocks = <&cgu JZ4780_CLK_MSC1>;
503 dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
504 <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
505 dma-names = "rx", "tx";
511 compatible = "ingenic,jz4780-bch";
512 reg = <0x134d0000 0x10000>;
514 clocks = <&cgu JZ4780_CLK_BCH>;
520 compatible = "ingenic,jz4780-otg", "snps,dwc2";
521 reg = <0x13500000 0x40000>;
523 interrupt-parent = <&intc>;
526 clocks = <&cgu JZ4780_CLK_UHC>;
530 phy-names = "usb2-phy";
532 g-rx-fifo-size = <768>;
533 g-np-tx-fifo-size = <256>;
534 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;