WIP FPC-III support
[linux/fpc-iii.git] / arch / mips / boot / dts / qca / ar9331.dtsi
blob83b3c0ce135a98010d82b288da16a4fb6a1e8b98
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
4 / {
5         compatible = "qca,ar9331";
7         #address-cells = <1>;
8         #size-cells = <1>;
10         cpus {
11                 #address-cells = <1>;
12                 #size-cells = <0>;
14                 cpu@0 {
15                         device_type = "cpu";
16                         compatible = "mips,mips24Kc";
17                         clocks = <&pll ATH79_CLK_CPU>;
18                         reg = <0>;
19                 };
20         };
22         cpuintc: interrupt-controller {
23                 compatible = "qca,ar7100-cpu-intc";
25                 interrupt-controller;
26                 #interrupt-cells = <1>;
28                 qca,ddr-wb-channel-interrupts = <2>, <3>;
29                 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
30         };
32         ref: ref {
33                 compatible = "fixed-clock";
34                 #clock-cells = <0>;
35         };
37         ahb {
38                 compatible = "simple-bus";
39                 ranges;
41                 #address-cells = <1>;
42                 #size-cells = <1>;
44                 interrupt-parent = <&cpuintc>;
46                 apb {
47                         compatible = "simple-bus";
48                         ranges;
50                         #address-cells = <1>;
51                         #size-cells = <1>;
53                         interrupt-parent = <&miscintc>;
55                         ddr_ctrl: memory-controller@18000000 {
56                                 compatible = "qca,ar7240-ddr-controller";
57                                 reg = <0x18000000 0x100>;
59                                 #qca,ddr-wb-channel-cells = <1>;
60                         };
62                         uart: serial@18020000 {
63                                 compatible = "qca,ar9330-uart";
64                                 reg = <0x18020000 0x14>;
66                                 interrupts = <3>;
68                                 clocks = <&ref>;
69                                 clock-names = "uart";
71                                 status = "disabled";
72                         };
74                         gpio: gpio@18040000 {
75                                 compatible = "qca,ar7100-gpio";
76                                 reg = <0x18040000 0x34>;
77                                 interrupts = <2>;
79                                 ngpios = <30>;
81                                 gpio-controller;
82                                 #gpio-cells = <2>;
84                                 interrupt-controller;
85                                 #interrupt-cells = <2>;
87                                 status = "disabled";
88                         };
90                         pll: pll-controller@18050000 {
91                                 compatible = "qca,ar9330-pll";
92                                 reg = <0x18050000 0x100>;
94                                 clocks = <&ref>;
95                                 clock-names = "ref";
97                                 #clock-cells = <1>;
98                         };
100                         miscintc: interrupt-controller@18060010 {
101                                 compatible = "qca,ar7240-misc-intc";
102                                 reg = <0x18060010 0x8>;
104                                 interrupt-parent = <&cpuintc>;
105                                 interrupts = <6>;
107                                 interrupt-controller;
108                                 #interrupt-cells = <1>;
109                         };
111                         rst: reset-controller@1806001c {
112                                 compatible = "qca,ar7100-reset";
113                                 reg = <0x1806001c 0x4>;
115                                 #reset-cells = <1>;
116                         };
117                 };
119                 eth0: ethernet@19000000 {
120                         compatible = "qca,ar9330-eth";
121                         reg = <0x19000000 0x200>;
122                         interrupts = <4>;
124                         resets = <&rst 9>, <&rst 22>;
125                         reset-names = "mac", "mdio";
126                         clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
127                         clock-names = "eth", "mdio";
129                         phy-mode = "mii";
130                         phy-handle = <&phy_port4>;
132                         status = "disabled";
133                 };
135                 eth1: ethernet@1a000000 {
136                         compatible = "qca,ar9330-eth";
137                         reg = <0x1a000000 0x200>;
138                         interrupts = <5>;
139                         resets = <&rst 13>, <&rst 23>;
140                         reset-names = "mac", "mdio";
141                         clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
142                         clock-names = "eth", "mdio";
144                         phy-mode = "gmii";
146                         status = "disabled";
148                         fixed-link {
149                                 speed = <1000>;
150                                 full-duplex;
151                         };
153                         mdio {
154                                 #address-cells = <1>;
155                                 #size-cells = <0>;
157                                 switch10: switch@10 {
158                                         #address-cells = <1>;
159                                         #size-cells = <0>;
161                                         compatible = "qca,ar9331-switch";
162                                         reg = <0x10>;
163                                         resets = <&rst 8>;
164                                         reset-names = "switch";
166                                         interrupt-parent = <&miscintc>;
167                                         interrupts = <12>;
169                                         interrupt-controller;
170                                         #interrupt-cells = <1>;
172                                         ports {
173                                                 #address-cells = <1>;
174                                                 #size-cells = <0>;
176                                                 switch_port0: port@0 {
177                                                         reg = <0x0>;
178                                                         label = "cpu";
179                                                         ethernet = <&eth1>;
181                                                         phy-mode = "gmii";
183                                                         fixed-link {
184                                                                 speed = <1000>;
185                                                                 full-duplex;
186                                                         };
187                                                 };
189                                                 switch_port1: port@1 {
190                                                         reg = <0x1>;
191                                                         phy-handle = <&phy_port0>;
192                                                         phy-mode = "internal";
194                                                         status = "disabled";
195                                                 };
197                                                 switch_port2: port@2 {
198                                                         reg = <0x2>;
199                                                         phy-handle = <&phy_port1>;
200                                                         phy-mode = "internal";
202                                                         status = "disabled";
203                                                 };
205                                                 switch_port3: port@3 {
206                                                         reg = <0x3>;
207                                                         phy-handle = <&phy_port2>;
208                                                         phy-mode = "internal";
210                                                         status = "disabled";
211                                                 };
213                                                 switch_port4: port@4 {
214                                                         reg = <0x4>;
215                                                         phy-handle = <&phy_port3>;
216                                                         phy-mode = "internal";
218                                                         status = "disabled";
219                                                 };
220                                         };
222                                         mdio {
223                                                 #address-cells = <1>;
224                                                 #size-cells = <0>;
226                                                 interrupt-parent = <&switch10>;
228                                                 phy_port0: phy@0 {
229                                                         reg = <0x0>;
230                                                         interrupts = <0>;
231                                                         status = "disabled";
232                                                 };
234                                                 phy_port1: phy@1 {
235                                                         reg = <0x1>;
236                                                         interrupts = <0>;
237                                                         status = "disabled";
238                                                 };
240                                                 phy_port2: phy@2 {
241                                                         reg = <0x2>;
242                                                         interrupts = <0>;
243                                                         status = "disabled";
244                                                 };
246                                                 phy_port3: phy@3 {
247                                                         reg = <0x3>;
248                                                         interrupts = <0>;
249                                                         status = "disabled";
250                                                 };
252                                                 phy_port4: phy@4 {
253                                                         reg = <0x4>;
254                                                         interrupts = <0>;
255                                                         status = "disabled";
256                                                 };
257                                         };
258                                 };
259                         };
260                 };
262                 usb: usb@1b000100 {
263                         compatible = "chipidea,usb2";
264                         reg = <0x1b000000 0x200>;
266                         interrupts = <3>;
267                         resets = <&rst 5>;
269                         phy-names = "usb-phy";
270                         phys = <&usb_phy>;
272                         status = "disabled";
273                 };
275                 spi: spi@1f000000 {
276                         compatible = "qca,ar7100-spi";
277                         reg = <0x1f000000 0x10>;
279                         clocks = <&pll ATH79_CLK_AHB>;
280                         clock-names = "ahb";
282                         #address-cells = <1>;
283                         #size-cells = <0>;
285                         status = "disabled";
286                 };
287         };
289         usb_phy: usb-phy {
290                 compatible = "qca,ar7100-usb-phy";
292                 reset-names = "phy", "suspend-override";
293                 resets = <&rst 4>, <&rst 3>;
295                 #phy-cells = <0>;
297                 status = "disabled";
298         };