arch/mips/include/asm/pgtable-64.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
   7  * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
   8  */
   9 #ifndef _ASM_PGTABLE_64_H
  10 #define _ASM_PGTABLE_64_H
  11
  12 #include <linux/compiler.h>
  13 #include <linux/linkage.h>
  14
  15 #include <asm/addrspace.h>
  16 #include <asm/page.h>
  17 #include <asm/cachectl.h>
  18 #include <asm/fixmap.h>
  19
  20 #if CONFIG_PGTABLE_LEVELS == 2
  21 #include <asm-generic/pgtable-nopmd.h>
  22 #elif CONFIG_PGTABLE_LEVELS == 3
  23 #include <asm-generic/pgtable-nopud.h>
  24 #else
  25 #include <asm-generic/pgtable-nop4d.h>
  26 #endif
  27
  28 /*
  29  * Each address space has 2 4K pages as its page directory, giving 1024
  30  * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
  31  * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
  32  * tables. Each page table is also a single 4K page, giving 512 (==
  33  * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
  34  * invalid_pmd_table, each pmd entry is initialized to point to
  35  * invalid_pte_table, each pte is initialized to 0.
  36  *
  37  * Kernel mappings: kernel mappings are held in the swapper_pg_table.
  38  * The layout is identical to userspace except it's indexed with the
  39  * fault address - VMALLOC_START.
  40  */
  41
  42
  43 /* PGDIR_SHIFT determines what a third-level page table entry can map */
  44 #ifdef __PAGETABLE_PMD_FOLDED
  45 #define PGDIR_SHIFT     (PAGE_SHIFT + PAGE_SHIFT + PTE_ORDER - 3)
  46 #else
  47
  48 /* PMD_SHIFT determines the size of the area a second-level page table can map */
  49 #define PMD_SHIFT       (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
  50 #define PMD_SIZE        (1UL << PMD_SHIFT)
  51 #define PMD_MASK        (~(PMD_SIZE-1))
  52
  53 # ifdef __PAGETABLE_PUD_FOLDED
  54 # define PGDIR_SHIFT    (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
  55 # endif
  56 #endif
  57
  58 #ifndef __PAGETABLE_PUD_FOLDED
  59 #define PUD_SHIFT       (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
  60 #define PUD_SIZE        (1UL << PUD_SHIFT)
  61 #define PUD_MASK        (~(PUD_SIZE-1))
  62 #define PGDIR_SHIFT     (PUD_SHIFT + (PAGE_SHIFT + PUD_ORDER - 3))
  63 #endif
  64
  65 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  66 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  67
  68 /*
  69  * For 4kB page size we use a 3 level page tree and an 8kB pud, which
  70  * permits us mapping 40 bits of virtual address space.
  71  *
  72  * We used to implement 41 bits by having an order 1 pmd level but that seemed
  73  * rather pointless.
  74  *
  75  * For 8kB page size we use a 3 level page tree which permits a total of
  76  * 8TB of address space.  Alternatively a 33-bit / 8GB organization using
  77  * two levels would be easy to implement.
  78  *
  79  * For 16kB page size we use a 2 level page tree which permits a total of
  80  * 36 bits of virtual address space.  We could add a third level but it seems
  81  * like at the moment there's no need for this.
  82  *
  83  * For 64kB page size we use a 2 level page table tree for a total of 42 bits
  84  * of virtual address space.
  85  */
  86 #ifdef CONFIG_PAGE_SIZE_4KB
  87 # ifdef CONFIG_MIPS_VA_BITS_48
  88 #  define PGD_ORDER             0
  89 #  define PUD_ORDER             0
  90 # else
  91 #  define PGD_ORDER             1
  92 #  define PUD_ORDER             aieeee_attempt_to_allocate_pud
  93 # endif
  94 #define PMD_ORDER               0
  95 #define PTE_ORDER               0
  96 #endif
  97 #ifdef CONFIG_PAGE_SIZE_8KB
  98 #define PGD_ORDER               0
  99 #define PUD_ORDER               aieeee_attempt_to_allocate_pud
 100 #define PMD_ORDER               0
 101 #define PTE_ORDER               0
 102 #endif
 103 #ifdef CONFIG_PAGE_SIZE_16KB
 104 #ifdef CONFIG_MIPS_VA_BITS_48
 105 #define PGD_ORDER               1
 106 #else
 107 #define PGD_ORDER               0
 108 #endif
 109 #define PUD_ORDER               aieeee_attempt_to_allocate_pud
 110 #define PMD_ORDER               0
 111 #define PTE_ORDER               0
 112 #endif
 113 #ifdef CONFIG_PAGE_SIZE_32KB
 114 #define PGD_ORDER               0
 115 #define PUD_ORDER               aieeee_attempt_to_allocate_pud
 116 #define PMD_ORDER               0
 117 #define PTE_ORDER               0
 118 #endif
 119 #ifdef CONFIG_PAGE_SIZE_64KB
 120 #define PGD_ORDER               0
 121 #define PUD_ORDER               aieeee_attempt_to_allocate_pud
 122 #ifdef CONFIG_MIPS_VA_BITS_48
 123 #define PMD_ORDER               0
 124 #else
 125 #define PMD_ORDER               aieeee_attempt_to_allocate_pmd
 126 #endif
 127 #define PTE_ORDER               0
 128 #endif
 129
 130 #define PTRS_PER_PGD    ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
 131 #ifndef __PAGETABLE_PUD_FOLDED
 132 #define PTRS_PER_PUD    ((PAGE_SIZE << PUD_ORDER) / sizeof(pud_t))
 133 #endif
 134 #ifndef __PAGETABLE_PMD_FOLDED
 135 #define PTRS_PER_PMD    ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
 136 #endif
 137 #define PTRS_PER_PTE    ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
 138
 139 #define USER_PTRS_PER_PGD       ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)
 140 #define FIRST_USER_ADDRESS      0UL
 141
 142 /*
 143  * TLB refill handlers also map the vmalloc area into xuseg.  Avoid
 144  * the first couple of pages so NULL pointer dereferences will still
 145  * reliably trap.
 146  */
 147 #define VMALLOC_START           (MAP_BASE + (2 * PAGE_SIZE))
 148 #define VMALLOC_END     \
 149         (MAP_BASE + \
 150          min(PTRS_PER_PGD * PTRS_PER_PUD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
 151              (1UL << cpu_vmbits)) - (1UL << 32))
 152
 153 #if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
 154         VMALLOC_START != CKSSEG
 155 /* Load modules into 32bit-compatible segment. */
 156 #define MODULE_START    CKSSEG
 157 #define MODULE_END      (FIXADDR_START-2*PAGE_SIZE)
 158 #endif
 159
 160 #define pte_ERROR(e) \
 161         printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
 162 #ifndef __PAGETABLE_PMD_FOLDED
 163 #define pmd_ERROR(e) \
 164         printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
 165 #endif
 166 #ifndef __PAGETABLE_PUD_FOLDED
 167 #define pud_ERROR(e) \
 168         printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e))
 169 #endif
 170 #define pgd_ERROR(e) \
 171         printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
 172
 173 extern pte_t invalid_pte_table[PTRS_PER_PTE];
 174
 175 #ifndef __PAGETABLE_PUD_FOLDED
 176 /*
 177  * For 4-level pagetables we defines these ourselves, for 3-level the
 178  * definitions are below, for 2-level the
 179  * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
 180  */
 181 typedef struct { unsigned long pud; } pud_t;
 182 #define pud_val(x)      ((x).pud)
 183 #define __pud(x)        ((pud_t) { (x) })
 184
 185 extern pud_t invalid_pud_table[PTRS_PER_PUD];
 186
 187 /*
 188  * Empty pgd entries point to the invalid_pud_table.
 189  */
 190 static inline int p4d_none(p4d_t p4d)
 191 {
 192         return p4d_val(p4d) == (unsigned long)invalid_pud_table;
 193 }
 194
 195 static inline int p4d_bad(p4d_t p4d)
 196 {
 197         if (unlikely(p4d_val(p4d) & ~PAGE_MASK))
 198                 return 1;
 199
 200         return 0;
 201 }
 202
 203 static inline int p4d_present(p4d_t p4d)
 204 {
 205         return p4d_val(p4d) != (unsigned long)invalid_pud_table;
 206 }
 207
 208 static inline void p4d_clear(p4d_t *p4dp)
 209 {
 210         p4d_val(*p4dp) = (unsigned long)invalid_pud_table;
 211 }
 212
 213 static inline unsigned long p4d_page_vaddr(p4d_t p4d)
 214 {
 215         return p4d_val(p4d);
 216 }
 217
 218 #define p4d_phys(p4d)           virt_to_phys((void *)p4d_val(p4d))
 219 #define p4d_page(p4d)           (pfn_to_page(p4d_phys(p4d) >> PAGE_SHIFT))
 220
 221 #define p4d_index(address)      (((address) >> P4D_SHIFT) & (PTRS_PER_P4D - 1))
 222
 223 static inline void set_p4d(p4d_t *p4d, p4d_t p4dval)
 224 {
 225         *p4d = p4dval;
 226 }
 227
 228 #endif
 229
 230 #ifndef __PAGETABLE_PMD_FOLDED
 231 /*
 232  * For 3-level pagetables we defines these ourselves, for 2-level the
 233  * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
 234  */
 235 typedef struct { unsigned long pmd; } pmd_t;
 236 #define pmd_val(x)      ((x).pmd)
 237 #define __pmd(x)        ((pmd_t) { (x) } )
 238
 239
 240 extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
 241 #endif
 242
 243 /*
 244  * Empty pgd/pmd entries point to the invalid_pte_table.
 245  */
 246 static inline int pmd_none(pmd_t pmd)
 247 {
 248         return pmd_val(pmd) == (unsigned long) invalid_pte_table;
 249 }
 250
 251 static inline int pmd_bad(pmd_t pmd)
 252 {
 253 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
 254         /* pmd_huge(pmd) but inline */
 255         if (unlikely(pmd_val(pmd) & _PAGE_HUGE))
 256                 return 0;
 257 #endif
 258
 259         if (unlikely(pmd_val(pmd) & ~PAGE_MASK))
 260                 return 1;
 261
 262         return 0;
 263 }
 264
 265 static inline int pmd_present(pmd_t pmd)
 266 {
 267 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
 268         if (unlikely(pmd_val(pmd) & _PAGE_HUGE))
 269                 return pmd_val(pmd) & _PAGE_PRESENT;
 270 #endif
 271
 272         return pmd_val(pmd) != (unsigned long) invalid_pte_table;
 273 }
 274
 275 static inline void pmd_clear(pmd_t *pmdp)
 276 {
 277         pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
 278 }
 279 #ifndef __PAGETABLE_PMD_FOLDED
 280
 281 /*
 282  * Empty pud entries point to the invalid_pmd_table.
 283  */
 284 static inline int pud_none(pud_t pud)
 285 {
 286         return pud_val(pud) == (unsigned long) invalid_pmd_table;
 287 }
 288
 289 static inline int pud_bad(pud_t pud)
 290 {
 291         return pud_val(pud) & ~PAGE_MASK;
 292 }
 293
 294 static inline int pud_present(pud_t pud)
 295 {
 296         return pud_val(pud) != (unsigned long) invalid_pmd_table;
 297 }
 298
 299 static inline void pud_clear(pud_t *pudp)
 300 {
 301         pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
 302 }
 303 #endif
 304
 305 #define pte_page(x)             pfn_to_page(pte_pfn(x))
 306
 307 #ifdef CONFIG_CPU_VR41XX
 308 #define pte_pfn(x)              ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
 309 #define pfn_pte(pfn, prot)      __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
 310 #else
 311 #define pte_pfn(x)              ((unsigned long)((x).pte >> _PFN_SHIFT))
 312 #define pfn_pte(pfn, prot)      __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
 313 #define pfn_pmd(pfn, prot)      __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
 314 #endif
 315
 316 #ifndef __PAGETABLE_PMD_FOLDED
 317 static inline unsigned long pud_page_vaddr(pud_t pud)
 318 {
 319         return pud_val(pud);
 320 }
 321 #define pud_phys(pud)           virt_to_phys((void *)pud_val(pud))
 322 #define pud_page(pud)           (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
 323
 324 #endif
 325
 326 /*
 327  * Initialize a new pgd / pmd table with invalid pointers.
 328  */
 329 extern void pgd_init(unsigned long page);
 330 extern void pud_init(unsigned long page, unsigned long pagetable);
 331 extern void pmd_init(unsigned long page, unsigned long pagetable);
 332
 333 /*
 334  * Non-present pages:  high 40 bits are offset, next 8 bits type,
 335  * low 16 bits zero.
 336  */
 337 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
 338 { pte_t pte; pte_val(pte) = (type << 16) | (offset << 24); return pte; }
 339
 340 #define __swp_type(x)           (((x).val >> 16) & 0xff)
 341 #define __swp_offset(x)         ((x).val >> 24)
 342 #define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) })
 343 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 344 #define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
 345
 346 #endif /* _ASM_PGTABLE_64_H */