arch/mips/include/asm/sibyte/sb1250_defs.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*  *********************************************************************
   3     *  SB1250 Board Support Package
   4     *
   5     *  Global constants and macros              File: sb1250_defs.h
   6     *
   7     *  This file contains macros and definitions used by the other
   8     *  include files.
   9     *
  10     *  SB1250 specification level:  User's manual 1/02/02
  11     *
  12     *********************************************************************
  13     *
  14     *  Copyright 2000,2001,2002,2003
  15     *  Broadcom Corporation. All rights reserved.
  16     *
  17     ********************************************************************* */
  18
  19 #ifndef _SB1250_DEFS_H
  20 #define _SB1250_DEFS_H
  21
  22 /*
  23  * These headers require ANSI C89 string concatenation, and GCC or other
  24  * 'long long' (64-bit integer) support.
  25  */
  26 #if !defined(__STDC__) && !defined(_MSC_VER)
  27 #error SiByte headers require ANSI C89 support
  28 #endif
  29
  30
  31 /*  *********************************************************************
  32     *  Macros for feature tests, used to enable include file features
  33     *  for chip features only present in certain chip revisions.
  34     *
  35     *  SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
  36     *  which is to be exposed by the headers.  If undefined, it defaults to
  37     *  "all features."
  38     *
  39     *  Use like:
  40     *
  41     *    #define SIBYTE_HDR_FEATURES    SIBYTE_HDR_FMASK_112x_PASS1
  42     *
  43     *           Generate defines only for that revision of chip.
  44     *
  45     *    #if SIBYTE_HDR_FEATURE(chip,pass)
  46     *
  47     *           True if header features for that revision or later of
  48     *           that particular chip type are enabled in SIBYTE_HDR_FEATURES.
  49     *           (Use this to bracket #defines for features present in a given
  50     *           revision and later.)
  51     *
  52     *           Note that there is no implied ordering between chip types.
  53     *
  54     *           Note also that 'chip' and 'pass' must textually exactly
  55     *           match the defines below.  So, for example,
  56     *           SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
  57     *           SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
  58     *
  59     *    #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
  60     *
  61     *           Same as SIBYTE_HDR_FEATURE, but true for the named revision
  62     *           and earlier revisions of the named chip type.
  63     *
  64     *    #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
  65     *
  66     *           Same as SIBYTE_HDR_FEATURE, but only true for the named
  67     *           revision of the named chip type.  (Note that this CANNOT
  68     *           be used to verify that you're compiling only for that
  69     *           particular chip/revision.  It will be true any time this
  70     *           chip/revision is included in SIBYTE_HDR_FEATURES.)
  71     *
  72     *    #if SIBYTE_HDR_FEATURE_CHIP(chip)
  73     *
  74     *           True if header features for (any revision of) that chip type
  75     *           are enabled in SIBYTE_HDR_FEATURES.  (Use this to bracket
  76     *           #defines for features specific to a given chip type.)
  77     *
  78     *  Mask values currently include room for additional revisions of each
  79     *  chip type, but can be renumbered at will.  Note that they MUST fit
  80     *  into 31 bits and may not include C type constructs, for safe use in
  81     *  CPP conditionals.  Bit positions within chip types DO indicate
  82     *  ordering, so be careful when adding support for new minor revs.
  83     ********************************************************************* */
  84
  85 #define SIBYTE_HDR_FMASK_1250_ALL               0x000000ff
  86 #define SIBYTE_HDR_FMASK_1250_PASS1             0x00000001
  87 #define SIBYTE_HDR_FMASK_1250_PASS2             0x00000002
  88 #define SIBYTE_HDR_FMASK_1250_PASS3             0x00000004
  89
  90 #define SIBYTE_HDR_FMASK_112x_ALL               0x00000f00
  91 #define SIBYTE_HDR_FMASK_112x_PASS1             0x00000100
  92
  93 #define SIBYTE_HDR_FMASK_1480_ALL               0x0000f000
  94 #define SIBYTE_HDR_FMASK_1480_PASS1             0x00001000
  95 #define SIBYTE_HDR_FMASK_1480_PASS2             0x00002000
  96
  97 /* Bit mask for chip/revision.  (use _ALL for all revisions of a chip).  */
  98 #define SIBYTE_HDR_FMASK(chip, pass)                                    \
  99     (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
 100 #define SIBYTE_HDR_FMASK_ALLREVS(chip)                                  \
 101     (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
 102
 103 /* Default constant value for all chips, all revisions */
 104 #define SIBYTE_HDR_FMASK_ALL                                            \
 105     (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL              \
 106      | SIBYTE_HDR_FMASK_1480_ALL)
 107
 108 /* This one is used for the "original" BCM1250/BCM112x chips.  We use this
 109    to weed out constants and macros that do not exist on later chips like
 110    the BCM1480  */
 111 #define SIBYTE_HDR_FMASK_1250_112x_ALL                                  \
 112     (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
 113 #define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL
 114
 115 #ifndef SIBYTE_HDR_FEATURES
 116 #define SIBYTE_HDR_FEATURES                     SIBYTE_HDR_FMASK_ALL
 117 #endif
 118
 119
 120 /* Bit mask for revisions of chip exclusively before the named revision.  */
 121 #define SIBYTE_HDR_FMASK_BEFORE(chip, pass)                             \
 122     ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
 123
 124 /* Bit mask for revisions of chip exclusively after the named revision.  */
 125 #define SIBYTE_HDR_FMASK_AFTER(chip, pass)                              \
 126     (~(SIBYTE_HDR_FMASK(chip, pass)                                     \
 127      | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
 128
 129
 130 /* True if header features enabled for (any revision of) that chip type.  */
 131 #define SIBYTE_HDR_FEATURE_CHIP(chip)                                   \
 132     (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
 133
 134 /* True for all versions of the BCM1250 and BCM1125, but not true for
 135    anything else */
 136 #define SIBYTE_HDR_FEATURE_1250_112x \
 137       (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
 138 /*    (!!  (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */
 139
 140 /* True if header features enabled for that rev or later, inclusive.  */
 141 #define SIBYTE_HDR_FEATURE(chip, pass)                                  \
 142     (!! ((SIBYTE_HDR_FMASK(chip, pass)                                  \
 143           | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
 144
 145 /* True if header features enabled for exactly that rev.  */
 146 #define SIBYTE_HDR_FEATURE_EXACT(chip, pass)                            \
 147     (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
 148
 149 /* True if header features enabled for that rev or before, inclusive.  */
 150 #define SIBYTE_HDR_FEATURE_UP_TO(chip, pass)                            \
 151     (!! ((SIBYTE_HDR_FMASK(chip, pass)                                  \
 152          | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
 153
 154
 155 /*  *********************************************************************
 156     *  Naming schemes for constants in these files:
 157     *
 158     *  M_xxx           MASK constant (identifies bits in a register).
 159     *                  For multi-bit fields, all bits in the field will
 160     *                  be set.
 161     *
 162     *  K_xxx           "Code" constant (value for data in a multi-bit
 163     *                  field).  The value is right justified.
 164     *
 165     *  V_xxx           "Value" constant.  This is the same as the
 166     *                  corresponding "K_xxx" constant, except it is
 167     *                  shifted to the correct position in the register.
 168     *
 169     *  S_xxx           SHIFT constant.  This is the number of bits that
 170     *                  a field value (code) needs to be shifted
 171     *                  (towards the left) to put the value in the right
 172     *                  position for the register.
 173     *
 174     *  A_xxx           ADDRESS constant.  This will be a physical
 175     *                  address.  Use the PHYS_TO_K1 macro to generate
 176     *                  a K1SEG address.
 177     *
 178     *  R_xxx           RELATIVE offset constant.  This is an offset from
 179     *                  an A_xxx constant (usually the first register in
 180     *                  a group).
 181     *
 182     *  G_xxx(X)        GET value.  This macro obtains a multi-bit field
 183     *                  from a register, masks it, and shifts it to
 184     *                  the bottom of the register (retrieving a K_xxx
 185     *                  value, for example).
 186     *
 187     *  V_xxx(X)        VALUE.  This macro computes the value of a
 188     *                  K_xxx constant shifted to the correct position
 189     *                  in the register.
 190     ********************************************************************* */
 191
 192
 193
 194
 195 /*
 196  * Cast to 64-bit number.  Presumably the syntax is different in
 197  * assembly language.
 198  *
 199  * Note: you'll need to define uint32_t and uint64_t in your headers.
 200  */
 201
 202 #if !defined(__ASSEMBLY__)
 203 #define _SB_MAKE64(x) ((uint64_t)(x))
 204 #define _SB_MAKE32(x) ((uint32_t)(x))
 205 #else
 206 #define _SB_MAKE64(x) (x)
 207 #define _SB_MAKE32(x) (x)
 208 #endif
 209
 210
 211 /*
 212  * Make a mask for 1 bit at position 'n'
 213  */
 214
 215 #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
 216 #define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
 217
 218 /*
 219  * Make a mask for 'v' bits at position 'n'
 220  */
 221
 222 #define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
 223 #define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
 224
 225 /*
 226  * Make a value at 'v' at bit position 'n'
 227  */
 228
 229 #define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n))
 230 #define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n))
 231
 232 #define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
 233 #define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
 234
 235 /*
 236  * Macros to read/write on-chip registers
 237  * XXX should we do the PHYS_TO_K1 here?
 238  */
 239
 240
 241 #if defined(__mips64) && !defined(__ASSEMBLY__)
 242 #define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
 243 #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
 244 #endif /* __ASSEMBLY__ */
 245
 246 #endif