2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2007 by Ralf Baechle
8 #include <linux/clocksource.h>
9 #include <linux/cpufreq.h>
10 #include <linux/init.h>
11 #include <linux/sched_clock.h>
15 static u64
c0_hpt_read(struct clocksource
*cs
)
17 return read_c0_count();
20 static struct clocksource clocksource_mips
= {
23 .mask
= CLOCKSOURCE_MASK(32),
24 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
27 static u64 __maybe_unused notrace
r4k_read_sched_clock(void)
29 return read_c0_count();
32 static inline unsigned int rdhwr_count(void)
46 static bool rdhwr_count_usable(void)
48 unsigned int prev
, curr
, i
;
51 * Older QEMUs have a broken implementation of RDHWR for the CP0 count
52 * which always returns a constant value. Try to identify this and don't
53 * use it in the VDSO if it is broken. This workaround can be removed
54 * once the fix has been in QEMU stable for a reasonable amount of time.
56 for (i
= 0, prev
= rdhwr_count(); i
< 100; i
++) {
65 pr_warn("Not using R4K clocksource in VDSO due to broken RDHWR\n");
69 #ifdef CONFIG_CPU_FREQ
71 static bool __read_mostly r4k_clock_unstable
;
73 static void r4k_clocksource_unstable(char *reason
)
75 if (r4k_clock_unstable
)
78 r4k_clock_unstable
= true;
80 pr_info("R4K timer is unstable due to %s\n", reason
);
82 clocksource_mark_unstable(&clocksource_mips
);
85 static int r4k_cpufreq_callback(struct notifier_block
*nb
,
86 unsigned long val
, void *data
)
88 if (val
== CPUFREQ_POSTCHANGE
)
89 r4k_clocksource_unstable("CPU frequency change");
94 static struct notifier_block r4k_cpufreq_notifier
= {
95 .notifier_call
= r4k_cpufreq_callback
,
98 static int __init
r4k_register_cpufreq_notifier(void)
100 return cpufreq_register_notifier(&r4k_cpufreq_notifier
,
101 CPUFREQ_TRANSITION_NOTIFIER
);
104 core_initcall(r4k_register_cpufreq_notifier
);
106 #endif /* !CONFIG_CPU_FREQ */
108 int __init
init_r4k_clocksource(void)
110 if (!cpu_has_counter
|| !mips_hpt_frequency
)
113 /* Calculate a somewhat reasonable rating value */
114 clocksource_mips
.rating
= 200 + mips_hpt_frequency
/ 10000000;
117 * R2 onwards makes the count accessible to user mode so it can be used
118 * by the VDSO (HWREna is configured by configure_hwrena()).
120 if (cpu_has_mips_r2_r6
&& rdhwr_count_usable())
121 clocksource_mips
.vdso_clock_mode
= VDSO_CLOCKMODE_R4K
;
123 clocksource_register_hz(&clocksource_mips
, mips_hpt_frequency
);
125 #ifndef CONFIG_CPU_FREQ
126 sched_clock_register(r4k_read_sched_clock
, 32, mips_hpt_frequency
);