1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
12 * @(#) pa/spmath/dfcmp.c $Revision: 1.1 $
15 * dbl_cmp: compare two values
17 * External Interfaces:
18 * dbl_fcmp(leftptr, rightptr, cond, status)
20 * Internal Interfaces:
23 * <<please update with a overview of the operation of this file>>
31 #include "dbl_float.h"
34 * dbl_cmp: compare two values
37 dbl_fcmp (dbl_floating_point
* leftptr
, dbl_floating_point
* rightptr
,
38 unsigned int cond
, unsigned int *status
)
40 /* The predicate to be tested */
43 register unsigned int leftp1
, leftp2
, rightp1
, rightp2
;
44 register int xorresult
;
46 /* Create local copies of the numbers */
47 Dbl_copyfromptr(leftptr
,leftp1
,leftp2
);
48 Dbl_copyfromptr(rightptr
,rightp1
,rightp2
);
52 if( (Dbl_exponent(leftp1
) == DBL_INFINITY_EXPONENT
)
53 || (Dbl_exponent(rightp1
) == DBL_INFINITY_EXPONENT
) )
55 /* Check if a NaN is involved. Signal an invalid exception when
56 * comparing a signaling NaN or when comparing quiet NaNs and the
57 * low bit of the condition is set */
58 if( ((Dbl_exponent(leftp1
) == DBL_INFINITY_EXPONENT
)
59 && Dbl_isnotzero_mantissa(leftp1
,leftp2
)
60 && (Exception(cond
) || Dbl_isone_signaling(leftp1
)))
62 ((Dbl_exponent(rightp1
) == DBL_INFINITY_EXPONENT
)
63 && Dbl_isnotzero_mantissa(rightp1
,rightp2
)
64 && (Exception(cond
) || Dbl_isone_signaling(rightp1
))) )
66 if( Is_invalidtrap_enabled() ) {
67 Set_status_cbit(Unordered(cond
));
68 return(INVALIDEXCEPTION
);
70 else Set_invalidflag();
71 Set_status_cbit(Unordered(cond
));
74 /* All the exceptional conditions are handled, now special case
76 else if( ((Dbl_exponent(leftp1
) == DBL_INFINITY_EXPONENT
)
77 && Dbl_isnotzero_mantissa(leftp1
,leftp2
))
79 ((Dbl_exponent(rightp1
) == DBL_INFINITY_EXPONENT
)
80 && Dbl_isnotzero_mantissa(rightp1
,rightp2
)) )
82 /* NaNs always compare unordered. */
83 Set_status_cbit(Unordered(cond
));
86 /* infinities will drop down to the normal compare mechanisms */
88 /* First compare for unequal signs => less or greater or
89 * special equal case */
90 Dbl_xortointp1(leftp1
,rightp1
,xorresult
);
93 /* left negative => less, left positive => greater.
94 * equal is possible if both operands are zeros. */
95 if( Dbl_iszero_exponentmantissa(leftp1
,leftp2
)
96 && Dbl_iszero_exponentmantissa(rightp1
,rightp2
) )
98 Set_status_cbit(Equal(cond
));
100 else if( Dbl_isone_sign(leftp1
) )
102 Set_status_cbit(Lessthan(cond
));
106 Set_status_cbit(Greaterthan(cond
));
109 /* Signs are the same. Treat negative numbers separately
110 * from the positives because of the reversed sense. */
111 else if(Dbl_isequal(leftp1
,leftp2
,rightp1
,rightp2
))
113 Set_status_cbit(Equal(cond
));
115 else if( Dbl_iszero_sign(leftp1
) )
117 /* Positive compare */
118 if( Dbl_allp1(leftp1
) < Dbl_allp1(rightp1
) )
120 Set_status_cbit(Lessthan(cond
));
122 else if( Dbl_allp1(leftp1
) > Dbl_allp1(rightp1
) )
124 Set_status_cbit(Greaterthan(cond
));
128 /* Equal first parts. Now we must use unsigned compares to
129 * resolve the two possibilities. */
130 if( Dbl_allp2(leftp2
) < Dbl_allp2(rightp2
) )
132 Set_status_cbit(Lessthan(cond
));
136 Set_status_cbit(Greaterthan(cond
));
142 /* Negative compare. Signed or unsigned compares
143 * both work the same. That distinction is only
144 * important when the sign bits differ. */
145 if( Dbl_allp1(leftp1
) > Dbl_allp1(rightp1
) )
147 Set_status_cbit(Lessthan(cond
));
149 else if( Dbl_allp1(leftp1
) < Dbl_allp1(rightp1
) )
151 Set_status_cbit(Greaterthan(cond
));
155 /* Equal first parts. Now we must use unsigned compares to
156 * resolve the two possibilities. */
157 if( Dbl_allp2(leftp2
) > Dbl_allp2(rightp2
) )
159 Set_status_cbit(Lessthan(cond
));
163 Set_status_cbit(Greaterthan(cond
));