WIP FPC-III support
[linux/fpc-iii.git] / arch / powerpc / boot / dts / digsy_mtc.dts
blob0e5e9d3acf79fd684d4b87f795550fc36312120d
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Digsy MTC board Device Tree Source
4  *
5  * Copyright (C) 2009 Semihalf
6  *
7  * Based on the CM5200 by M. Balakowicz
8  */
10 /include/ "mpc5200b.dtsi"
12 &gpt0 { gpio-controller; fsl,has-wdt; };
13 &gpt1 { gpio-controller; };
15 / {
16         model = "intercontrol,digsy-mtc";
17         compatible = "intercontrol,digsy-mtc";
19         memory {
20                 reg = <0x00000000 0x02000000>;  // 32MB
21         };
23         soc5200@f0000000 {
24                 rtc@800 {
25                         status = "disabled";
26                 };
28                 spi@f00 {
29                         msp430@0 {
30                                 compatible = "spidev";
31                                 spi-max-frequency = <32000>;
32                                 reg = <0>;
33                         };
34                 };
36                 psc@2000 {              // PSC1
37                         status = "disabled";
38                 };
40                 psc@2200 {              // PSC2
41                         status = "disabled";
42                 };
44                 psc@2400 {              // PSC3
45                         status = "disabled";
46                 };
48                 psc@2600 {              // PSC4
49                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
50                 };
52                 psc@2800 {              // PSC5
53                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
54                 };
56                 psc@2c00 {              // PSC6
57                         status = "disabled";
58                 };
60                 ethernet@3000 {
61                         phy-handle = <&phy0>;
62                 };
64                 mdio@3000 {
65                         phy0: ethernet-phy@0 {
66                                 reg = <0>;
67                         };
68                 };
70                 i2c@3d00 {
71                         eeprom@50 {
72                                 compatible = "atmel,24c08";
73                                 reg = <0x50>;
74                         };
76                         rtc@56 {
77                                 compatible = "microcrystal,rv3029";
78                                 reg = <0x56>;
79                         };
81                         rtc@68 {
82                                 compatible = "dallas,ds1339";
83                                 reg = <0x68>;
84                         };
85                 };
87                 i2c@3d40 {
88                         status = "disabled";
89                 };
90         };
92         pci@f0000d00 {
93                 interrupt-map-mask = <0xf800 0 0 7>;
94                 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
95                                  0xc000 0 0 2 &mpc5200_pic 0 0 3
96                                  0xc000 0 0 3 &mpc5200_pic 0 0 3
97                                  0xc000 0 0 4 &mpc5200_pic 0 0 3>;
98                 clock-frequency = <0>; // From boot loader
99                 interrupts = <2 8 0 2 9 0 2 10 0>;
100                 bus-range = <0 0>;
101                 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
102                           0x02000000 0 0x90000000 0x90000000 0 0x10000000
103                           0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
104         };
106         localbus {
107                 ranges = <0 0 0xff000000 0x1000000
108                           4 0 0x60000000 0x0001000>;
110                 // 16-bit flash device at LocalPlus Bus CS0
111                 flash@0,0 {
112                         compatible = "cfi-flash";
113                         reg = <0 0 0x1000000>;
114                         bank-width = <2>;
115                         device-width = <2>;
116                         #size-cells = <1>;
117                         #address-cells = <1>;
119                         partition@0 {
120                                 label = "kernel";
121                                 reg = <0x0 0x00200000>;
122                         };
123                         partition@200000 {
124                                 label = "root";
125                                 reg = <0x00200000 0x00300000>;
126                         };
127                         partition@500000 {
128                                 label = "user";
129                                 reg = <0x00500000 0x00a00000>;
130                         };
131                         partition@f00000 {
132                                 label = "u-boot";
133                                 reg = <0x00f00000 0x100000>;
134                         };
135                 };
137                 can@4,0 {
138                         compatible = "nxp,sja1000";
139                         reg = <4 0x000 0x80>;
140                         nxp,external-clock-frequency = <24000000>;
141                         interrupts = <1 2 3>; // Level-low
142                 };
144                 can@4,100 {
145                         compatible = "nxp,sja1000";
146                         reg = <4 0x100 0x80>;
147                         nxp,external-clock-frequency = <24000000>;
148                         interrupts = <1 2 3>;  // Level-low
149                 };
151                 serial@4,200 {
152                         compatible = "nxp,sc28l92";
153                         reg = <4 0x200 0x10>;
154                         interrupts = <1 3 3>;
155                 };
156         };