2 * Device Tree Source for IBM Ebony
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
20 compatible = "ibm,ebony";
21 dcr-parent = <&{/cpus/cpu@0}>;
36 model = "PowerPC,440GP";
38 clock-frequency = <0>; // Filled in by zImage
39 timebase-frequency = <0>; // Filled in by zImage
40 i-cache-line-size = <32>;
41 d-cache-line-size = <32>;
42 i-cache-size = <32768>; /* 32 kB */
43 d-cache-size = <32768>; /* 32 kB */
45 dcr-access-method = "native";
50 device_type = "memory";
51 reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
54 UIC0: interrupt-controller0 {
55 compatible = "ibm,uic-440gp", "ibm,uic";
58 dcr-reg = <0x0c0 0x009>;
61 #interrupt-cells = <2>;
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-440gp", "ibm,uic";
69 dcr-reg = <0x0d0 0x009>;
72 #interrupt-cells = <2>;
73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
74 interrupt-parent = <&UIC0>;
78 compatible = "ibm,cpc-440gp";
79 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
80 // FIXME: anything else?
84 compatible = "ibm,plb-440gp", "ibm,plb4";
88 clock-frequency = <0>; // Filled in by zImage
90 SDRAM0: memory-controller {
91 compatible = "ibm,sdram-440gp";
92 dcr-reg = <0x010 0x002>;
93 // FIXME: anything else?
97 compatible = "ibm,sram-440gp";
98 dcr-reg = <0x020 0x008 0x00a 0x001>;
103 compatible = "ibm,dma-440gp";
104 dcr-reg = <0x100 0x027>;
108 compatible = "ibm,mcmal-440gp", "ibm,mcmal";
109 dcr-reg = <0x180 0x062>;
112 interrupt-parent = <&MAL0>;
113 interrupts = <0x0 0x1 0x2 0x3 0x4>;
114 #interrupt-cells = <1>;
115 #address-cells = <0>;
117 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
118 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
119 /*SERR*/ 0x2 &UIC1 0x0 0x4
120 /*TXDE*/ 0x3 &UIC1 0x1 0x4
121 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
122 interrupt-map-mask = <0xffffffff>;
126 compatible = "ibm,opb-440gp", "ibm,opb";
127 #address-cells = <1>;
129 /* Wish there was a nicer way of specifying a full 32-bit
131 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
132 0x80000000 0x00000001 0x80000000 0x80000000>;
133 dcr-reg = <0x090 0x00b>;
134 interrupt-parent = <&UIC1>;
135 interrupts = <0x7 0x4>;
136 clock-frequency = <0>; // Filled in by zImage
139 compatible = "ibm,ebc-440gp", "ibm,ebc";
140 dcr-reg = <0x012 0x002>;
141 #address-cells = <2>;
143 clock-frequency = <0>; // Filled in by zImage
144 // ranges property is supplied by zImage
145 // based on firmware's configuration of the
147 interrupts = <0x5 0x4>;
148 interrupt-parent = <&UIC1>;
150 small-flash@0,80000 {
151 compatible = "jedec-flash";
153 reg = <0x00000000 0x00080000 0x00080000>;
154 #address-cells = <1>;
158 reg = <0x00000000 0x00080000>;
165 compatible = "ds1743-nvram";
167 reg = <0x00000001 0x00000000 0x00002000>;
171 compatible = "jedec-flash";
173 reg = <0x00000002 0x00000000 0x00400000>;
174 #address-cells = <1>;
178 reg = <0x00000000 0x00380000>;
182 reg = <0x00380000 0x00080000>;
187 reg = <0x00000003 0x00000000 0x00000010>;
191 compatible = "Ebony-FPGA";
192 reg = <0x00000007 0x00000000 0x00000010>;
193 virtual-reg = <0xe8300000>;
197 UART0: serial@40000200 {
198 device_type = "serial";
199 compatible = "ns16550";
200 reg = <0x40000200 0x00000008>;
201 virtual-reg = <0xe0000200>;
202 clock-frequency = <11059200>;
203 current-speed = <9600>;
204 interrupt-parent = <&UIC0>;
205 interrupts = <0x0 0x4>;
208 UART1: serial@40000300 {
209 device_type = "serial";
210 compatible = "ns16550";
211 reg = <0x40000300 0x00000008>;
212 virtual-reg = <0xe0000300>;
213 clock-frequency = <11059200>;
214 current-speed = <9600>;
215 interrupt-parent = <&UIC0>;
216 interrupts = <0x1 0x4>;
221 compatible = "ibm,iic-440gp", "ibm,iic";
222 reg = <0x40000400 0x00000014>;
223 interrupt-parent = <&UIC0>;
224 interrupts = <0x2 0x4>;
228 compatible = "ibm,iic-440gp", "ibm,iic";
229 reg = <0x40000500 0x00000014>;
230 interrupt-parent = <&UIC0>;
231 interrupts = <0x3 0x4>;
234 GPIO0: gpio@40000700 {
236 compatible = "ibm,gpio-440gp";
237 reg = <0x40000700 0x00000020>;
240 ZMII0: emac-zmii@40000780 {
241 compatible = "ibm,zmii-440gp", "ibm,zmii";
242 reg = <0x40000780 0x0000000c>;
245 EMAC0: ethernet@40000800 {
246 device_type = "network";
247 compatible = "ibm,emac-440gp", "ibm,emac";
248 interrupt-parent = <&UIC1>;
249 interrupts = <0x1c 0x4 0x1d 0x4>;
250 reg = <0x40000800 0x00000070>;
251 local-mac-address = [000000000000]; // Filled in by zImage
252 mal-device = <&MAL0>;
253 mal-tx-channel = <0 1>;
254 mal-rx-channel = <0>;
256 max-frame-size = <1500>;
257 rx-fifo-size = <4096>;
258 tx-fifo-size = <2048>;
260 phy-map = <0x00000001>;
261 zmii-device = <&ZMII0>;
264 EMAC1: ethernet@40000900 {
265 device_type = "network";
266 compatible = "ibm,emac-440gp", "ibm,emac";
267 interrupt-parent = <&UIC1>;
268 interrupts = <0x1e 0x4 0x1f 0x4>;
269 reg = <0x40000900 0x00000070>;
270 local-mac-address = [000000000000]; // Filled in by zImage
271 mal-device = <&MAL0>;
272 mal-tx-channel = <2 3>;
273 mal-rx-channel = <1>;
275 max-frame-size = <1500>;
276 rx-fifo-size = <4096>;
277 tx-fifo-size = <2048>;
279 phy-map = <0x00000001>;
280 zmii-device = <&ZMII0>;
287 reg = <0x40000a00 0x000000d4>;
288 interrupt-parent = <&UIC0>;
289 interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
294 PCIX0: pci@20ec00000 {
296 #interrupt-cells = <1>;
298 #address-cells = <3>;
299 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
301 reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */
302 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
303 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
304 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */
305 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */
307 /* Outbound ranges, one memory and one IO,
308 * later cannot be changed
310 ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
311 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
313 /* Inbound 2GB range starting at 0 */
314 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
316 /* Ebony has all 4 IRQ pins tied together per slot */
317 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
320 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8
323 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8
326 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8
329 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8
335 stdout-path = "/plb/opb/serial@40000200";