2 * Device Tree Source for ESTeem 195E Hotfoot
4 * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com>
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
16 model = "est,hotfoot";
17 compatible = "est,hotfoot";
18 dcr-parent = <&{/cpus/cpu@0}>;
33 model = "PowerPC,405EP";
35 clock-frequency = <0>; /* Filled in by zImage */
36 timebase-frequency = <0>; /* Filled in by zImage */
37 i-cache-line-size = <0x20>;
38 d-cache-line-size = <0x20>;
39 i-cache-size = <0x4000>;
40 d-cache-size = <0x4000>;
42 dcr-access-method = "native";
47 device_type = "memory";
48 reg = <0x00000000 0x00000000>; /* Filled in by zImage */
51 UIC0: interrupt-controller {
52 compatible = "ibm,uic";
55 dcr-reg = <0x0c0 0x009>;
58 #interrupt-cells = <2>;
62 compatible = "ibm,plb3";
66 clock-frequency = <0>; /* Filled in by zImage */
68 SDRAM0: memory-controller {
69 compatible = "ibm,sdram-405ep";
70 dcr-reg = <0x010 0x002>;
74 compatible = "ibm,mcmal-405ep", "ibm,mcmal";
75 dcr-reg = <0x180 0x062>;
78 interrupt-parent = <&UIC0>;
88 compatible = "ibm,opb-405ep", "ibm,opb";
91 ranges = <0xef600000 0xef600000 0x00a00000>;
92 dcr-reg = <0x0a0 0x005>;
93 clock-frequency = <0>; /* Filled in by zImage */
95 /* Hotfoot has UART0/UART1 swapped */
97 UART0: serial@ef600400 {
98 device_type = "serial";
99 compatible = "ns16550";
100 reg = <0xef600400 0x00000008>;
101 virtual-reg = <0xef600400>;
102 clock-frequency = <0>; /* Filled in by zImage */
103 current-speed = <0x9600>;
104 interrupt-parent = <&UIC0>;
105 interrupts = <0x1 0x4>;
108 UART1: serial@ef600300 {
109 device_type = "serial";
110 compatible = "ns16550";
111 reg = <0xef600300 0x00000008>;
112 virtual-reg = <0xef600300>;
113 clock-frequency = <0>; /* Filled in by zImage */
114 current-speed = <0x9600>;
115 interrupt-parent = <&UIC0>;
116 interrupts = <0x0 0x4>;
120 #address-cells = <1>;
122 compatible = "ibm,iic-405ep", "ibm,iic";
123 reg = <0xef600500 0x00000011>;
124 interrupt-parent = <&UIC0>;
125 interrupts = <0x2 0x4>;
128 /* Actually a DS1339 */
129 compatible = "dallas,ds1307";
134 /* Not present on all boards */
135 compatible = "national,lm75";
140 GPIO: gpio@ef600700 {
142 compatible = "ibm,ppc4xx-gpio";
143 reg = <0xef600700 0x00000020>;
148 compatible = "gpio-leds";
155 gpios = <&GPIO 0xe 0>;
159 EMAC0: ethernet@ef600800 {
160 linux,network-index = <0x0>;
161 device_type = "network";
162 compatible = "ibm,emac-405ep", "ibm,emac";
163 interrupt-parent = <&UIC0>;
165 0xf 0x4 /* Ethernet */
166 0x9 0x4 /* Ethernet Wake Up */>;
167 local-mac-address = [000000000000]; /* Filled in by zImage */
168 reg = <0xef600800 0x00000070>;
170 mal-tx-channel = <0>;
171 mal-rx-channel = <0>;
173 max-frame-size = <0x5dc>;
174 rx-fifo-size = <0x1000>;
175 tx-fifo-size = <0x800>;
177 phy-map = <0x00000000>;
180 EMAC1: ethernet@ef600900 {
181 linux,network-index = <0x1>;
182 device_type = "network";
183 compatible = "ibm,emac-405ep", "ibm,emac";
184 interrupt-parent = <&UIC0>;
186 0x11 0x4 /* Ethernet */
187 0x9 0x4 /* Ethernet Wake Up */>;
188 local-mac-address = [000000000000]; /* Filled in by zImage */
189 reg = <0xef600900 0x00000070>;
191 mal-tx-channel = <2>;
192 mal-rx-channel = <1>;
194 max-frame-size = <0x5dc>;
195 rx-fifo-size = <0x1000>;
196 tx-fifo-size = <0x800>;
197 mdio-device = <&EMAC0>;
199 phy-map = <0x0000001>;
204 compatible = "ibm,ebc-405ep", "ibm,ebc";
205 dcr-reg = <0x012 0x002>;
206 #address-cells = <2>;
209 /* The ranges property is supplied by the bootwrapper
210 * and is based on the firmware's configuration of the
213 clock-frequency = <0>; /* Filled in by zImage */
216 compatible = "cfi-flash";
218 reg = <0x0 0xff800000 0x00800000>;
219 #address-cells = <1>;
222 /* This mapping is for the 8M flash
223 4M flash has all ofssets -= 4M,
224 and FeatFS partition is not present */
226 label = "Bootloader";
227 reg = <0x7c0000 0x40000>;
231 label = "Env_and_Config_Primary";
232 reg = <0x400000 0x10000>;
236 reg = <0x420000 0x100000>;
239 label = "Filesystem";
240 reg = <0x520000 0x2a0000>;
243 label = "Env_and_Config_Secondary";
244 reg = <0x410000 0x10000>;
248 reg = <0x000000 0x400000>;
251 label = "Bootloader_Env";
252 reg = <0x7d0000 0x10000>;
259 #interrupt-cells = <1>;
261 #address-cells = <3>;
262 compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
264 reg = <0xeec00000 0x00000008 /* Config space access */
265 0xeed80000 0x00000004 /* IACK */
266 0xeed80000 0x00000004 /* Special cycle */
267 0xef480000 0x00000040>; /* Internal registers */
269 /* Outbound ranges, one memory and one IO,
270 * later cannot be changed. Chip supports a second
271 * IO range but we don't use it for now
273 ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
274 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
276 /* Inbound 2GB range starting at 0 */
277 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
279 interrupt-parent = <&UIC0>;
280 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
282 /* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */
283 0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8
284 0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8
286 /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */
287 0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8
288 0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8
294 stdout-path = &UART0;