arch/powerpc/boot/dts/lite5200b.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Lite5200B board Device Tree Source
   4  *
   5  * Copyright 2006-2007 Secret Lab Technologies Ltd.
   6  * Grant Likely <grant.likely@secretlab.ca>
   7  */
   8
   9 /include/ "mpc5200b.dtsi"
  10
  11 &gpt0 { fsl,has-wdt; };
  12 &gpt2 { gpio-controller; };
  13 &gpt3 { gpio-controller; };
  14
  15 / {
  16         model = "fsl,lite5200b";
  17         compatible = "fsl,lite5200b";
  18
  19         leds {
  20                 compatible = "gpio-leds";
  21                 tmr2 {
  22                         gpios = <&gpt2 0 1>;
  23                 };
  24                 tmr3 {
  25                         gpios = <&gpt3 0 1>;
  26                         linux,default-trigger = "heartbeat";
  27                 };
  28                 led1 { gpios = <&gpio_wkup 2 1>; };
  29                 led2 { gpios = <&gpio_simple 3 1>; };
  30                 led3 { gpios = <&gpio_wkup 3 1>; };
  31                 led4 { gpios = <&gpio_simple 2 1>; };
  32         };
  33
  34         memory {
  35                 reg = <0x00000000 0x10000000>;  // 256MB
  36         };
  37
  38         soc5200@f0000000 {
  39                 psc@2000 {              // PSC1
  40                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  41                         cell-index = <0>;
  42                 };
  43
  44                 psc@2200 {              // PSC2
  45                         status = "disabled";
  46                 };
  47
  48                 psc@2400 {              // PSC3
  49                         status = "disabled";
  50                 };
  51
  52                 psc@2600 {              // PSC4
  53                         status = "disabled";
  54                 };
  55
  56                 psc@2800 {              // PSC5
  57                         status = "disabled";
  58                 };
  59
  60                 psc@2c00 {              // PSC6
  61                         status = "disabled";
  62                 };
  63
  64                 // PSC2 in ac97 mode example
  65                 //ac97@2200 {           // PSC2
  66                 //      compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
  67                 //      cell-index = <1>;
  68                 //};
  69
  70                 // PSC3 in CODEC mode example
  71                 //i2s@2400 {            // PSC3
  72                 //      compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
  73                 //      cell-index = <2>;
  74                 //};
  75
  76                 // PSC6 in spi mode example
  77                 //spi@2c00 {            // PSC6
  78                 //      compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
  79                 //      cell-index = <5>;
  80                 //};
  81
  82                 ethernet@3000 {
  83                         phy-handle = <&phy0>;
  84                 };
  85
  86                 mdio@3000 {
  87                         phy0: ethernet-phy@0 {
  88                                 reg = <0>;
  89                         };
  90                 };
  91
  92                 i2c@3d40 {
  93                         eeprom@50 {
  94                                 compatible = "atmel,24c02";
  95                                 reg = <0x50>;
  96                         };
  97                 };
  98
  99                 sram@8000 {
 100                         compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
 101                         reg = <0x8000 0x4000>;
 102                 };
 103         };
 104
 105         pci@f0000d00 {
 106                 interrupt-map-mask = <0xf800 0 0 7>;
 107                 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
 108                                  0xc000 0 0 2 &mpc5200_pic 1 1 3
 109                                  0xc000 0 0 3 &mpc5200_pic 1 2 3
 110                                  0xc000 0 0 4 &mpc5200_pic 1 3 3
 111
 112                                  0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
 113                                  0xc800 0 0 2 &mpc5200_pic 1 2 3
 114                                  0xc800 0 0 3 &mpc5200_pic 1 3 3
 115                                  0xc800 0 0 4 &mpc5200_pic 0 0 3>;
 116                 clock-frequency = <0>; // From boot loader
 117                 interrupts = <2 8 0 2 9 0 2 10 0>;
 118                 bus-range = <0 0>;
 119                 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
 120                           0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
 121                           0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
 122         };
 123
 124         localbus {
 125                 ranges = <0 0 0xfe000000 0x02000000>;
 126
 127                 flash@0,0 {
 128                         compatible = "cfi-flash";
 129                         reg = <0 0 0x02000000>;
 130                         bank-width = <1>;
 131                         #size-cells = <1>;
 132                         #address-cells = <1>;
 133
 134                         partition@0 {
 135                                 label = "kernel";
 136                                 reg = <0x00000000 0x00200000>;
 137                         };
 138                         partition@200000 {
 139                                 label = "rootfs";
 140                                 reg = <0x00200000 0x01d00000>;
 141                         };
 142                         partition@1f00000 {
 143                                 label = "u-boot";
 144                                 reg = <0x01f00000 0x00060000>;
 145                         };
 146                         partition@1f60000 {
 147                                 label = "u-boot-env";
 148                                 reg = <0x01f60000 0x00020000>;
 149                         };
 150                         partition@1f80000 {
 151                                 label = "dtb";
 152                                 reg = <0x01f80000 0x00080000>;
 153                         };
 154                 };
 155         };
 156
 157 };