arch/powerpc/boot/dts/mpc8308rdb.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * MPC8308RDB Device Tree Source
   4  *
   5  * Copyright 2009 Freescale Semiconductor Inc.
   6  * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
   7  */
   8
   9 /dts-v1/;
  10
  11 / {
  12         compatible = "fsl,mpc8308rdb";
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15
  16         aliases {
  17                 ethernet0 = &enet0;
  18                 ethernet1 = &enet1;
  19                 serial0 = &serial0;
  20                 serial1 = &serial1;
  21                 pci0 = &pci0;
  22         };
  23
  24         cpus {
  25                 #address-cells = <1>;
  26                 #size-cells = <0>;
  27
  28                 PowerPC,8308@0 {
  29                         device_type = "cpu";
  30                         reg = <0x0>;
  31                         d-cache-line-size = <32>;
  32                         i-cache-line-size = <32>;
  33                         d-cache-size = <16384>;
  34                         i-cache-size = <16384>;
  35                         timebase-frequency = <0>;       // from bootloader
  36                         bus-frequency = <0>;            // from bootloader
  37                         clock-frequency = <0>;          // from bootloader
  38                 };
  39         };
  40
  41         memory {
  42                 device_type = "memory";
  43                 reg = <0x00000000 0x08000000>;  // 128MB at 0
  44         };
  45
  46         localbus@e0005000 {
  47                 #address-cells = <2>;
  48                 #size-cells = <1>;
  49                 compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
  50                 reg = <0xe0005000 0x1000>;
  51                 interrupts = <77 0x8>;
  52                 interrupt-parent = <&ipic>;
  53
  54                 // CS0 and CS1 are swapped when
  55                 // booting from nand, but the
  56                 // addresses are the same.
  57                 ranges = <0x0 0x0 0xfe000000 0x00800000
  58                           0x1 0x0 0xe0600000 0x00002000
  59                           0x2 0x0 0xf0000000 0x00020000
  60                           0x3 0x0 0xfa000000 0x00008000>;
  61
  62                 flash@0,0 {
  63                         #address-cells = <1>;
  64                         #size-cells = <1>;
  65                         compatible = "cfi-flash";
  66                         reg = <0x0 0x0 0x800000>;
  67                         bank-width = <2>;
  68                         device-width = <1>;
  69
  70                         u-boot@0 {
  71                                 reg = <0x0 0x60000>;
  72                                 read-only;
  73                         };
  74                         env@60000 {
  75                                 reg = <0x60000 0x10000>;
  76                         };
  77                         env1@70000 {
  78                                 reg = <0x70000 0x10000>;
  79                         };
  80                         kernel@80000 {
  81                                 reg = <0x80000 0x200000>;
  82                         };
  83                         dtb@280000 {
  84                                 reg = <0x280000 0x10000>;
  85                         };
  86                         ramdisk@290000 {
  87                                 reg = <0x290000 0x570000>;
  88                         };
  89                 };
  90
  91                 nand@1,0 {
  92                         #address-cells = <1>;
  93                         #size-cells = <1>;
  94                         compatible = "fsl,mpc8315-fcm-nand",
  95                                      "fsl,elbc-fcm-nand";
  96                         reg = <0x1 0x0 0x2000>;
  97
  98                         jffs2@0 {
  99                                 reg = <0x0 0x2000000>;
 100                         };
 101                 };
 102         };
 103
 104         immr@e0000000 {
 105                 #address-cells = <1>;
 106                 #size-cells = <1>;
 107                 device_type = "soc";
 108                 compatible = "fsl,mpc8308-immr", "simple-bus";
 109                 ranges = <0 0xe0000000 0x00100000>;
 110                 reg = <0xe0000000 0x00000200>;
 111                 bus-frequency = <0>;
 112
 113                 i2c@3000 {
 114                         #address-cells = <1>;
 115                         #size-cells = <0>;
 116                         cell-index = <0>;
 117                         compatible = "fsl-i2c";
 118                         reg = <0x3000 0x100>;
 119                         interrupts = <14 0x8>;
 120                         interrupt-parent = <&ipic>;
 121                         dfsrr;
 122                         rtc@68 {
 123                                 compatible = "dallas,ds1339";
 124                                 reg = <0x68>;
 125                         };
 126                 };
 127
 128                 usb@23000 {
 129                         compatible = "fsl-usb2-dr";
 130                         reg = <0x23000 0x1000>;
 131                         #address-cells = <1>;
 132                         #size-cells = <0>;
 133                         interrupt-parent = <&ipic>;
 134                         interrupts = <38 0x8>;
 135                         dr_mode = "peripheral";
 136                         phy_type = "ulpi";
 137                 };
 138
 139                 enet0: ethernet@24000 {
 140                         #address-cells = <1>;
 141                         #size-cells = <1>;
 142                         ranges = <0x0 0x24000 0x1000>;
 143
 144                         cell-index = <0>;
 145                         device_type = "network";
 146                         model = "eTSEC";
 147                         compatible = "gianfar";
 148                         reg = <0x24000 0x1000>;
 149                         local-mac-address = [ 00 00 00 00 00 00 ];
 150                         interrupts = <32 0x8 33 0x8 34 0x8>;
 151                         interrupt-parent = <&ipic>;
 152                         tbi-handle = < &tbi0 >;
 153                         phy-handle = < &phy2 >;
 154                         fsl,magic-packet;
 155
 156                         mdio@520 {
 157                                 #address-cells = <1>;
 158                                 #size-cells = <0>;
 159                                 compatible = "fsl,gianfar-mdio";
 160                                 reg = <0x520 0x20>;
 161                                 phy2: ethernet-phy@2 {
 162                                         interrupt-parent = <&ipic>;
 163                                         interrupts = <17 0x8>;
 164                                         reg = <0x2>;
 165                                 };
 166                                 tbi0: tbi-phy@11 {
 167                                         reg = <0x11>;
 168                                         device_type = "tbi-phy";
 169                                 };
 170                         };
 171                 };
 172
 173                 enet1: ethernet@25000 {
 174                         #address-cells = <1>;
 175                         #size-cells = <1>;
 176                         cell-index = <1>;
 177                         device_type = "network";
 178                         model = "eTSEC";
 179                         compatible = "gianfar";
 180                         reg = <0x25000 0x1000>;
 181                         ranges = <0x0 0x25000 0x1000>;
 182                         local-mac-address = [ 00 00 00 00 00 00 ];
 183                         interrupts = <35 0x8 36 0x8 37 0x8>;
 184                         interrupt-parent = <&ipic>;
 185                         tbi-handle = < &tbi1 >;
 186                         /* Vitesse 7385 isn't on the MDIO bus */
 187                         fixed-link = <1 1 1000 0 0>;
 188                         fsl,magic-packet;
 189
 190                         mdio@520 {
 191                                 #address-cells = <1>;
 192                                 #size-cells = <0>;
 193                                 compatible = "fsl,gianfar-tbi";
 194                                 reg = <0x520 0x20>;
 195
 196                                 tbi1: tbi-phy@11 {
 197                                         reg = <0x11>;
 198                                         device_type = "tbi-phy";
 199                                 };
 200                         };
 201                 };
 202
 203                 serial0: serial@4500 {
 204                         cell-index = <0>;
 205                         device_type = "serial";
 206                         compatible = "fsl,ns16550", "ns16550";
 207                         reg = <0x4500 0x100>;
 208                         clock-frequency = <133333333>;
 209                         interrupts = <9 0x8>;
 210                         interrupt-parent = <&ipic>;
 211                 };
 212
 213                 serial1: serial@4600 {
 214                         cell-index = <1>;
 215                         device_type = "serial";
 216                         compatible = "fsl,ns16550", "ns16550";
 217                         reg = <0x4600 0x100>;
 218                         clock-frequency = <133333333>;
 219                         interrupts = <10 0x8>;
 220                         interrupt-parent = <&ipic>;
 221                 };
 222
 223                 gpio@c00 {
 224                         #gpio-cells = <2>;
 225                         device_type = "gpio";
 226                         compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
 227                         reg = <0xc00 0x18>;
 228                         interrupts = <74 0x8>;
 229                         interrupt-parent = <&ipic>;
 230                         gpio-controller;
 231                 };
 232
 233                 /* IPIC
 234                  * interrupts cell = <intr #, sense>
 235                  * sense values match linux IORESOURCE_IRQ_* defines:
 236                  * sense == 8: Level, low assertion
 237                  * sense == 2: Edge, high-to-low change
 238                  */
 239                 ipic: interrupt-controller@700 {
 240                         compatible = "fsl,ipic";
 241                         interrupt-controller;
 242                         #address-cells = <0>;
 243                         #interrupt-cells = <2>;
 244                         reg = <0x700 0x100>;
 245                         device_type = "ipic";
 246                 };
 247
 248                 ipic-msi@7c0 {
 249                         compatible = "fsl,ipic-msi";
 250                         reg = <0x7c0 0x40>;
 251                         msi-available-ranges = <0x0 0x100>;
 252                         interrupts = < 0x43 0x8
 253                                         0x4  0x8
 254                                         0x51 0x8
 255                                         0x52 0x8
 256                                         0x56 0x8
 257                                         0x57 0x8
 258                                         0x58 0x8
 259                                         0x59 0x8 >;
 260                         interrupt-parent = < &ipic >;
 261                 };
 262
 263                 dma@2c000 {
 264                         compatible = "fsl,mpc8308-dma";
 265                         reg = <0x2c000 0x1800>;
 266                         interrupts = <3 0x8
 267                                         94 0x8>;
 268                         interrupt-parent = < &ipic >;
 269                 };
 270
 271         };
 272
 273         pci0: pcie@e0009000 {
 274                 #address-cells = <3>;
 275                 #size-cells = <2>;
 276                 #interrupt-cells = <1>;
 277                 device_type = "pci";
 278                 compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
 279                 reg = <0xe0009000 0x00001000
 280                         0xb0000000 0x01000000>;
 281                 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
 282                           0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
 283                 bus-range = <0 0>;
 284                 interrupt-map-mask = <0xf800 0 0 7>;
 285                 interrupt-map = <0 0 0 1 &ipic 1 8
 286                                  0 0 0 2 &ipic 1 8
 287                                  0 0 0 3 &ipic 1 8
 288                                  0 0 0 4 &ipic 1 8>;
 289                 interrupts = <0x1 0x8>;
 290                 interrupt-parent = <&ipic>;
 291                 clock-frequency = <0>;
 292
 293                 pcie@0 {
 294                         #address-cells = <3>;
 295                         #size-cells = <2>;
 296                         device_type = "pci";
 297                         reg = <0 0 0 0 0>;
 298                         ranges = <0x02000000 0 0xa0000000
 299                                   0x02000000 0 0xa0000000
 300                                   0 0x10000000
 301                                   0x01000000 0 0x00000000
 302                                   0x01000000 0 0x00000000
 303                                   0 0x00800000>;
 304                 };
 305         };
 306 };