arch/powerpc/include/asm/mmu.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_POWERPC_MMU_H_
   3 #define _ASM_POWERPC_MMU_H_
   4 #ifdef __KERNEL__
   5
   6 #include <linux/types.h>
   7
   8 #include <asm/asm-const.h>
   9
  10 /*
  11  * MMU features bit definitions
  12  */
  13
  14 /*
  15  * MMU families
  16  */
  17 #define MMU_FTR_HPTE_TABLE              ASM_CONST(0x00000001)
  18 #define MMU_FTR_TYPE_8xx                ASM_CONST(0x00000002)
  19 #define MMU_FTR_TYPE_40x                ASM_CONST(0x00000004)
  20 #define MMU_FTR_TYPE_44x                ASM_CONST(0x00000008)
  21 #define MMU_FTR_TYPE_FSL_E              ASM_CONST(0x00000010)
  22 #define MMU_FTR_TYPE_47x                ASM_CONST(0x00000020)
  23
  24 /* Radix page table supported and enabled */
  25 #define MMU_FTR_TYPE_RADIX              ASM_CONST(0x00000040)
  26
  27 /*
  28  * Individual features below.
  29  */
  30
  31 /*
  32  * Supports KUAP feature
  33  * key 0 controlling userspace addresses on radix
  34  * Key 3 on hash
  35  */
  36 #define MMU_FTR_BOOK3S_KUAP             ASM_CONST(0x00000200)
  37
  38 /*
  39  * Supports KUEP feature
  40  * key 0 controlling userspace addresses on radix
  41  * Key 3 on hash
  42  */
  43 #define MMU_FTR_BOOK3S_KUEP             ASM_CONST(0x00000400)
  44
  45 /*
  46  * Support for memory protection keys.
  47  */
  48 #define MMU_FTR_PKEY                    ASM_CONST(0x00000800)
  49
  50 /* Guest Translation Shootdown Enable */
  51 #define MMU_FTR_GTSE                    ASM_CONST(0x00001000)
  52
  53 /*
  54  * Support for 68 bit VA space. We added that from ISA 2.05
  55  */
  56 #define MMU_FTR_68_BIT_VA               ASM_CONST(0x00002000)
  57 /*
  58  * Kernel read only support.
  59  * We added the ppp value 0b110 in ISA 2.04.
  60  */
  61 #define MMU_FTR_KERNEL_RO               ASM_CONST(0x00004000)
  62
  63 /*
  64  * We need to clear top 16bits of va (from the remaining 64 bits )in
  65  * tlbie* instructions
  66  */
  67 #define MMU_FTR_TLBIE_CROP_VA           ASM_CONST(0x00008000)
  68
  69 /* Enable use of high BAT registers */
  70 #define MMU_FTR_USE_HIGH_BATS           ASM_CONST(0x00010000)
  71
  72 /* Enable >32-bit physical addresses on 32-bit processor, only used
  73  * by CONFIG_PPC_BOOK3S_32 currently as BookE supports that from day 1
  74  */
  75 #define MMU_FTR_BIG_PHYS                ASM_CONST(0x00020000)
  76
  77 /* Enable use of broadcast TLB invalidations. We don't always set it
  78  * on processors that support it due to other constraints with the
  79  * use of such invalidations
  80  */
  81 #define MMU_FTR_USE_TLBIVAX_BCAST       ASM_CONST(0x00040000)
  82
  83 /* Enable use of tlbilx invalidate instructions.
  84  */
  85 #define MMU_FTR_USE_TLBILX              ASM_CONST(0x00080000)
  86
  87 /* This indicates that the processor cannot handle multiple outstanding
  88  * broadcast tlbivax or tlbsync. This makes the code use a spinlock
  89  * around such invalidate forms.
  90  */
  91 #define MMU_FTR_LOCK_BCAST_INVAL        ASM_CONST(0x00100000)
  92
  93 /* This indicates that the processor doesn't handle way selection
  94  * properly and needs SW to track and update the LRU state.  This
  95  * is specific to an errata on e300c2/c3/c4 class parts
  96  */
  97 #define MMU_FTR_NEED_DTLB_SW_LRU        ASM_CONST(0x00200000)
  98
  99 /* Enable use of TLB reservation.  Processor should support tlbsrx.
 100  * instruction and MAS0[WQ].
 101  */
 102 #define MMU_FTR_USE_TLBRSRV             ASM_CONST(0x00800000)
 103
 104 /* Use paired MAS registers (MAS7||MAS3, etc.)
 105  */
 106 #define MMU_FTR_USE_PAIRED_MAS          ASM_CONST(0x01000000)
 107
 108 /* Doesn't support the B bit (1T segment) in SLBIE
 109  */
 110 #define MMU_FTR_NO_SLBIE_B              ASM_CONST(0x02000000)
 111
 112 /* Support 16M large pages
 113  */
 114 #define MMU_FTR_16M_PAGE                ASM_CONST(0x04000000)
 115
 116 /* Supports TLBIEL variant
 117  */
 118 #define MMU_FTR_TLBIEL                  ASM_CONST(0x08000000)
 119
 120 /* Supports tlbies w/o locking
 121  */
 122 #define MMU_FTR_LOCKLESS_TLBIE          ASM_CONST(0x10000000)
 123
 124 /* Large pages can be marked CI
 125  */
 126 #define MMU_FTR_CI_LARGE_PAGE           ASM_CONST(0x20000000)
 127
 128 /* 1T segments available
 129  */
 130 #define MMU_FTR_1T_SEGMENT              ASM_CONST(0x40000000)
 131
 132 /* MMU feature bit sets for various CPUs */
 133 #define MMU_FTRS_DEFAULT_HPTE_ARCH_V2   (MMU_FTR_HPTE_TABLE | MMU_FTR_TLBIEL | MMU_FTR_16M_PAGE)
 134 #define MMU_FTRS_POWER          MMU_FTRS_DEFAULT_HPTE_ARCH_V2
 135 #define MMU_FTRS_PPC970         MMU_FTRS_POWER | MMU_FTR_TLBIE_CROP_VA
 136 #define MMU_FTRS_POWER5         MMU_FTRS_POWER | MMU_FTR_LOCKLESS_TLBIE
 137 #define MMU_FTRS_POWER6         MMU_FTRS_POWER5 | MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA
 138 #define MMU_FTRS_POWER7         MMU_FTRS_POWER6
 139 #define MMU_FTRS_POWER8         MMU_FTRS_POWER6
 140 #define MMU_FTRS_POWER9         MMU_FTRS_POWER6
 141 #define MMU_FTRS_POWER10        MMU_FTRS_POWER6
 142 #define MMU_FTRS_CELL           MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
 143                                 MMU_FTR_CI_LARGE_PAGE
 144 #define MMU_FTRS_PA6T           MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
 145                                 MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B
 146 #ifndef __ASSEMBLY__
 147 #include <linux/bug.h>
 148 #include <asm/cputable.h>
 149 #include <asm/page.h>
 150
 151 typedef pte_t *pgtable_t;
 152
 153 #ifdef CONFIG_PPC_FSL_BOOK3E
 154 #include <asm/percpu.h>
 155 DECLARE_PER_CPU(int, next_tlbcam_idx);
 156 #endif
 157
 158 enum {
 159         MMU_FTRS_POSSIBLE =
 160 #if defined(CONFIG_PPC_BOOK3S_64) || defined(CONFIG_PPC_BOOK3S_604)
 161                 MMU_FTR_HPTE_TABLE |
 162 #endif
 163 #ifdef CONFIG_PPC_8xx
 164                 MMU_FTR_TYPE_8xx |
 165 #endif
 166 #ifdef CONFIG_40x
 167                 MMU_FTR_TYPE_40x |
 168 #endif
 169 #ifdef CONFIG_PPC_47x
 170                 MMU_FTR_TYPE_47x | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL |
 171 #elif defined(CONFIG_44x)
 172                 MMU_FTR_TYPE_44x |
 173 #endif
 174 #ifdef CONFIG_E500
 175                 MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX |
 176 #endif
 177 #ifdef CONFIG_PPC_BOOK3S_32
 178                 MMU_FTR_USE_HIGH_BATS |
 179 #endif
 180 #ifdef CONFIG_PPC_83xx
 181                 MMU_FTR_NEED_DTLB_SW_LRU |
 182 #endif
 183 #ifdef CONFIG_PPC_BOOK3E_64
 184                 MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
 185 #endif
 186 #ifdef CONFIG_PPC_BOOK3S_64
 187                 MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
 188                 MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
 189                 MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA |
 190                 MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA |
 191 #endif
 192 #ifdef CONFIG_PPC_RADIX_MMU
 193                 MMU_FTR_TYPE_RADIX |
 194                 MMU_FTR_GTSE |
 195 #endif /* CONFIG_PPC_RADIX_MMU */
 196 #ifdef CONFIG_PPC_KUAP
 197         MMU_FTR_BOOK3S_KUAP |
 198 #endif /* CONFIG_PPC_KUAP */
 199 #ifdef CONFIG_PPC_MEM_KEYS
 200         MMU_FTR_PKEY |
 201 #endif
 202 #ifdef CONFIG_PPC_KUEP
 203         MMU_FTR_BOOK3S_KUEP |
 204 #endif /* CONFIG_PPC_KUAP */
 205
 206                 0,
 207 };
 208
 209 #if defined(CONFIG_PPC_BOOK3S_604) && !defined(CONFIG_PPC_BOOK3S_603)
 210 #define MMU_FTRS_ALWAYS         MMU_FTR_HPTE_TABLE
 211 #endif
 212 #ifdef CONFIG_PPC_8xx
 213 #define MMU_FTRS_ALWAYS         MMU_FTR_TYPE_8xx
 214 #endif
 215 #ifdef CONFIG_40x
 216 #define MMU_FTRS_ALWAYS         MMU_FTR_TYPE_40x
 217 #endif
 218 #ifdef CONFIG_PPC_47x
 219 #define MMU_FTRS_ALWAYS         MMU_FTR_TYPE_47x
 220 #elif defined(CONFIG_44x)
 221 #define MMU_FTRS_ALWAYS         MMU_FTR_TYPE_44x
 222 #endif
 223 #if defined(CONFIG_E200) || defined(CONFIG_E500)
 224 #define MMU_FTRS_ALWAYS         MMU_FTR_TYPE_FSL_E
 225 #endif
 226
 227 #ifndef MMU_FTRS_ALWAYS
 228 #define MMU_FTRS_ALWAYS         0
 229 #endif
 230
 231 static inline bool early_mmu_has_feature(unsigned long feature)
 232 {
 233         if (MMU_FTRS_ALWAYS & feature)
 234                 return true;
 235
 236         return !!(MMU_FTRS_POSSIBLE & cur_cpu_spec->mmu_features & feature);
 237 }
 238
 239 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
 240 #include <linux/jump_label.h>
 241
 242 #define NUM_MMU_FTR_KEYS        32
 243
 244 extern struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS];
 245
 246 extern void mmu_feature_keys_init(void);
 247
 248 static __always_inline bool mmu_has_feature(unsigned long feature)
 249 {
 250         int i;
 251
 252 #ifndef __clang__ /* clang can't cope with this */
 253         BUILD_BUG_ON(!__builtin_constant_p(feature));
 254 #endif
 255
 256 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECK_DEBUG
 257         if (!static_key_initialized) {
 258                 printk("Warning! mmu_has_feature() used prior to jump label init!\n");
 259                 dump_stack();
 260                 return early_mmu_has_feature(feature);
 261         }
 262 #endif
 263
 264         if (MMU_FTRS_ALWAYS & feature)
 265                 return true;
 266
 267         if (!(MMU_FTRS_POSSIBLE & feature))
 268                 return false;
 269
 270         i = __builtin_ctzl(feature);
 271         return static_branch_likely(&mmu_feature_keys[i]);
 272 }
 273
 274 static inline void mmu_clear_feature(unsigned long feature)
 275 {
 276         int i;
 277
 278         i = __builtin_ctzl(feature);
 279         cur_cpu_spec->mmu_features &= ~feature;
 280         static_branch_disable(&mmu_feature_keys[i]);
 281 }
 282 #else
 283
 284 static inline void mmu_feature_keys_init(void)
 285 {
 286
 287 }
 288
 289 static inline bool mmu_has_feature(unsigned long feature)
 290 {
 291         return early_mmu_has_feature(feature);
 292 }
 293
 294 static inline void mmu_clear_feature(unsigned long feature)
 295 {
 296         cur_cpu_spec->mmu_features &= ~feature;
 297 }
 298 #endif /* CONFIG_JUMP_LABEL */
 299
 300 extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
 301
 302 #ifdef CONFIG_PPC64
 303 /* This is our real memory area size on ppc64 server, on embedded, we
 304  * make it match the size our of bolted TLB area
 305  */
 306 extern u64 ppc64_rma_size;
 307
 308 /* Cleanup function used by kexec */
 309 extern void mmu_cleanup_all(void);
 310 extern void radix__mmu_cleanup_all(void);
 311
 312 /* Functions for creating and updating partition table on POWER9 */
 313 extern void mmu_partition_table_init(void);
 314 extern void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
 315                                           unsigned long dw1, bool flush);
 316 #endif /* CONFIG_PPC64 */
 317
 318 struct mm_struct;
 319 #ifdef CONFIG_DEBUG_VM
 320 extern void assert_pte_locked(struct mm_struct *mm, unsigned long addr);
 321 #else /* CONFIG_DEBUG_VM */
 322 static inline void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
 323 {
 324 }
 325 #endif /* !CONFIG_DEBUG_VM */
 326
 327 #ifdef CONFIG_PPC_RADIX_MMU
 328 static inline bool radix_enabled(void)
 329 {
 330         return mmu_has_feature(MMU_FTR_TYPE_RADIX);
 331 }
 332
 333 static inline bool early_radix_enabled(void)
 334 {
 335         return early_mmu_has_feature(MMU_FTR_TYPE_RADIX);
 336 }
 337 #else
 338 static inline bool radix_enabled(void)
 339 {
 340         return false;
 341 }
 342
 343 static inline bool early_radix_enabled(void)
 344 {
 345         return false;
 346 }
 347 #endif
 348
 349 #ifdef CONFIG_STRICT_KERNEL_RWX
 350 static inline bool strict_kernel_rwx_enabled(void)
 351 {
 352         return rodata_enabled;
 353 }
 354 #else
 355 static inline bool strict_kernel_rwx_enabled(void)
 356 {
 357         return false;
 358 }
 359 #endif
 360 #endif /* !__ASSEMBLY__ */
 361
 362 /* The kernel use the constants below to index in the page sizes array.
 363  * The use of fixed constants for this purpose is better for performances
 364  * of the low level hash refill handlers.
 365  *
 366  * A non supported page size has a "shift" field set to 0
 367  *
 368  * Any new page size being implemented can get a new entry in here. Whether
 369  * the kernel will use it or not is a different matter though. The actual page
 370  * size used by hugetlbfs is not defined here and may be made variable
 371  *
 372  * Note: This array ended up being a false good idea as it's growing to the
 373  * point where I wonder if we should replace it with something different,
 374  * to think about, feedback welcome. --BenH.
 375  */
 376
 377 /* These are #defines as they have to be used in assembly */
 378 #define MMU_PAGE_4K     0
 379 #define MMU_PAGE_16K    1
 380 #define MMU_PAGE_64K    2
 381 #define MMU_PAGE_64K_AP 3       /* "Admixed pages" (hash64 only) */
 382 #define MMU_PAGE_256K   4
 383 #define MMU_PAGE_512K   5
 384 #define MMU_PAGE_1M     6
 385 #define MMU_PAGE_2M     7
 386 #define MMU_PAGE_4M     8
 387 #define MMU_PAGE_8M     9
 388 #define MMU_PAGE_16M    10
 389 #define MMU_PAGE_64M    11
 390 #define MMU_PAGE_256M   12
 391 #define MMU_PAGE_1G     13
 392 #define MMU_PAGE_16G    14
 393 #define MMU_PAGE_64G    15
 394
 395 /*
 396  * N.B. we need to change the type of hpte_page_sizes if this gets to be > 16
 397  * Also we need to change he type of mm_context.low/high_slices_psize.
 398  */
 399 #define MMU_PAGE_COUNT  16
 400
 401 #ifdef CONFIG_PPC_BOOK3S_64
 402 #include <asm/book3s/64/mmu.h>
 403 #else /* CONFIG_PPC_BOOK3S_64 */
 404
 405 #ifndef __ASSEMBLY__
 406 /* MMU initialization */
 407 extern void early_init_mmu(void);
 408 extern void early_init_mmu_secondary(void);
 409 extern void setup_initial_memory_limit(phys_addr_t first_memblock_base,
 410                                        phys_addr_t first_memblock_size);
 411 static inline void mmu_early_init_devtree(void) { }
 412
 413 static inline void pkey_early_init_devtree(void) {}
 414
 415 extern void *abatron_pteptrs[2];
 416 #endif /* __ASSEMBLY__ */
 417 #endif
 418
 419 #if defined(CONFIG_PPC_BOOK3S_32)
 420 /* 32-bit classic hash table MMU */
 421 #include <asm/book3s/32/mmu-hash.h>
 422 #elif defined(CONFIG_PPC_MMU_NOHASH)
 423 #include <asm/nohash/mmu.h>
 424 #endif
 425
 426 #endif /* __KERNEL__ */
 427 #endif /* _ASM_POWERPC_MMU_H_ */