1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * PS3 platform declarations.
5 * Copyright (C) 2006 Sony Computer Entertainment Inc.
6 * Copyright 2006 Sony Corp.
9 #if !defined(_ASM_POWERPC_PS3_H)
10 #define _ASM_POWERPC_PS3_H
12 #include <linux/types.h>
13 #include <linux/device.h>
14 #include <asm/cell-pmu.h>
16 union ps3_firmware_version
{
26 void ps3_get_firmware_version(union ps3_firmware_version
*v
);
27 int ps3_compare_firmware_version(u16 major
, u16 minor
, u16 rev
);
31 enum ps3_param_av_multi_out
{
32 PS3_PARAM_AV_MULTI_OUT_NTSC
= 0,
33 PS3_PARAM_AV_MULTI_OUT_PAL_RGB
= 1,
34 PS3_PARAM_AV_MULTI_OUT_PAL_YCBCR
= 2,
35 PS3_PARAM_AV_MULTI_OUT_SECAM
= 3,
38 enum ps3_param_av_multi_out
ps3_os_area_get_av_multi_out(void);
40 extern u64
ps3_os_area_get_rtc_diff(void);
41 extern void ps3_os_area_set_rtc_diff(u64 rtc_diff
);
43 struct ps3_os_area_flash_ops
{
44 ssize_t (*read
)(void *buf
, size_t count
, loff_t pos
);
45 ssize_t (*write
)(const void *buf
, size_t count
, loff_t pos
);
48 extern void ps3_os_area_flash_register(const struct ps3_os_area_flash_ops
*ops
);
52 enum ps3_dma_page_size
{
59 enum ps3_dma_region_type
{
64 struct ps3_dma_region_ops
;
67 * struct ps3_dma_region - A per device dma state variables structure
68 * @did: The HV device id.
69 * @page_size: The ioc pagesize.
70 * @region_type: The HV region type.
71 * @bus_addr: The 'translated' bus address of the region.
72 * @len: The length in bytes of the region.
73 * @offset: The offset from the start of memory of the region.
74 * @ioid: The IOID of the device who owns this region
75 * @chunk_list: Opaque variable used by the ioc page manager.
76 * @region_ops: struct ps3_dma_region_ops - dma region operations
79 struct ps3_dma_region
{
80 struct ps3_system_bus_device
*dev
;
81 /* device variables */
82 const struct ps3_dma_region_ops
*region_ops
;
84 enum ps3_dma_page_size page_size
;
85 enum ps3_dma_region_type region_type
;
89 /* driver variables (set by ps3_dma_region_create) */
90 unsigned long bus_addr
;
93 struct list_head head
;
97 struct ps3_dma_region_ops
{
98 int (*create
)(struct ps3_dma_region
*);
99 int (*free
)(struct ps3_dma_region
*);
100 int (*map
)(struct ps3_dma_region
*,
101 unsigned long virt_addr
,
103 dma_addr_t
*bus_addr
,
105 int (*unmap
)(struct ps3_dma_region
*,
110 * struct ps3_dma_region_init - Helper to initialize structure variables
112 * Helper to properly initialize variables prior to calling
113 * ps3_system_bus_device_register.
116 struct ps3_system_bus_device
;
118 int ps3_dma_region_init(struct ps3_system_bus_device
*dev
,
119 struct ps3_dma_region
*r
, enum ps3_dma_page_size page_size
,
120 enum ps3_dma_region_type region_type
, void *addr
, unsigned long len
);
121 int ps3_dma_region_create(struct ps3_dma_region
*r
);
122 int ps3_dma_region_free(struct ps3_dma_region
*r
);
123 int ps3_dma_map(struct ps3_dma_region
*r
, unsigned long virt_addr
,
124 unsigned long len
, dma_addr_t
*bus_addr
,
126 int ps3_dma_unmap(struct ps3_dma_region
*r
, dma_addr_t bus_addr
,
131 enum ps3_mmio_page_size
{
136 struct ps3_mmio_region_ops
;
138 * struct ps3_mmio_region - a per device mmio state variables structure
140 * Current systems can be supported with a single region per device.
143 struct ps3_mmio_region
{
144 struct ps3_system_bus_device
*dev
;
145 const struct ps3_mmio_region_ops
*mmio_ops
;
146 unsigned long bus_addr
;
148 enum ps3_mmio_page_size page_size
;
149 unsigned long lpar_addr
;
152 struct ps3_mmio_region_ops
{
153 int (*create
)(struct ps3_mmio_region
*);
154 int (*free
)(struct ps3_mmio_region
*);
157 * struct ps3_mmio_region_init - Helper to initialize structure variables
159 * Helper to properly initialize variables prior to calling
160 * ps3_system_bus_device_register.
163 int ps3_mmio_region_init(struct ps3_system_bus_device
*dev
,
164 struct ps3_mmio_region
*r
, unsigned long bus_addr
, unsigned long len
,
165 enum ps3_mmio_page_size page_size
);
166 int ps3_mmio_region_create(struct ps3_mmio_region
*r
);
167 int ps3_free_mmio_region(struct ps3_mmio_region
*r
);
168 unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr
);
170 /* inrerrupt routines */
172 enum ps3_cpu_binding
{
173 PS3_BINDING_CPU_ANY
= -1,
174 PS3_BINDING_CPU_0
= 0,
175 PS3_BINDING_CPU_1
= 1,
178 int ps3_irq_plug_setup(enum ps3_cpu_binding cpu
, unsigned long outlet
,
180 int ps3_irq_plug_destroy(unsigned int virq
);
181 int ps3_event_receive_port_setup(enum ps3_cpu_binding cpu
, unsigned int *virq
);
182 int ps3_event_receive_port_destroy(unsigned int virq
);
183 int ps3_send_event_locally(unsigned int virq
);
185 int ps3_io_irq_setup(enum ps3_cpu_binding cpu
, unsigned int interrupt_id
,
187 int ps3_io_irq_destroy(unsigned int virq
);
188 int ps3_vuart_irq_setup(enum ps3_cpu_binding cpu
, void* virt_addr_bmp
,
190 int ps3_vuart_irq_destroy(unsigned int virq
);
191 int ps3_spe_irq_setup(enum ps3_cpu_binding cpu
, unsigned long spe_id
,
192 unsigned int class, unsigned int *virq
);
193 int ps3_spe_irq_destroy(unsigned int virq
);
195 int ps3_sb_event_receive_port_setup(struct ps3_system_bus_device
*dev
,
196 enum ps3_cpu_binding cpu
, unsigned int *virq
);
197 int ps3_sb_event_receive_port_destroy(struct ps3_system_bus_device
*dev
,
200 /* lv1 result codes */
205 LV1_RESOURCE_SHORTAGE
= -2,
206 LV1_NO_PRIVILEGE
= -3,
207 LV1_DENIED_BY_POLICY
= -4,
208 LV1_ACCESS_VIOLATION
= -5,
210 LV1_DUPLICATE_ENTRY
= -7,
211 LV1_TYPE_MISMATCH
= -8,
214 LV1_WRONG_STATE
= -11,
217 LV1_ALREADY_CONNECTED
= -14,
218 LV1_UNSUPPORTED_PARAMETER_VALUE
= -15,
219 LV1_CONDITION_NOT_SATISFIED
= -16,
220 LV1_ILLEGAL_PARAMETER_VALUE
= -17,
221 LV1_BAD_OPTION
= -18,
222 LV1_IMPLEMENTATION_LIMITATION
= -19,
223 LV1_NOT_IMPLEMENTED
= -20,
224 LV1_INVALID_CLASS_ID
= -21,
225 LV1_CONSTRAINT_NOT_SATISFIED
= -22,
226 LV1_ALIGNMENT_ERROR
= -23,
227 LV1_HARDWARE_ERROR
= -24,
228 LV1_INVALID_DATA_FORMAT
= -25,
229 LV1_INVALID_OPERATION
= -26,
230 LV1_INTERNAL_ERROR
= -32768,
233 static inline const char* ps3_result(int result
)
235 #if defined(DEBUG) || defined(PS3_VERBOSE_RESULT)
238 return "LV1_SUCCESS (0)";
240 return "** unknown result ** (-1)";
241 case LV1_RESOURCE_SHORTAGE
:
242 return "LV1_RESOURCE_SHORTAGE (-2)";
243 case LV1_NO_PRIVILEGE
:
244 return "LV1_NO_PRIVILEGE (-3)";
245 case LV1_DENIED_BY_POLICY
:
246 return "LV1_DENIED_BY_POLICY (-4)";
247 case LV1_ACCESS_VIOLATION
:
248 return "LV1_ACCESS_VIOLATION (-5)";
250 return "LV1_NO_ENTRY (-6)";
251 case LV1_DUPLICATE_ENTRY
:
252 return "LV1_DUPLICATE_ENTRY (-7)";
253 case LV1_TYPE_MISMATCH
:
254 return "LV1_TYPE_MISMATCH (-8)";
256 return "LV1_BUSY (-9)";
258 return "LV1_EMPTY (-10)";
259 case LV1_WRONG_STATE
:
260 return "LV1_WRONG_STATE (-11)";
262 return "** unknown result ** (-12)";
264 return "LV1_NO_MATCH (-13)";
265 case LV1_ALREADY_CONNECTED
:
266 return "LV1_ALREADY_CONNECTED (-14)";
267 case LV1_UNSUPPORTED_PARAMETER_VALUE
:
268 return "LV1_UNSUPPORTED_PARAMETER_VALUE (-15)";
269 case LV1_CONDITION_NOT_SATISFIED
:
270 return "LV1_CONDITION_NOT_SATISFIED (-16)";
271 case LV1_ILLEGAL_PARAMETER_VALUE
:
272 return "LV1_ILLEGAL_PARAMETER_VALUE (-17)";
274 return "LV1_BAD_OPTION (-18)";
275 case LV1_IMPLEMENTATION_LIMITATION
:
276 return "LV1_IMPLEMENTATION_LIMITATION (-19)";
277 case LV1_NOT_IMPLEMENTED
:
278 return "LV1_NOT_IMPLEMENTED (-20)";
279 case LV1_INVALID_CLASS_ID
:
280 return "LV1_INVALID_CLASS_ID (-21)";
281 case LV1_CONSTRAINT_NOT_SATISFIED
:
282 return "LV1_CONSTRAINT_NOT_SATISFIED (-22)";
283 case LV1_ALIGNMENT_ERROR
:
284 return "LV1_ALIGNMENT_ERROR (-23)";
285 case LV1_HARDWARE_ERROR
:
286 return "LV1_HARDWARE_ERROR (-24)";
287 case LV1_INVALID_DATA_FORMAT
:
288 return "LV1_INVALID_DATA_FORMAT (-25)";
289 case LV1_INVALID_OPERATION
:
290 return "LV1_INVALID_OPERATION (-26)";
291 case LV1_INTERNAL_ERROR
:
292 return "LV1_INTERNAL_ERROR (-32768)";
295 return "** unknown result **";
302 /* system bus routines */
305 PS3_MATCH_ID_EHCI
= 1,
306 PS3_MATCH_ID_OHCI
= 2,
307 PS3_MATCH_ID_GELIC
= 3,
308 PS3_MATCH_ID_AV_SETTINGS
= 4,
309 PS3_MATCH_ID_SYSTEM_MANAGER
= 5,
310 PS3_MATCH_ID_STOR_DISK
= 6,
311 PS3_MATCH_ID_STOR_ROM
= 7,
312 PS3_MATCH_ID_STOR_FLASH
= 8,
313 PS3_MATCH_ID_SOUND
= 9,
314 PS3_MATCH_ID_GPU
= 10,
315 PS3_MATCH_ID_LPM
= 11,
318 enum ps3_match_sub_id
{
319 PS3_MATCH_SUB_ID_GPU_FB
= 1,
320 PS3_MATCH_SUB_ID_GPU_RAMDISK
= 2,
323 #define PS3_MODULE_ALIAS_EHCI "ps3:1:0"
324 #define PS3_MODULE_ALIAS_OHCI "ps3:2:0"
325 #define PS3_MODULE_ALIAS_GELIC "ps3:3:0"
326 #define PS3_MODULE_ALIAS_AV_SETTINGS "ps3:4:0"
327 #define PS3_MODULE_ALIAS_SYSTEM_MANAGER "ps3:5:0"
328 #define PS3_MODULE_ALIAS_STOR_DISK "ps3:6:0"
329 #define PS3_MODULE_ALIAS_STOR_ROM "ps3:7:0"
330 #define PS3_MODULE_ALIAS_STOR_FLASH "ps3:8:0"
331 #define PS3_MODULE_ALIAS_SOUND "ps3:9:0"
332 #define PS3_MODULE_ALIAS_GPU_FB "ps3:10:1"
333 #define PS3_MODULE_ALIAS_GPU_RAMDISK "ps3:10:2"
334 #define PS3_MODULE_ALIAS_LPM "ps3:11:0"
336 enum ps3_system_bus_device_type
{
337 PS3_DEVICE_TYPE_IOC0
= 1,
339 PS3_DEVICE_TYPE_VUART
,
344 * struct ps3_system_bus_device - a device on the system bus
347 struct ps3_system_bus_device
{
348 enum ps3_match_id match_id
;
349 enum ps3_match_sub_id match_sub_id
;
350 enum ps3_system_bus_device_type dev_type
;
354 unsigned int interrupt_id
; /* SB */
355 struct ps3_dma_region
*d_region
; /* SB, IOC0 */
356 struct ps3_mmio_region
*m_region
; /* SB, IOC0*/
357 unsigned int port_number
; /* VUART */
364 /* struct iommu_table *iommu_table; -- waiting for BenH's cleanups */
366 void *driver_priv
; /* private driver variables */
369 int ps3_open_hv_device(struct ps3_system_bus_device
*dev
);
370 int ps3_close_hv_device(struct ps3_system_bus_device
*dev
);
373 * struct ps3_system_bus_driver - a driver for a device on the system bus
376 struct ps3_system_bus_driver
{
377 enum ps3_match_id match_id
;
378 enum ps3_match_sub_id match_sub_id
;
379 struct device_driver core
;
380 int (*probe
)(struct ps3_system_bus_device
*);
381 void (*remove
)(struct ps3_system_bus_device
*);
382 void (*shutdown
)(struct ps3_system_bus_device
*);
383 /* int (*suspend)(struct ps3_system_bus_device *, pm_message_t); */
384 /* int (*resume)(struct ps3_system_bus_device *); */
387 int ps3_system_bus_device_register(struct ps3_system_bus_device
*dev
);
388 int ps3_system_bus_driver_register(struct ps3_system_bus_driver
*drv
);
389 void ps3_system_bus_driver_unregister(struct ps3_system_bus_driver
*drv
);
391 static inline struct ps3_system_bus_driver
*ps3_drv_to_system_bus_drv(
392 struct device_driver
*_drv
)
394 return container_of(_drv
, struct ps3_system_bus_driver
, core
);
396 static inline struct ps3_system_bus_device
*ps3_dev_to_system_bus_dev(
399 return container_of(_dev
, struct ps3_system_bus_device
, core
);
401 static inline struct ps3_system_bus_driver
*
402 ps3_system_bus_dev_to_system_bus_drv(struct ps3_system_bus_device
*_dev
)
405 BUG_ON(!_dev
->core
.driver
);
406 return ps3_drv_to_system_bus_drv(_dev
->core
.driver
);
410 * ps3_system_bus_set_drvdata -
411 * @dev: device structure
415 static inline void ps3_system_bus_set_drvdata(
416 struct ps3_system_bus_device
*dev
, void *data
)
418 dev_set_drvdata(&dev
->core
, data
);
420 static inline void *ps3_system_bus_get_drvdata(
421 struct ps3_system_bus_device
*dev
)
423 return dev_get_drvdata(&dev
->core
);
426 /* These two need global scope for get_arch_dma_ops(). */
428 extern struct bus_type ps3_system_bus_type
;
432 struct ps3_sys_manager_ops
{
433 struct ps3_system_bus_device
*dev
;
434 void (*power_off
)(struct ps3_system_bus_device
*dev
);
435 void (*restart
)(struct ps3_system_bus_device
*dev
);
438 void ps3_sys_manager_register_ops(const struct ps3_sys_manager_ops
*ops
);
439 void __noreturn
ps3_sys_manager_power_off(void);
440 void __noreturn
ps3_sys_manager_restart(void);
441 void __noreturn
ps3_sys_manager_halt(void);
442 int ps3_sys_manager_get_wol(void);
443 void ps3_sys_manager_set_wol(int state
);
445 struct ps3_prealloc
{
452 extern struct ps3_prealloc ps3fb_videomemory
;
453 extern struct ps3_prealloc ps3flash_bounce_buffer
;
455 /* logical performance monitor */
458 * enum ps3_lpm_rights - Rigths granted by the system policy module.
460 * @PS3_LPM_RIGHTS_USE_LPM: The right to use the lpm.
461 * @PS3_LPM_RIGHTS_USE_TB: The right to use the internal trace buffer.
464 enum ps3_lpm_rights
{
465 PS3_LPM_RIGHTS_USE_LPM
= 0x001,
466 PS3_LPM_RIGHTS_USE_TB
= 0x100,
470 * enum ps3_lpm_tb_type - Type of trace buffer lv1 should use.
472 * @PS3_LPM_TB_TYPE_NONE: Do not use a trace buffer.
473 * @PS3_LPM_RIGHTS_USE_TB: Use the lv1 internal trace buffer. Must have
474 * rights @PS3_LPM_RIGHTS_USE_TB.
477 enum ps3_lpm_tb_type
{
478 PS3_LPM_TB_TYPE_NONE
= 0,
479 PS3_LPM_TB_TYPE_INTERNAL
= 1,
482 int ps3_lpm_open(enum ps3_lpm_tb_type tb_type
, void *tb_cache
,
484 int ps3_lpm_close(void);
485 int ps3_lpm_copy_tb(unsigned long offset
, void *buf
, unsigned long count
,
486 unsigned long *bytes_copied
);
487 int ps3_lpm_copy_tb_to_user(unsigned long offset
, void __user
*buf
,
488 unsigned long count
, unsigned long *bytes_copied
);
489 void ps3_set_bookmark(u64 bookmark
);
490 void ps3_set_pm_bookmark(u64 tag
, u64 incident
, u64 th_id
);
491 int ps3_set_signal(u64 rtas_signal_group
, u8 signal_bit
, u16 sub_unit
,
494 u32
ps3_read_phys_ctr(u32 cpu
, u32 phys_ctr
);
495 void ps3_write_phys_ctr(u32 cpu
, u32 phys_ctr
, u32 val
);
496 u32
ps3_read_ctr(u32 cpu
, u32 ctr
);
497 void ps3_write_ctr(u32 cpu
, u32 ctr
, u32 val
);
499 u32
ps3_read_pm07_control(u32 cpu
, u32 ctr
);
500 void ps3_write_pm07_control(u32 cpu
, u32 ctr
, u32 val
);
501 u32
ps3_read_pm(u32 cpu
, enum pm_reg_name reg
);
502 void ps3_write_pm(u32 cpu
, enum pm_reg_name reg
, u32 val
);
504 u32
ps3_get_ctr_size(u32 cpu
, u32 phys_ctr
);
505 void ps3_set_ctr_size(u32 cpu
, u32 phys_ctr
, u32 ctr_size
);
507 void ps3_enable_pm(u32 cpu
);
508 void ps3_disable_pm(u32 cpu
);
509 void ps3_enable_pm_interrupts(u32 cpu
, u32 thread
, u32 mask
);
510 void ps3_disable_pm_interrupts(u32 cpu
);
512 u32
ps3_get_and_clear_pm_interrupts(u32 cpu
);
513 void ps3_sync_irq(int node
);
514 u32
ps3_get_hw_thread_id(int cpu
);
515 u64
ps3_get_spe_id(void *arg
);
517 void ps3_early_mm_init(void);