WIP FPC-III support
[linux/fpc-iii.git] / arch / powerpc / kernel / dma-iommu.c
blob111249fd619de8692323156c32063b2c51b2b7bc
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
5 * Provide default implementations of the DMA mapping callbacks for
6 * busses using the iommu infrastructure
7 */
9 #include <linux/dma-direct.h>
10 #include <linux/pci.h>
11 #include <asm/iommu.h>
13 #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
14 #define can_map_direct(dev, addr) \
15 ((dev)->bus_dma_limit >= phys_to_dma((dev), (addr)))
17 bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr)
19 if (likely(!dev->bus_dma_limit))
20 return false;
22 return can_map_direct(dev, addr);
25 #define is_direct_handle(dev, h) ((h) >= (dev)->archdata.dma_offset)
27 bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle)
29 if (likely(!dev->bus_dma_limit))
30 return false;
32 return is_direct_handle(dev, dma_handle);
35 bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg,
36 int nents)
38 struct scatterlist *s;
39 int i;
41 if (likely(!dev->bus_dma_limit))
42 return false;
44 for_each_sg(sg, s, nents, i) {
45 if (!can_map_direct(dev, sg_phys(s) + s->offset + s->length))
46 return false;
49 return true;
52 bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg,
53 int nents)
55 struct scatterlist *s;
56 int i;
58 if (likely(!dev->bus_dma_limit))
59 return false;
61 for_each_sg(sg, s, nents, i) {
62 if (!is_direct_handle(dev, s->dma_address + s->length))
63 return false;
66 return true;
68 #endif /* CONFIG_ARCH_HAS_DMA_MAP_DIRECT */
71 * Generic iommu implementation
74 /* Allocates a contiguous real buffer and creates mappings over it.
75 * Returns the virtual address of the buffer and sets dma_handle
76 * to the dma address (mapping) of the first page.
78 static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
79 dma_addr_t *dma_handle, gfp_t flag,
80 unsigned long attrs)
82 return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size,
83 dma_handle, dev->coherent_dma_mask, flag,
84 dev_to_node(dev));
87 static void dma_iommu_free_coherent(struct device *dev, size_t size,
88 void *vaddr, dma_addr_t dma_handle,
89 unsigned long attrs)
91 iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle);
94 /* Creates TCEs for a user provided buffer. The user buffer must be
95 * contiguous real kernel storage (not vmalloc). The address passed here
96 * comprises a page address and offset into that page. The dma_addr_t
97 * returned will point to the same byte within the page as was passed in.
99 static dma_addr_t dma_iommu_map_page(struct device *dev, struct page *page,
100 unsigned long offset, size_t size,
101 enum dma_data_direction direction,
102 unsigned long attrs)
104 return iommu_map_page(dev, get_iommu_table_base(dev), page, offset,
105 size, dma_get_mask(dev), direction, attrs);
109 static void dma_iommu_unmap_page(struct device *dev, dma_addr_t dma_handle,
110 size_t size, enum dma_data_direction direction,
111 unsigned long attrs)
113 iommu_unmap_page(get_iommu_table_base(dev), dma_handle, size, direction,
114 attrs);
118 static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,
119 int nelems, enum dma_data_direction direction,
120 unsigned long attrs)
122 return ppc_iommu_map_sg(dev, get_iommu_table_base(dev), sglist, nelems,
123 dma_get_mask(dev), direction, attrs);
126 static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist,
127 int nelems, enum dma_data_direction direction,
128 unsigned long attrs)
130 ppc_iommu_unmap_sg(get_iommu_table_base(dev), sglist, nelems,
131 direction, attrs);
134 static bool dma_iommu_bypass_supported(struct device *dev, u64 mask)
136 struct pci_dev *pdev = to_pci_dev(dev);
137 struct pci_controller *phb = pci_bus_to_host(pdev->bus);
139 if (iommu_fixed_is_weak || !phb->controller_ops.iommu_bypass_supported)
140 return false;
141 return phb->controller_ops.iommu_bypass_supported(pdev, mask);
144 /* We support DMA to/from any memory page via the iommu */
145 int dma_iommu_dma_supported(struct device *dev, u64 mask)
147 struct iommu_table *tbl = get_iommu_table_base(dev);
149 if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) {
151 * dma_iommu_bypass_supported() sets dma_max when there is
152 * 1:1 mapping but it is somehow limited.
153 * ibm,pmemory is one example.
155 dev->dma_ops_bypass = dev->bus_dma_limit == 0;
156 if (!dev->dma_ops_bypass)
157 dev_warn(dev,
158 "iommu: 64-bit OK but direct DMA is limited by %llx\n",
159 dev->bus_dma_limit);
160 else
161 dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n");
162 return 1;
165 if (!tbl) {
166 dev_err(dev, "Warning: IOMMU dma not supported: mask 0x%08llx, table unavailable\n", mask);
167 return 0;
170 if (tbl->it_offset > (mask >> tbl->it_page_shift)) {
171 dev_info(dev, "Warning: IOMMU offset too big for device mask\n");
172 dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n",
173 mask, tbl->it_offset << tbl->it_page_shift);
174 return 0;
177 dev_dbg(dev, "iommu: not 64-bit, using default ops\n");
178 dev->dma_ops_bypass = false;
179 return 1;
182 u64 dma_iommu_get_required_mask(struct device *dev)
184 struct iommu_table *tbl = get_iommu_table_base(dev);
185 u64 mask;
187 if (!tbl)
188 return 0;
190 mask = 1ULL << (fls_long(tbl->it_offset + tbl->it_size) +
191 tbl->it_page_shift - 1);
192 mask += mask - 1;
194 return mask;
197 const struct dma_map_ops dma_iommu_ops = {
198 .alloc = dma_iommu_alloc_coherent,
199 .free = dma_iommu_free_coherent,
200 .map_sg = dma_iommu_map_sg,
201 .unmap_sg = dma_iommu_unmap_sg,
202 .dma_supported = dma_iommu_dma_supported,
203 .map_page = dma_iommu_map_page,
204 .unmap_page = dma_iommu_unmap_page,
205 .get_required_mask = dma_iommu_get_required_mask,
206 .mmap = dma_common_mmap,
207 .get_sgtable = dma_common_get_sgtable,
208 .alloc_pages = dma_common_alloc_pages,
209 .free_pages = dma_common_free_pages,