arch/powerpc/platforms/powernv/opal-fadump.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Firmware-Assisted Dump support on POWER platform (OPAL).
   4  *
   5  * Copyright 2019, Hari Bathini, IBM Corporation.
   6  */
   7
   8 #ifndef _POWERNV_OPAL_FADUMP_H
   9 #define _POWERNV_OPAL_FADUMP_H
  10
  11 #include <asm/reg.h>
  12
  13 /*
  14  * With kernel & initrd loaded at 512MB (with 256MB size), enforce a minimum
  15  * boot memory size of 768MB to ensure f/w loading kernel and initrd doesn't
  16  * mess with crash'ed kernel's memory during MPIPL.
  17  */
  18 #define OPAL_FADUMP_MIN_BOOT_MEM                (0x30000000UL)
  19
  20 /*
  21  * OPAL FADump metadata structure format version
  22  *
  23  * OPAL FADump kernel metadata structure stores kernel metadata needed to
  24  * register-for/process crash dump. Format version is used to keep a tab on
  25  * the changes in the structure format. The changes, if any, to the format
  26  * are expected to be minimal and backward compatible.
  27  */
  28 #define OPAL_FADUMP_VERSION                     0x1
  29
  30 /*
  31  * OPAL FADump kernel metadata
  32  *
  33  * The address of this structure will be registered with f/w for retrieving
  34  * and processing during crash dump.
  35  */
  36 struct opal_fadump_mem_struct {
  37         u8      version;
  38         u8      reserved[3];
  39         u16     region_cnt;             /* number of regions */
  40         u16     registered_regions;     /* Regions registered for MPIPL */
  41         u64     fadumphdr_addr;
  42         struct opal_mpipl_region        rgn[FADUMP_MAX_MEM_REGS];
  43 } __packed;
  44
  45 /*
  46  * CPU state data
  47  *
  48  * CPU state data information is provided by f/w. The format for this data
  49  * is defined in the HDAT spec. Version is used to keep a tab on the changes
  50  * in this CPU state data format. Changes to this format are unlikely, but
  51  * if there are any changes, please refer to latest HDAT specification.
  52  */
  53 #define HDAT_FADUMP_CPU_DATA_VER                1
  54
  55 #define HDAT_FADUMP_CORE_INACTIVE               (0x0F)
  56
  57 /* HDAT thread header for register entries */
  58 struct hdat_fadump_thread_hdr {
  59         __be32  pir;
  60         /* 0x00 - 0x0F - The corresponding stop state of the core */
  61         u8      core_state;
  62         u8      reserved[3];
  63
  64         __be32  offset; /* Offset to Register Entries array */
  65         __be32  ecnt;   /* Number of entries */
  66         __be32  esize;  /* Alloc size of each array entry in bytes */
  67         __be32  eactsz; /* Actual size of each array entry in bytes */
  68 } __packed;
  69
  70 /* Register types populated by f/w */
  71 #define HDAT_FADUMP_REG_TYPE_GPR                0x01
  72 #define HDAT_FADUMP_REG_TYPE_SPR                0x02
  73
  74 /* ID numbers used by f/w while populating certain registers */
  75 #define HDAT_FADUMP_REG_ID_NIP                  0x7D0
  76 #define HDAT_FADUMP_REG_ID_MSR                  0x7D1
  77 #define HDAT_FADUMP_REG_ID_CCR                  0x7D2
  78
  79 /* HDAT register entry. */
  80 struct hdat_fadump_reg_entry {
  81         __be32          reg_type;
  82         __be32          reg_num;
  83         __be64          reg_val;
  84 } __packed;
  85
  86 static inline void opal_fadump_set_regval_regnum(struct pt_regs *regs,
  87                                                  u32 reg_type, u32 reg_num,
  88                                                  u64 reg_val)
  89 {
  90         if (reg_type == HDAT_FADUMP_REG_TYPE_GPR) {
  91                 if (reg_num < 32)
  92                         regs->gpr[reg_num] = reg_val;
  93                 return;
  94         }
  95
  96         switch (reg_num) {
  97         case SPRN_CTR:
  98                 regs->ctr = reg_val;
  99                 break;
 100         case SPRN_LR:
 101                 regs->link = reg_val;
 102                 break;
 103         case SPRN_XER:
 104                 regs->xer = reg_val;
 105                 break;
 106         case SPRN_DAR:
 107                 regs->dar = reg_val;
 108                 break;
 109         case SPRN_DSISR:
 110                 regs->dsisr = reg_val;
 111                 break;
 112         case HDAT_FADUMP_REG_ID_NIP:
 113                 regs->nip = reg_val;
 114                 break;
 115         case HDAT_FADUMP_REG_ID_MSR:
 116                 regs->msr = reg_val;
 117                 break;
 118         case HDAT_FADUMP_REG_ID_CCR:
 119                 regs->ccr = reg_val;
 120                 break;
 121         }
 122 }
 123
 124 static inline void opal_fadump_read_regs(char *bufp, unsigned int regs_cnt,
 125                                          unsigned int reg_entry_size,
 126                                          bool cpu_endian,
 127                                          struct pt_regs *regs)
 128 {
 129         struct hdat_fadump_reg_entry *reg_entry;
 130         u64 val;
 131         int i;
 132
 133         memset(regs, 0, sizeof(struct pt_regs));
 134
 135         for (i = 0; i < regs_cnt; i++, bufp += reg_entry_size) {
 136                 reg_entry = (struct hdat_fadump_reg_entry *)bufp;
 137                 val = (cpu_endian ? be64_to_cpu(reg_entry->reg_val) :
 138                        reg_entry->reg_val);
 139                 opal_fadump_set_regval_regnum(regs,
 140                                               be32_to_cpu(reg_entry->reg_type),
 141                                               be32_to_cpu(reg_entry->reg_num),
 142                                               val);
 143         }
 144 }
 145
 146 #endif /* _POWERNV_OPAL_FADUMP_H */