WIP FPC-III support
[linux/fpc-iii.git] / arch / riscv / include / asm / irqflags.h
blob08d4d6a5b7e9536271f71ab2e7423f7f778e47a0
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2012 Regents of the University of California
4 */
7 #ifndef _ASM_RISCV_IRQFLAGS_H
8 #define _ASM_RISCV_IRQFLAGS_H
10 #include <asm/processor.h>
11 #include <asm/csr.h>
13 /* read interrupt enabled status */
14 static inline unsigned long arch_local_save_flags(void)
16 return csr_read(CSR_STATUS);
19 /* unconditionally enable interrupts */
20 static inline void arch_local_irq_enable(void)
22 csr_set(CSR_STATUS, SR_IE);
25 /* unconditionally disable interrupts */
26 static inline void arch_local_irq_disable(void)
28 csr_clear(CSR_STATUS, SR_IE);
31 /* get status and disable interrupts */
32 static inline unsigned long arch_local_irq_save(void)
34 return csr_read_clear(CSR_STATUS, SR_IE);
37 /* test flags */
38 static inline int arch_irqs_disabled_flags(unsigned long flags)
40 return !(flags & SR_IE);
43 /* test hardware interrupt enable bit */
44 static inline int arch_irqs_disabled(void)
46 return arch_irqs_disabled_flags(arch_local_save_flags());
49 /* set interrupt enabled status */
50 static inline void arch_local_irq_restore(unsigned long flags)
52 csr_set(CSR_STATUS, flags & SR_IE);
55 #endif /* _ASM_RISCV_IRQFLAGS_H */