WIP FPC-III support
[linux/fpc-iii.git] / arch / s390 / include / asm / qdio.h
blob19e84c95d1e7be7f82788446e1d137ef91715ddd
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright IBM Corp. 2000, 2008
4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
5 * Jan Glauber <jang@linux.vnet.ibm.com>
7 */
8 #ifndef __QDIO_H__
9 #define __QDIO_H__
11 #include <linux/interrupt.h>
12 #include <asm/cio.h>
13 #include <asm/ccwdev.h>
15 /* only use 4 queues to save some cachelines */
16 #define QDIO_MAX_QUEUES_PER_IRQ 4
17 #define QDIO_MAX_BUFFERS_PER_Q 128
18 #define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
19 #define QDIO_BUFNR(num) ((num) & QDIO_MAX_BUFFERS_MASK)
20 #define QDIO_MAX_ELEMENTS_PER_BUFFER 16
21 #define QDIO_SBAL_SIZE 256
23 #define QDIO_QETH_QFMT 0
24 #define QDIO_ZFCP_QFMT 1
25 #define QDIO_IQDIO_QFMT 2
27 /**
28 * struct qdesfmt0 - queue descriptor, format 0
29 * @sliba: absolute address of storage list information block
30 * @sla: absolute address of storage list
31 * @slsba: absolute address of storage list state block
32 * @akey: access key for SLIB
33 * @bkey: access key for SL
34 * @ckey: access key for SBALs
35 * @dkey: access key for SLSB
37 struct qdesfmt0 {
38 u64 sliba;
39 u64 sla;
40 u64 slsba;
41 u32 : 32;
42 u32 akey : 4;
43 u32 bkey : 4;
44 u32 ckey : 4;
45 u32 dkey : 4;
46 u32 : 16;
47 } __attribute__ ((packed));
49 #define QDR_AC_MULTI_BUFFER_ENABLE 0x01
51 /**
52 * struct qdr - queue description record (QDR)
53 * @qfmt: queue format
54 * @ac: adapter characteristics
55 * @iqdcnt: input queue descriptor count
56 * @oqdcnt: output queue descriptor count
57 * @iqdsz: input queue descriptor size
58 * @oqdsz: output queue descriptor size
59 * @qiba: absolute address of queue information block
60 * @qkey: queue information block key
61 * @qdf0: queue descriptions
63 struct qdr {
64 u32 qfmt : 8;
65 u32 : 16;
66 u32 ac : 8;
67 u32 : 8;
68 u32 iqdcnt : 8;
69 u32 : 8;
70 u32 oqdcnt : 8;
71 u32 : 8;
72 u32 iqdsz : 8;
73 u32 : 8;
74 u32 oqdsz : 8;
75 /* private: */
76 u32 res[9];
77 /* public: */
78 u64 qiba;
79 u32 : 32;
80 u32 qkey : 4;
81 u32 : 28;
82 struct qdesfmt0 qdf0[126];
83 } __packed __aligned(PAGE_SIZE);
85 #define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
86 #define QIB_RFLAGS_ENABLE_QEBSM 0x80
87 #define QIB_RFLAGS_ENABLE_DATA_DIV 0x02
89 /**
90 * struct qib - queue information block (QIB)
91 * @qfmt: queue format
92 * @pfmt: implementation dependent parameter format
93 * @rflags: QEBSM
94 * @ac: adapter characteristics
95 * @isliba: absolute address of first input SLIB
96 * @osliba: absolute address of first output SLIB
97 * @ebcnam: adapter identifier in EBCDIC
98 * @parm: implementation dependent parameters
100 struct qib {
101 u32 qfmt : 8;
102 u32 pfmt : 8;
103 u32 rflags : 8;
104 u32 ac : 8;
105 u32 : 32;
106 u64 isliba;
107 u64 osliba;
108 u32 : 32;
109 u32 : 32;
110 u8 ebcnam[8];
111 /* private: */
112 u8 res[88];
113 /* public: */
114 u8 parm[128];
115 } __attribute__ ((packed, aligned(256)));
118 * struct slibe - storage list information block element (SLIBE)
119 * @parms: implementation dependent parameters
121 struct slibe {
122 u64 parms;
126 * struct qaob - queue asynchronous operation block
127 * @res0: reserved parameters
128 * @res1: reserved parameter
129 * @res2: reserved parameter
130 * @res3: reserved parameter
131 * @aorc: asynchronous operation return code
132 * @flags: internal flags
133 * @cbtbs: control block type
134 * @sb_count: number of storage blocks
135 * @sba: storage block element addresses
136 * @dcount: size of storage block elements
137 * @user0: user defineable value
138 * @res4: reserved paramater
139 * @user1: user defineable value
140 * @user2: user defineable value
142 struct qaob {
143 u64 res0[6];
144 u8 res1;
145 u8 res2;
146 u8 res3;
147 u8 aorc;
148 u8 flags;
149 u16 cbtbs;
150 u8 sb_count;
151 u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
152 u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
153 u64 user0;
154 u64 res4[2];
155 u64 user1;
156 u64 user2;
157 } __attribute__ ((packed, aligned(256)));
160 * struct slib - storage list information block (SLIB)
161 * @nsliba: next SLIB address (if any)
162 * @sla: SL address
163 * @slsba: SLSB address
164 * @slibe: SLIB elements
166 struct slib {
167 u64 nsliba;
168 u64 sla;
169 u64 slsba;
170 /* private: */
171 u8 res[1000];
172 /* public: */
173 struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
174 } __attribute__ ((packed, aligned(2048)));
176 #define SBAL_EFLAGS_LAST_ENTRY 0x40
177 #define SBAL_EFLAGS_CONTIGUOUS 0x20
178 #define SBAL_EFLAGS_FIRST_FRAG 0x04
179 #define SBAL_EFLAGS_MIDDLE_FRAG 0x08
180 #define SBAL_EFLAGS_LAST_FRAG 0x0c
181 #define SBAL_EFLAGS_MASK 0x6f
183 #define SBAL_SFLAGS0_PCI_REQ 0x40
184 #define SBAL_SFLAGS0_DATA_CONTINUATION 0x20
186 /* Awesome OpenFCP extensions */
187 #define SBAL_SFLAGS0_TYPE_STATUS 0x00
188 #define SBAL_SFLAGS0_TYPE_WRITE 0x08
189 #define SBAL_SFLAGS0_TYPE_READ 0x10
190 #define SBAL_SFLAGS0_TYPE_WRITE_READ 0x18
191 #define SBAL_SFLAGS0_MORE_SBALS 0x04
192 #define SBAL_SFLAGS0_COMMAND 0x02
193 #define SBAL_SFLAGS0_LAST_SBAL 0x00
194 #define SBAL_SFLAGS0_ONLY_SBAL SBAL_SFLAGS0_COMMAND
195 #define SBAL_SFLAGS0_MIDDLE_SBAL SBAL_SFLAGS0_MORE_SBALS
196 #define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
199 * struct qdio_buffer_element - SBAL entry
200 * @eflags: SBAL entry flags
201 * @scount: SBAL count
202 * @sflags: whole SBAL flags
203 * @length: length
204 * @addr: absolute data address
206 struct qdio_buffer_element {
207 u8 eflags;
208 /* private: */
209 u8 res1;
210 /* public: */
211 u8 scount;
212 u8 sflags;
213 u32 length;
214 u64 addr;
215 } __attribute__ ((packed, aligned(16)));
218 * struct qdio_buffer - storage block address list (SBAL)
219 * @element: SBAL entries
221 struct qdio_buffer {
222 struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
223 } __attribute__ ((packed, aligned(256)));
226 * struct sl_element - storage list entry
227 * @sbal: absolute SBAL address
229 struct sl_element {
230 u64 sbal;
231 } __attribute__ ((packed));
234 * struct sl - storage list (SL)
235 * @element: SL entries
237 struct sl {
238 struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
239 } __attribute__ ((packed, aligned(1024)));
242 * struct slsb - storage list state block (SLSB)
243 * @val: state per buffer
245 struct slsb {
246 u8 val[QDIO_MAX_BUFFERS_PER_Q];
247 } __attribute__ ((packed, aligned(256)));
250 * struct qdio_outbuf_state - SBAL related asynchronous operation information
251 * (for communication with upper layer programs)
252 * (only required for use with completion queues)
253 * @flags: flags indicating state of buffer
254 * @user: pointer to upper layer program's state information related to SBAL
255 * (stored in user1 data of QAOB)
257 struct qdio_outbuf_state {
258 u8 flags;
259 void *user;
262 #define QDIO_OUTBUF_STATE_FLAG_PENDING 0x01
264 #define CHSC_AC1_INITIATE_INPUTQ 0x80
267 /* qdio adapter-characteristics-1 flag */
268 #define AC1_SIGA_INPUT_NEEDED 0x40 /* process input queues */
269 #define AC1_SIGA_OUTPUT_NEEDED 0x20 /* process output queues */
270 #define AC1_SIGA_SYNC_NEEDED 0x10 /* ask hypervisor to sync */
271 #define AC1_AUTOMATIC_SYNC_ON_THININT 0x08 /* set by hypervisor */
272 #define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04 /* set by hypervisor */
273 #define AC1_SC_QEBSM_AVAILABLE 0x02 /* available for subchannel */
274 #define AC1_SC_QEBSM_ENABLED 0x01 /* enabled for subchannel */
276 #define CHSC_AC2_MULTI_BUFFER_AVAILABLE 0x0080
277 #define CHSC_AC2_MULTI_BUFFER_ENABLED 0x0040
278 #define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010
279 #define CHSC_AC2_SNIFFER_AVAILABLE 0x0008
280 #define CHSC_AC2_DATA_DIV_ENABLED 0x0002
282 #define CHSC_AC3_FORMAT2_CQ_AVAILABLE 0x8000
284 struct qdio_ssqd_desc {
285 u8 flags;
286 u8:8;
287 u16 sch;
288 u8 qfmt;
289 u8 parm;
290 u8 qdioac1;
291 u8 sch_class;
292 u8 pcnt;
293 u8 icnt;
294 u8:8;
295 u8 ocnt;
296 u8:8;
297 u8 mbccnt;
298 u16 qdioac2;
299 u64 sch_token;
300 u8 mro;
301 u8 mri;
302 u16 qdioac3;
303 u16:16;
304 u8:8;
305 u8 mmwc;
306 } __attribute__ ((packed));
308 /* params are: ccw_device, qdio_error, queue_number,
309 first element processed, number of elements processed, int_parm */
310 typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
311 int, int, unsigned long);
313 /* qdio errors reported to the upper-layer program */
314 #define QDIO_ERROR_ACTIVATE 0x0001
315 #define QDIO_ERROR_GET_BUF_STATE 0x0002
316 #define QDIO_ERROR_SET_BUF_STATE 0x0004
317 #define QDIO_ERROR_SLSB_STATE 0x0100
319 #define QDIO_ERROR_FATAL 0x00ff
320 #define QDIO_ERROR_TEMPORARY 0xff00
322 /* for qdio_cleanup */
323 #define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01
324 #define QDIO_FLAG_CLEANUP_USING_HALT 0x02
327 * struct qdio_initialize - qdio initialization data
328 * @q_format: queue format
329 * @qdr_ac: feature flags to set
330 * @qib_param_field_format: format for qib_parm_field
331 * @qib_param_field: pointer to 128 bytes or NULL, if no param field
332 * @qib_rflags: rflags to set
333 * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL
334 * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL
335 * @no_input_qs: number of input queues
336 * @no_output_qs: number of output queues
337 * @input_handler: handler to be called for input queues
338 * @output_handler: handler to be called for output queues
339 * @irq_poll: Data IRQ polling handler (NULL when not supported)
340 * @scan_threshold: # of in-use buffers that triggers scan on output queue
341 * @int_parm: interruption parameter
342 * @input_sbal_addr_array: per-queue array, each element points to 128 SBALs
343 * @output_sbal_addr_array: per-queue array, each element points to 128 SBALs
344 * @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL)
346 struct qdio_initialize {
347 unsigned char q_format;
348 unsigned char qdr_ac;
349 unsigned int qib_param_field_format;
350 unsigned char *qib_param_field;
351 unsigned char qib_rflags;
352 unsigned long *input_slib_elements;
353 unsigned long *output_slib_elements;
354 unsigned int no_input_qs;
355 unsigned int no_output_qs;
356 qdio_handler_t *input_handler;
357 qdio_handler_t *output_handler;
358 void (*irq_poll)(struct ccw_device *cdev, unsigned long data);
359 unsigned int scan_threshold;
360 unsigned long int_parm;
361 struct qdio_buffer ***input_sbal_addr_array;
362 struct qdio_buffer ***output_sbal_addr_array;
363 struct qdio_outbuf_state *output_sbal_state_array;
366 #define QDIO_STATE_INACTIVE 0x00000002 /* after qdio_cleanup */
367 #define QDIO_STATE_ESTABLISHED 0x00000004 /* after qdio_establish */
368 #define QDIO_STATE_ACTIVE 0x00000008 /* after qdio_activate */
369 #define QDIO_STATE_STOPPED 0x00000010 /* after queues went down */
371 #define QDIO_FLAG_SYNC_INPUT 0x01
372 #define QDIO_FLAG_SYNC_OUTPUT 0x02
373 #define QDIO_FLAG_PCI_OUT 0x10
375 int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
376 void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
377 void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
379 extern int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs,
380 unsigned int no_output_qs);
381 extern int qdio_establish(struct ccw_device *cdev,
382 struct qdio_initialize *init_data);
383 extern int qdio_activate(struct ccw_device *);
384 extern void qdio_release_aob(struct qaob *);
385 extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
386 unsigned int);
387 extern int qdio_start_irq(struct ccw_device *cdev);
388 extern int qdio_stop_irq(struct ccw_device *cdev);
389 extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
390 extern int qdio_inspect_queue(struct ccw_device *cdev, unsigned int nr,
391 bool is_input, unsigned int *bufnr,
392 unsigned int *error);
393 extern int qdio_shutdown(struct ccw_device *, int);
394 extern int qdio_free(struct ccw_device *);
395 extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
397 #endif /* __QDIO_H__ */