1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_SH_RENESAS_RTS7751R2D_H
3 #define __ASM_SH_RENESAS_RTS7751R2D_H
6 * linux/include/asm-sh/renesas_rts7751r2d.h
8 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
10 * Renesas Technology Sales RTS7751R2D support
13 /* Board specific addresses. */
15 #define PA_BCR 0xa4000000 /* FPGA */
16 #define PA_IRLMON 0xa4000002 /* Interrupt Status control */
17 #define PA_CFCTL 0xa4000004 /* CF Timing control */
18 #define PA_CFPOW 0xa4000006 /* CF Power control */
19 #define PA_DISPCTL 0xa4000008 /* Display Timing control */
20 #define PA_SDMPOW 0xa400000a /* SD Power control */
21 #define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */
22 #define PA_PCICD 0xa400000e /* PCI Extension detect control */
23 #define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */
25 #define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */
26 #define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */
27 #define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */
28 #define PA_R2D1_EXTRST 0xa4000028 /* Extension Reset control */
29 #define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */
31 #define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */
32 #define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */
33 #define PA_R2DPLUS_EXTRST 0xa4000026 /* Extension Reset control */
34 #define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */
35 #define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */
37 #define PA_POWOFF 0xa4000030 /* Board Power OFF control */
38 #define PA_VERREG 0xa4000032 /* FPGA Version Register */
39 #define PA_INPORT 0xa4000034 /* KEY Input Port control */
40 #define PA_OUTPORT 0xa4000036 /* LED control */
41 #define PA_BVERREG 0xa4000038 /* Board Revision Register */
43 #define PA_AX88796L 0xaa000400 /* AX88796L Area */
44 #define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */
45 #define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
46 #define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
48 #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
50 #define R2D_FPGA_IRQ_BASE 100
52 #define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0)
53 #define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1)
54 #define IRQ_TP (R2D_FPGA_IRQ_BASE + 2)
55 #define IRQ_RTC_T (R2D_FPGA_IRQ_BASE + 3)
56 #define IRQ_RTC_A (R2D_FPGA_IRQ_BASE + 4)
57 #define IRQ_SDCARD (R2D_FPGA_IRQ_BASE + 5)
58 #define IRQ_CF_CD (R2D_FPGA_IRQ_BASE + 6)
59 #define IRQ_CF_IDE (R2D_FPGA_IRQ_BASE + 7)
60 #define IRQ_AX88796 (R2D_FPGA_IRQ_BASE + 8)
61 #define IRQ_KEY (R2D_FPGA_IRQ_BASE + 9)
62 #define IRQ_PCI_INTA (R2D_FPGA_IRQ_BASE + 10)
63 #define IRQ_PCI_INTB (R2D_FPGA_IRQ_BASE + 11)
64 #define IRQ_PCI_INTC (R2D_FPGA_IRQ_BASE + 12)
65 #define IRQ_PCI_INTD (R2D_FPGA_IRQ_BASE + 13)
67 /* arch/sh/boards/renesas/rts7751r2d/irq.c */
68 void init_rts7751r2d_IRQ(void);
69 int rts7751r2d_irq_demux(int);
71 #endif /* __ASM_SH_RENESAS_RTS7751R2D */