WIP FPC-III support
[linux/fpc-iii.git] / arch / x86 / include / uapi / asm / sgx.h
blob9034f3007c4efc2e59aa9e0df97c9d34d0e29223
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /*
3 * Copyright(c) 2016-20 Intel Corporation.
4 */
5 #ifndef _UAPI_ASM_X86_SGX_H
6 #define _UAPI_ASM_X86_SGX_H
8 #include <linux/types.h>
9 #include <linux/ioctl.h>
11 /**
12 * enum sgx_page_flags - page control flags
13 * %SGX_PAGE_MEASURE: Measure the page contents with a sequence of
14 * ENCLS[EEXTEND] operations.
16 enum sgx_page_flags {
17 SGX_PAGE_MEASURE = 0x01,
20 #define SGX_MAGIC 0xA4
22 #define SGX_IOC_ENCLAVE_CREATE \
23 _IOW(SGX_MAGIC, 0x00, struct sgx_enclave_create)
24 #define SGX_IOC_ENCLAVE_ADD_PAGES \
25 _IOWR(SGX_MAGIC, 0x01, struct sgx_enclave_add_pages)
26 #define SGX_IOC_ENCLAVE_INIT \
27 _IOW(SGX_MAGIC, 0x02, struct sgx_enclave_init)
28 #define SGX_IOC_ENCLAVE_PROVISION \
29 _IOW(SGX_MAGIC, 0x03, struct sgx_enclave_provision)
31 /**
32 * struct sgx_enclave_create - parameter structure for the
33 * %SGX_IOC_ENCLAVE_CREATE ioctl
34 * @src: address for the SECS page data
36 struct sgx_enclave_create {
37 __u64 src;
40 /**
41 * struct sgx_enclave_add_pages - parameter structure for the
42 * %SGX_IOC_ENCLAVE_ADD_PAGE ioctl
43 * @src: start address for the page data
44 * @offset: starting page offset
45 * @length: length of the data (multiple of the page size)
46 * @secinfo: address for the SECINFO data
47 * @flags: page control flags
48 * @count: number of bytes added (multiple of the page size)
50 struct sgx_enclave_add_pages {
51 __u64 src;
52 __u64 offset;
53 __u64 length;
54 __u64 secinfo;
55 __u64 flags;
56 __u64 count;
59 /**
60 * struct sgx_enclave_init - parameter structure for the
61 * %SGX_IOC_ENCLAVE_INIT ioctl
62 * @sigstruct: address for the SIGSTRUCT data
64 struct sgx_enclave_init {
65 __u64 sigstruct;
68 /**
69 * struct sgx_enclave_provision - parameter structure for the
70 * %SGX_IOC_ENCLAVE_PROVISION ioctl
71 * @fd: file handle of /dev/sgx_provision
73 struct sgx_enclave_provision {
74 __u64 fd;
77 struct sgx_enclave_run;
79 /**
80 * typedef sgx_enclave_user_handler_t - Exit handler function accepted by
81 * __vdso_sgx_enter_enclave()
82 * @run: The run instance given by the caller
84 * The register parameters contain the snapshot of their values at enclave
85 * exit. An invalid ENCLU function number will cause -EINVAL to be returned
86 * to the caller.
88 * Return:
89 * - <= 0: The given value is returned back to the caller.
90 * - > 0: ENCLU function to invoke, either EENTER or ERESUME.
92 typedef int (*sgx_enclave_user_handler_t)(long rdi, long rsi, long rdx,
93 long rsp, long r8, long r9,
94 struct sgx_enclave_run *run);
96 /**
97 * struct sgx_enclave_run - the execution context of __vdso_sgx_enter_enclave()
98 * @tcs: TCS used to enter the enclave
99 * @function: The last seen ENCLU function (EENTER, ERESUME or EEXIT)
100 * @exception_vector: The interrupt vector of the exception
101 * @exception_error_code: The exception error code pulled out of the stack
102 * @exception_addr: The address that triggered the exception
103 * @user_handler: User provided callback run on exception
104 * @user_data: Data passed to the user handler
105 * @reserved Reserved for future extensions
107 * If @user_handler is provided, the handler will be invoked on all return paths
108 * of the normal flow. The user handler may transfer control, e.g. via a
109 * longjmp() call or a C++ exception, without returning to
110 * __vdso_sgx_enter_enclave().
112 struct sgx_enclave_run {
113 __u64 tcs;
114 __u32 function;
115 __u16 exception_vector;
116 __u16 exception_error_code;
117 __u64 exception_addr;
118 __u64 user_handler;
119 __u64 user_data;
120 __u8 reserved[216];
124 * typedef vdso_sgx_enter_enclave_t - Prototype for __vdso_sgx_enter_enclave(),
125 * a vDSO function to enter an SGX enclave.
126 * @rdi: Pass-through value for RDI
127 * @rsi: Pass-through value for RSI
128 * @rdx: Pass-through value for RDX
129 * @function: ENCLU function, must be EENTER or ERESUME
130 * @r8: Pass-through value for R8
131 * @r9: Pass-through value for R9
132 * @run: struct sgx_enclave_run, must be non-NULL
134 * NOTE: __vdso_sgx_enter_enclave() does not ensure full compliance with the
135 * x86-64 ABI, e.g. doesn't handle XSAVE state. Except for non-volatile
136 * general purpose registers, EFLAGS.DF, and RSP alignment, preserving/setting
137 * state in accordance with the x86-64 ABI is the responsibility of the enclave
138 * and its runtime, i.e. __vdso_sgx_enter_enclave() cannot be called from C
139 * code without careful consideration by both the enclave and its runtime.
141 * All general purpose registers except RAX, RBX and RCX are passed as-is to the
142 * enclave. RAX, RBX and RCX are consumed by EENTER and ERESUME and are loaded
143 * with @function, asynchronous exit pointer, and @run.tcs respectively.
145 * RBP and the stack are used to anchor __vdso_sgx_enter_enclave() to the
146 * pre-enclave state, e.g. to retrieve @run.exception and @run.user_handler
147 * after an enclave exit. All other registers are available for use by the
148 * enclave and its runtime, e.g. an enclave can push additional data onto the
149 * stack (and modify RSP) to pass information to the optional user handler (see
150 * below).
152 * Most exceptions reported on ENCLU, including those that occur within the
153 * enclave, are fixed up and reported synchronously instead of being delivered
154 * via a standard signal. Debug Exceptions (#DB) and Breakpoints (#BP) are
155 * never fixed up and are always delivered via standard signals. On synchrously
156 * reported exceptions, -EFAULT is returned and details about the exception are
157 * recorded in @run.exception, the optional sgx_enclave_exception struct.
159 * Return:
160 * - 0: ENCLU function was successfully executed.
161 * - -EINVAL: Invalid ENCL number (neither EENTER nor ERESUME).
163 typedef int (*vdso_sgx_enter_enclave_t)(unsigned long rdi, unsigned long rsi,
164 unsigned long rdx, unsigned int function,
165 unsigned long r8, unsigned long r9,
166 struct sgx_enclave_run *run);
168 #endif /* _UAPI_ASM_X86_SGX_H */