WIP FPC-III support
[linux/fpc-iii.git] / arch / xtensa / include / asm / mmu_context.h
blobe337ba9686e919f05c5e1c13d3aea76b8b544c52
1 /*
2 * Switch an MMU context.
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
8 * Copyright (C) 2001 - 2013 Tensilica Inc.
9 */
11 #ifndef _XTENSA_MMU_CONTEXT_H
12 #define _XTENSA_MMU_CONTEXT_H
14 #ifndef CONFIG_MMU
15 #include <asm/nommu_context.h>
16 #else
18 #include <linux/stringify.h>
19 #include <linux/sched.h>
20 #include <linux/mm_types.h>
21 #include <linux/pgtable.h>
23 #include <asm/vectors.h>
25 #include <asm/cacheflush.h>
26 #include <asm/tlbflush.h>
27 #include <asm-generic/mm_hooks.h>
28 #include <asm-generic/percpu.h>
30 #if (XCHAL_HAVE_TLBS != 1)
31 # error "Linux must have an MMU!"
32 #endif
34 DECLARE_PER_CPU(unsigned long, asid_cache);
35 #define cpu_asid_cache(cpu) per_cpu(asid_cache, cpu)
38 * NO_CONTEXT is the invalid ASID value that we don't ever assign to
39 * any user or kernel context. We use the reserved values in the
40 * ASID_INSERT macro below.
42 * 0 invalid
43 * 1 kernel
44 * 2 reserved
45 * 3 reserved
46 * 4...255 available
49 #define NO_CONTEXT 0
50 #define ASID_USER_FIRST 4
51 #define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1)
52 #define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8))
54 void init_mmu(void);
55 void init_kio(void);
57 static inline void set_rasid_register (unsigned long val)
59 __asm__ __volatile__ (" wsr %0, rasid\n\t"
60 " isync\n" : : "a" (val));
63 static inline unsigned long get_rasid_register (void)
65 unsigned long tmp;
66 __asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp));
67 return tmp;
70 static inline void get_new_mmu_context(struct mm_struct *mm, unsigned int cpu)
72 unsigned long asid = cpu_asid_cache(cpu);
73 if ((++asid & ASID_MASK) == 0) {
75 * Start new asid cycle; continue counting with next
76 * incarnation bits; skipping over 0, 1, 2, 3.
78 local_flush_tlb_all();
79 asid += ASID_USER_FIRST;
81 cpu_asid_cache(cpu) = asid;
82 mm->context.asid[cpu] = asid;
83 mm->context.cpu = cpu;
86 static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
89 * Check if our ASID is of an older version and thus invalid.
92 if (mm) {
93 unsigned long asid = mm->context.asid[cpu];
95 if (asid == NO_CONTEXT ||
96 ((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK))
97 get_new_mmu_context(mm, cpu);
101 static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
103 get_mmu_context(mm, cpu);
104 set_rasid_register(ASID_INSERT(mm->context.asid[cpu]));
105 invalidate_page_directory();
109 * Initialize the context related info for a new mm_struct
110 * instance. Valid cpu values are 0..(NR_CPUS-1), so initializing
111 * to -1 says the process has never run on any core.
114 #define init_new_context init_new_context
115 static inline int init_new_context(struct task_struct *tsk,
116 struct mm_struct *mm)
118 int cpu;
119 for_each_possible_cpu(cpu) {
120 mm->context.asid[cpu] = NO_CONTEXT;
122 mm->context.cpu = -1;
123 return 0;
126 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
127 struct task_struct *tsk)
129 unsigned int cpu = smp_processor_id();
130 int migrated = next->context.cpu != cpu;
131 /* Flush the icache if we migrated to a new core. */
132 if (migrated) {
133 __invalidate_icache_all();
134 next->context.cpu = cpu;
136 if (migrated || prev != next)
137 activate_context(next, cpu);
141 * Destroy context related info for an mm_struct that is about
142 * to be put to rest.
144 #define destroy_context destroy_context
145 static inline void destroy_context(struct mm_struct *mm)
147 invalidate_page_directory();
151 #include <asm-generic/mmu_context.h>
153 #endif /* CONFIG_MMU */
154 #endif /* _XTENSA_MMU_CONTEXT_H */