1 # SPDX-License-Identifier: GPL-2.0
3 # Hisilicon Clock specific Makefile
6 obj-y
+= clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
8 obj-
$(CONFIG_ARCH_HI3xxx
) += clk-hi3620.o
9 obj-
$(CONFIG_ARCH_HIP04
) += clk-hip04.o
10 obj-
$(CONFIG_ARCH_HIX5HD2
) += clk-hix5hd2.o
11 obj-
$(CONFIG_COMMON_CLK_HI3516CV300
) += crg-hi3516cv300.o
12 obj-
$(CONFIG_COMMON_CLK_HI3519
) += clk-hi3519.o
13 obj-
$(CONFIG_COMMON_CLK_HI3660
) += clk-hi3660.o
14 obj-
$(CONFIG_COMMON_CLK_HI3670
) += clk-hi3670.o
15 obj-
$(CONFIG_COMMON_CLK_HI3798CV200
) += crg-hi3798cv200.o
16 obj-
$(CONFIG_COMMON_CLK_HI6220
) += clk-hi6220.o
17 obj-
$(CONFIG_RESET_HISI
) += reset.o
18 obj-
$(CONFIG_STUB_CLK_HI6220
) += clk-hi6220-stub.o
19 obj-
$(CONFIG_STUB_CLK_HI3660
) += clk-hi3660-stub.o