WIP FPC-III support
[linux/fpc-iii.git] / drivers / clk / mediatek / clk-mt2701-img.c
blob631e80f0fc7df439f92d4fa2267a5748cebae42b
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Shunli Wang <shunli.wang@mediatek.com>
5 */
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
13 #include <dt-bindings/clock/mt2701-clk.h>
15 static const struct mtk_gate_regs img_cg_regs = {
16 .set_ofs = 0x0004,
17 .clr_ofs = 0x0008,
18 .sta_ofs = 0x0000,
21 #define GATE_IMG(_id, _name, _parent, _shift) { \
22 .id = _id, \
23 .name = _name, \
24 .parent_name = _parent, \
25 .regs = &img_cg_regs, \
26 .shift = _shift, \
27 .ops = &mtk_clk_gate_ops_setclr, \
30 static const struct mtk_gate img_clks[] = {
31 GATE_IMG(CLK_IMG_SMI_COMM, "img_smi_comm", "mm_sel", 0),
32 GATE_IMG(CLK_IMG_RESZ, "img_resz", "mm_sel", 1),
33 GATE_IMG(CLK_IMG_JPGDEC_SMI, "img_jpgdec_smi", "mm_sel", 5),
34 GATE_IMG(CLK_IMG_JPGDEC, "img_jpgdec", "mm_sel", 6),
35 GATE_IMG(CLK_IMG_VENC_LT, "img_venc_lt", "mm_sel", 8),
36 GATE_IMG(CLK_IMG_VENC, "img_venc", "mm_sel", 9),
39 static const struct of_device_id of_match_clk_mt2701_img[] = {
40 { .compatible = "mediatek,mt2701-imgsys", },
44 static int clk_mt2701_img_probe(struct platform_device *pdev)
46 struct clk_onecell_data *clk_data;
47 int r;
48 struct device_node *node = pdev->dev.of_node;
50 clk_data = mtk_alloc_clk_data(CLK_IMG_NR);
52 mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
53 clk_data);
55 r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
56 if (r)
57 dev_err(&pdev->dev,
58 "could not register clock provider: %s: %d\n",
59 pdev->name, r);
61 return r;
64 static struct platform_driver clk_mt2701_img_drv = {
65 .probe = clk_mt2701_img_probe,
66 .driver = {
67 .name = "clk-mt2701-img",
68 .of_match_table = of_match_clk_mt2701_img,
72 builtin_platform_driver(clk_mt2701_img_drv);