1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017 MediaTek Inc.
4 * Author: Weiyi Lu <weiyi.lu@mediatek.com>
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
13 #include <dt-bindings/clock/mt2712-clk.h>
15 static const struct mtk_gate_regs mfg_cg_regs
= {
21 #define GATE_MFG(_id, _name, _parent, _shift) { \
24 .parent_name = _parent, \
25 .regs = &mfg_cg_regs, \
27 .ops = &mtk_clk_gate_ops_setclr, \
30 static const struct mtk_gate mfg_clks
[] = {
31 GATE_MFG(CLK_MFG_BG3D
, "mfg_bg3d", "mfg_sel", 0),
34 static int clk_mt2712_mfg_probe(struct platform_device
*pdev
)
36 struct clk_onecell_data
*clk_data
;
38 struct device_node
*node
= pdev
->dev
.of_node
;
40 clk_data
= mtk_alloc_clk_data(CLK_MFG_NR_CLK
);
42 mtk_clk_register_gates(node
, mfg_clks
, ARRAY_SIZE(mfg_clks
),
45 r
= of_clk_add_provider(node
, of_clk_src_onecell_get
, clk_data
);
48 pr_err("%s(): could not register clock provider: %d\n",
54 static const struct of_device_id of_match_clk_mt2712_mfg
[] = {
55 { .compatible
= "mediatek,mt2712-mfgcfg", },
59 static struct platform_driver clk_mt2712_mfg_drv
= {
60 .probe
= clk_mt2712_mfg_probe
,
62 .name
= "clk-mt2712-mfg",
63 .of_match_table
= of_match_clk_mt2712_mfg
,
67 builtin_platform_driver(clk_mt2712_mfg_drv
);