WIP FPC-III support
[linux/fpc-iii.git] / drivers / clk / mediatek / clk-mt6779-vdec.c
blob1900da2586a19b43c24633aa5f3f67bf26dc6122
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2019 MediaTek Inc.
4 * Author: Wendell Lin <wendell.lin@mediatek.com>
5 */
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
13 #include <dt-bindings/clock/mt6779-clk.h>
15 static const struct mtk_gate_regs vdec0_cg_regs = {
16 .set_ofs = 0x0000,
17 .clr_ofs = 0x0004,
18 .sta_ofs = 0x0000,
21 static const struct mtk_gate_regs vdec1_cg_regs = {
22 .set_ofs = 0x0008,
23 .clr_ofs = 0x000c,
24 .sta_ofs = 0x0008,
27 #define GATE_VDEC0_I(_id, _name, _parent, _shift) \
28 GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \
29 &mtk_clk_gate_ops_setclr_inv)
30 #define GATE_VDEC1_I(_id, _name, _parent, _shift) \
31 GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \
32 &mtk_clk_gate_ops_setclr_inv)
34 static const struct mtk_gate vdec_clks[] = {
35 /* VDEC0 */
36 GATE_VDEC0_I(CLK_VDEC_VDEC, "vdec_cken", "vdec_sel", 0),
37 /* VDEC1 */
38 GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1_cken", "vdec_sel", 0),
41 static const struct of_device_id of_match_clk_mt6779_vdec[] = {
42 { .compatible = "mediatek,mt6779-vdecsys", },
46 static int clk_mt6779_vdec_probe(struct platform_device *pdev)
48 struct clk_onecell_data *clk_data;
49 struct device_node *node = pdev->dev.of_node;
51 clk_data = mtk_alloc_clk_data(CLK_VDEC_GCON_NR_CLK);
53 mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
54 clk_data);
56 return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
59 static struct platform_driver clk_mt6779_vdec_drv = {
60 .probe = clk_mt6779_vdec_probe,
61 .driver = {
62 .name = "clk-mt6779-vdec",
63 .of_match_table = of_match_clk_mt6779_vdec,
67 builtin_platform_driver(clk_mt6779_vdec_drv);