2 * mmp APB clock operation source file
4 * Copyright (C) 2012 Marvell
5 * Chao Xie <xiechao.mail@gmail.com>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/kernel.h>
14 #include <linux/err.h>
15 #include <linux/delay.h>
16 #include <linux/slab.h>
20 /* Common APB clock register bit definitions */
21 #define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
22 #define APBC_FNCLK (1 << 1) /* Functional Clock Enable */
23 #define APBC_RST (1 << 2) /* Reset Generation */
24 #define APBC_POWER (1 << 7) /* Reset Generation */
26 #define to_clk_apbc(hw) container_of(hw, struct clk_apbc, hw)
35 static int clk_apbc_prepare(struct clk_hw
*hw
)
37 struct clk_apbc
*apbc
= to_clk_apbc(hw
);
39 unsigned long flags
= 0;
42 * It may share same register as MUX clock,
43 * and it will impact FNCLK enable. Spinlock is needed
46 spin_lock_irqsave(apbc
->lock
, flags
);
48 data
= readl_relaxed(apbc
->base
);
49 if (apbc
->flags
& APBC_POWER_CTRL
)
52 writel_relaxed(data
, apbc
->base
);
55 spin_unlock_irqrestore(apbc
->lock
, flags
);
60 spin_lock_irqsave(apbc
->lock
, flags
);
62 data
= readl_relaxed(apbc
->base
);
64 writel_relaxed(data
, apbc
->base
);
67 spin_unlock_irqrestore(apbc
->lock
, flags
);
71 if (!(apbc
->flags
& APBC_NO_BUS_CTRL
)) {
73 spin_lock_irqsave(apbc
->lock
, flags
);
75 data
= readl_relaxed(apbc
->base
);
77 writel_relaxed(data
, apbc
->base
);
80 spin_unlock_irqrestore(apbc
->lock
, flags
);
86 static void clk_apbc_unprepare(struct clk_hw
*hw
)
88 struct clk_apbc
*apbc
= to_clk_apbc(hw
);
90 unsigned long flags
= 0;
93 spin_lock_irqsave(apbc
->lock
, flags
);
95 data
= readl_relaxed(apbc
->base
);
96 if (apbc
->flags
& APBC_POWER_CTRL
)
99 writel_relaxed(data
, apbc
->base
);
102 spin_unlock_irqrestore(apbc
->lock
, flags
);
107 spin_lock_irqsave(apbc
->lock
, flags
);
109 data
= readl_relaxed(apbc
->base
);
110 data
&= ~APBC_APBCLK
;
111 writel_relaxed(data
, apbc
->base
);
114 spin_unlock_irqrestore(apbc
->lock
, flags
);
117 static const struct clk_ops clk_apbc_ops
= {
118 .prepare
= clk_apbc_prepare
,
119 .unprepare
= clk_apbc_unprepare
,
122 struct clk
*mmp_clk_register_apbc(const char *name
, const char *parent_name
,
123 void __iomem
*base
, unsigned int delay
,
124 unsigned int apbc_flags
, spinlock_t
*lock
)
126 struct clk_apbc
*apbc
;
128 struct clk_init_data init
;
130 apbc
= kzalloc(sizeof(*apbc
), GFP_KERNEL
);
135 init
.ops
= &clk_apbc_ops
;
136 init
.flags
= CLK_SET_RATE_PARENT
;
137 init
.parent_names
= (parent_name
? &parent_name
: NULL
);
138 init
.num_parents
= (parent_name
? 1 : 0);
142 apbc
->flags
= apbc_flags
;
144 apbc
->hw
.init
= &init
;
146 clk
= clk_register(NULL
, &apbc
->hw
);