1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * POWERNV cpufreq driver for the IBM POWER processors
5 * (C) Copyright IBM 2014
7 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
10 #define pr_fmt(fmt) "powernv-cpufreq: " fmt
12 #include <linux/kernel.h>
13 #include <linux/sysfs.h>
14 #include <linux/cpumask.h>
15 #include <linux/module.h>
16 #include <linux/cpufreq.h>
17 #include <linux/smp.h>
19 #include <linux/reboot.h>
20 #include <linux/slab.h>
21 #include <linux/cpu.h>
22 #include <linux/hashtable.h>
23 #include <trace/events/power.h>
25 #include <asm/cputhreads.h>
26 #include <asm/firmware.h>
28 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
30 #include <linux/timer.h>
32 #define POWERNV_MAX_PSTATES_ORDER 8
33 #define POWERNV_MAX_PSTATES (1UL << (POWERNV_MAX_PSTATES_ORDER))
34 #define PMSR_PSAFE_ENABLE (1UL << 30)
35 #define PMSR_SPR_EM_DISABLE (1UL << 31)
36 #define MAX_PSTATE_SHIFT 32
37 #define LPSTATE_SHIFT 48
38 #define GPSTATE_SHIFT 56
40 #define MAX_RAMP_DOWN_TIME 5120
42 * On an idle system we want the global pstate to ramp-down from max value to
43 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
44 * then ramp-down rapidly later on.
46 * This gives a percentage rampdown for time elapsed in milliseconds.
47 * ramp_down_percentage = ((ms * ms) >> 18)
48 * ~= 3.8 * (sec * sec)
50 * At 0 ms ramp_down_percent = 0
51 * At 5120 ms ramp_down_percent = 100
53 #define ramp_down_percent(time) ((time * time) >> 18)
55 /* Interval after which the timer is queued to bring down global pstate */
56 #define GPSTATE_TIMER_INTERVAL 2000
59 * struct global_pstate_info - Per policy data structure to maintain history of
61 * @highest_lpstate_idx: The local pstate index from which we are
63 * @elapsed_time: Time in ms spent in ramping down from
65 * @last_sampled_time: Time from boot in ms when global pstates were
67 * @last_lpstate_idx: Last set value of local pstate and global
68 * @last_gpstate_idx: pstate in terms of cpufreq table index
69 * @timer: Is used for ramping down if cpu goes idle for
70 * a long time with global pstate held high
71 * @gpstate_lock: A spinlock to maintain synchronization between
72 * routines called by the timer handler and
73 * governer's target_index calls
74 * @policy: Associated CPUFreq policy
76 struct global_pstate_info
{
77 int highest_lpstate_idx
;
78 unsigned int elapsed_time
;
79 unsigned int last_sampled_time
;
82 spinlock_t gpstate_lock
;
83 struct timer_list timer
;
84 struct cpufreq_policy
*policy
;
87 static struct cpufreq_frequency_table powernv_freqs
[POWERNV_MAX_PSTATES
+1];
89 static DEFINE_HASHTABLE(pstate_revmap
, POWERNV_MAX_PSTATES_ORDER
);
91 * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap
92 * indexed by a function of pstate id.
94 * @pstate_id: pstate id for this entry.
96 * @cpufreq_table_idx: Index into the powernv_freqs
97 * cpufreq_frequency_table for frequency
98 * corresponding to pstate_id.
100 * @hentry: hlist_node that hooks this entry into the pstate_revmap
103 struct pstate_idx_revmap_data
{
105 unsigned int cpufreq_table_idx
;
106 struct hlist_node hentry
;
109 static bool rebooting
, throttled
, occ_reset
;
111 static const char * const throttle_reason
[] = {
114 "Processor Over Temperature",
115 "Power Supply Failure",
120 enum throttle_reason_type
{
124 POWER_SUPPLY_FAILURE
,
136 struct work_struct throttle
;
138 int throttle_sub_turbo
;
139 int reason
[OCC_MAX_REASON
];
143 static DEFINE_PER_CPU(struct chip
*, chip_info
);
147 * The set of pstates consists of contiguous integers.
148 * powernv_pstate_info stores the index of the frequency table for
149 * max, min and nominal frequencies. It also stores number of
150 * available frequencies.
152 * powernv_pstate_info.nominal indicates the index to the highest
153 * non-turbo frequency.
155 static struct powernv_pstate_info
{
158 unsigned int nominal
;
159 unsigned int nr_pstates
;
161 } powernv_pstate_info
;
163 static inline u8
extract_pstate(u64 pmsr_val
, unsigned int shift
)
165 return ((pmsr_val
>> shift
) & 0xFF);
168 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT)
169 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT)
170 #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT)
172 /* Use following functions for conversions between pstate_id and index */
175 * idx_to_pstate : Returns the pstate id corresponding to the
176 * frequency in the cpufreq frequency table
177 * powernv_freqs indexed by @i.
179 * If @i is out of bound, this will return the pstate
180 * corresponding to the nominal frequency.
182 static inline u8
idx_to_pstate(unsigned int i
)
184 if (unlikely(i
>= powernv_pstate_info
.nr_pstates
)) {
185 pr_warn_once("idx_to_pstate: index %u is out of bound\n", i
);
186 return powernv_freqs
[powernv_pstate_info
.nominal
].driver_data
;
189 return powernv_freqs
[i
].driver_data
;
193 * pstate_to_idx : Returns the index in the cpufreq frequencytable
194 * powernv_freqs for the frequency whose corresponding
195 * pstate id is @pstate.
197 * If no frequency corresponding to @pstate is found,
198 * this will return the index of the nominal
201 static unsigned int pstate_to_idx(u8 pstate
)
203 unsigned int key
= pstate
% POWERNV_MAX_PSTATES
;
204 struct pstate_idx_revmap_data
*revmap_data
;
206 hash_for_each_possible(pstate_revmap
, revmap_data
, hentry
, key
) {
207 if (revmap_data
->pstate_id
== pstate
)
208 return revmap_data
->cpufreq_table_idx
;
211 pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate
);
212 return powernv_pstate_info
.nominal
;
215 static inline void reset_gpstates(struct cpufreq_policy
*policy
)
217 struct global_pstate_info
*gpstates
= policy
->driver_data
;
219 gpstates
->highest_lpstate_idx
= 0;
220 gpstates
->elapsed_time
= 0;
221 gpstates
->last_sampled_time
= 0;
222 gpstates
->last_lpstate_idx
= 0;
223 gpstates
->last_gpstate_idx
= 0;
227 * Initialize the freq table based on data obtained
228 * from the firmware passed via device-tree
230 static int init_powernv_pstates(void)
232 struct device_node
*power_mgt
;
233 int i
, nr_pstates
= 0;
234 const __be32
*pstate_ids
, *pstate_freqs
;
235 u32 len_ids
, len_freqs
;
236 u32 pstate_min
, pstate_max
, pstate_nominal
;
237 u32 pstate_turbo
, pstate_ultra_turbo
;
240 power_mgt
= of_find_node_by_path("/ibm,opal/power-mgt");
242 pr_warn("power-mgt node not found\n");
246 if (of_property_read_u32(power_mgt
, "ibm,pstate-min", &pstate_min
)) {
247 pr_warn("ibm,pstate-min node not found\n");
251 if (of_property_read_u32(power_mgt
, "ibm,pstate-max", &pstate_max
)) {
252 pr_warn("ibm,pstate-max node not found\n");
256 if (of_property_read_u32(power_mgt
, "ibm,pstate-nominal",
258 pr_warn("ibm,pstate-nominal not found\n");
262 if (of_property_read_u32(power_mgt
, "ibm,pstate-ultra-turbo",
263 &pstate_ultra_turbo
)) {
264 powernv_pstate_info
.wof_enabled
= false;
268 if (of_property_read_u32(power_mgt
, "ibm,pstate-turbo",
270 powernv_pstate_info
.wof_enabled
= false;
274 if (pstate_turbo
== pstate_ultra_turbo
)
275 powernv_pstate_info
.wof_enabled
= false;
277 powernv_pstate_info
.wof_enabled
= true;
280 pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min
,
281 pstate_nominal
, pstate_max
);
282 pr_info("Workload Optimized Frequency is %s in the platform\n",
283 (powernv_pstate_info
.wof_enabled
) ? "enabled" : "disabled");
285 pstate_ids
= of_get_property(power_mgt
, "ibm,pstate-ids", &len_ids
);
287 pr_warn("ibm,pstate-ids not found\n");
291 pstate_freqs
= of_get_property(power_mgt
, "ibm,pstate-frequencies-mhz",
294 pr_warn("ibm,pstate-frequencies-mhz not found\n");
298 if (len_ids
!= len_freqs
) {
299 pr_warn("Entries in ibm,pstate-ids and "
300 "ibm,pstate-frequencies-mhz does not match\n");
303 nr_pstates
= min(len_ids
, len_freqs
) / sizeof(u32
);
305 pr_warn("No PStates found\n");
309 powernv_pstate_info
.nr_pstates
= nr_pstates
;
310 pr_debug("NR PStates %d\n", nr_pstates
);
312 for (i
= 0; i
< nr_pstates
; i
++) {
313 u32 id
= be32_to_cpu(pstate_ids
[i
]);
314 u32 freq
= be32_to_cpu(pstate_freqs
[i
]);
315 struct pstate_idx_revmap_data
*revmap_data
;
318 pr_debug("PState id %d freq %d MHz\n", id
, freq
);
319 powernv_freqs
[i
].frequency
= freq
* 1000; /* kHz */
320 powernv_freqs
[i
].driver_data
= id
& 0xFF;
322 revmap_data
= kmalloc(sizeof(*revmap_data
), GFP_KERNEL
);
328 revmap_data
->pstate_id
= id
& 0xFF;
329 revmap_data
->cpufreq_table_idx
= i
;
330 key
= (revmap_data
->pstate_id
) % POWERNV_MAX_PSTATES
;
331 hash_add(pstate_revmap
, &revmap_data
->hentry
, key
);
333 if (id
== pstate_max
)
334 powernv_pstate_info
.max
= i
;
335 if (id
== pstate_nominal
)
336 powernv_pstate_info
.nominal
= i
;
337 if (id
== pstate_min
)
338 powernv_pstate_info
.min
= i
;
340 if (powernv_pstate_info
.wof_enabled
&& id
== pstate_turbo
) {
343 for (j
= i
- 1; j
>= (int)powernv_pstate_info
.max
; j
--)
344 powernv_freqs
[j
].flags
= CPUFREQ_BOOST_FREQ
;
348 /* End of list marker entry */
349 powernv_freqs
[i
].frequency
= CPUFREQ_TABLE_END
;
351 of_node_put(power_mgt
);
354 of_node_put(power_mgt
);
358 /* Returns the CPU frequency corresponding to the pstate_id. */
359 static unsigned int pstate_id_to_freq(u8 pstate_id
)
363 i
= pstate_to_idx(pstate_id
);
364 if (i
>= powernv_pstate_info
.nr_pstates
|| i
< 0) {
365 pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n",
366 pstate_id
, idx_to_pstate(powernv_pstate_info
.nominal
));
367 i
= powernv_pstate_info
.nominal
;
370 return powernv_freqs
[i
].frequency
;
374 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
377 static ssize_t
cpuinfo_nominal_freq_show(struct cpufreq_policy
*policy
,
380 return sprintf(buf
, "%u\n",
381 powernv_freqs
[powernv_pstate_info
.nominal
].frequency
);
384 static struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq
=
385 __ATTR_RO(cpuinfo_nominal_freq
);
387 #define SCALING_BOOST_FREQS_ATTR_INDEX 2
389 static struct freq_attr
*powernv_cpu_freq_attr
[] = {
390 &cpufreq_freq_attr_scaling_available_freqs
,
391 &cpufreq_freq_attr_cpuinfo_nominal_freq
,
392 &cpufreq_freq_attr_scaling_boost_freqs
,
396 #define throttle_attr(name, member) \
397 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \
399 struct chip *chip = per_cpu(chip_info, policy->cpu); \
401 return sprintf(buf, "%u\n", chip->member); \
404 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \
406 throttle_attr(unthrottle, reason[NO_THROTTLE]);
407 throttle_attr(powercap
, reason
[POWERCAP
]);
408 throttle_attr(overtemp
, reason
[CPU_OVERTEMP
]);
409 throttle_attr(supply_fault
, reason
[POWER_SUPPLY_FAILURE
]);
410 throttle_attr(overcurrent
, reason
[OVERCURRENT
]);
411 throttle_attr(occ_reset
, reason
[OCC_RESET_THROTTLE
]);
412 throttle_attr(turbo_stat
, throttle_turbo
);
413 throttle_attr(sub_turbo_stat
, throttle_sub_turbo
);
415 static struct attribute
*throttle_attrs
[] = {
416 &throttle_attr_unthrottle
.attr
,
417 &throttle_attr_powercap
.attr
,
418 &throttle_attr_overtemp
.attr
,
419 &throttle_attr_supply_fault
.attr
,
420 &throttle_attr_overcurrent
.attr
,
421 &throttle_attr_occ_reset
.attr
,
422 &throttle_attr_turbo_stat
.attr
,
423 &throttle_attr_sub_turbo_stat
.attr
,
427 static const struct attribute_group throttle_attr_grp
= {
428 .name
= "throttle_stats",
429 .attrs
= throttle_attrs
,
432 /* Helper routines */
434 /* Access helpers to power mgt SPR */
436 static inline unsigned long get_pmspr(unsigned long sprn
)
440 return mfspr(SPRN_PMCR
);
443 return mfspr(SPRN_PMICR
);
446 return mfspr(SPRN_PMSR
);
451 static inline void set_pmspr(unsigned long sprn
, unsigned long val
)
455 mtspr(SPRN_PMCR
, val
);
459 mtspr(SPRN_PMICR
, val
);
466 * Use objects of this type to query/update
467 * pstates on a remote CPU via smp_call_function.
469 struct powernv_smp_call_data
{
476 * powernv_read_cpu_freq: Reads the current frequency on this CPU.
478 * Called via smp_call_function.
480 * Note: The caller of the smp_call_function should pass an argument of
481 * the type 'struct powernv_smp_call_data *' along with this function.
483 * The current frequency on this CPU will be returned via
484 * ((struct powernv_smp_call_data *)arg)->freq;
486 static void powernv_read_cpu_freq(void *arg
)
488 unsigned long pmspr_val
;
489 struct powernv_smp_call_data
*freq_data
= arg
;
491 pmspr_val
= get_pmspr(SPRN_PMSR
);
492 freq_data
->pstate_id
= extract_local_pstate(pmspr_val
);
493 freq_data
->freq
= pstate_id_to_freq(freq_data
->pstate_id
);
495 pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n",
496 raw_smp_processor_id(), pmspr_val
, freq_data
->pstate_id
,
501 * powernv_cpufreq_get: Returns the CPU frequency as reported by the
502 * firmware for CPU 'cpu'. This value is reported through the sysfs
503 * file cpuinfo_cur_freq.
505 static unsigned int powernv_cpufreq_get(unsigned int cpu
)
507 struct powernv_smp_call_data freq_data
;
509 smp_call_function_any(cpu_sibling_mask(cpu
), powernv_read_cpu_freq
,
512 return freq_data
.freq
;
516 * set_pstate: Sets the pstate on this CPU.
518 * This is called via an smp_call_function.
520 * The caller must ensure that freq_data is of the type
521 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
522 * on this CPU should be present in freq_data->pstate_id.
524 static void set_pstate(void *data
)
527 struct powernv_smp_call_data
*freq_data
= data
;
528 unsigned long pstate_ul
= freq_data
->pstate_id
;
529 unsigned long gpstate_ul
= freq_data
->gpstate_id
;
531 val
= get_pmspr(SPRN_PMCR
);
532 val
= val
& 0x0000FFFFFFFFFFFFULL
;
534 pstate_ul
= pstate_ul
& 0xFF;
535 gpstate_ul
= gpstate_ul
& 0xFF;
537 /* Set both global(bits 56..63) and local(bits 48..55) PStates */
538 val
= val
| (gpstate_ul
<< 56) | (pstate_ul
<< 48);
540 pr_debug("Setting cpu %d pmcr to %016lX\n",
541 raw_smp_processor_id(), val
);
542 set_pmspr(SPRN_PMCR
, val
);
546 * get_nominal_index: Returns the index corresponding to the nominal
547 * pstate in the cpufreq table
549 static inline unsigned int get_nominal_index(void)
551 return powernv_pstate_info
.nominal
;
554 static void powernv_cpufreq_throttle_check(void *data
)
557 unsigned int cpu
= smp_processor_id();
560 unsigned int pmsr_pmax_idx
;
562 pmsr
= get_pmspr(SPRN_PMSR
);
563 chip
= this_cpu_read(chip_info
);
565 /* Check for Pmax Capping */
566 pmsr_pmax
= extract_max_pstate(pmsr
);
567 pmsr_pmax_idx
= pstate_to_idx(pmsr_pmax
);
568 if (pmsr_pmax_idx
!= powernv_pstate_info
.max
) {
571 chip
->throttled
= true;
572 if (pmsr_pmax_idx
> powernv_pstate_info
.nominal
) {
573 pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n",
574 cpu
, chip
->id
, pmsr_pmax
,
575 idx_to_pstate(powernv_pstate_info
.nominal
));
576 chip
->throttle_sub_turbo
++;
578 chip
->throttle_turbo
++;
580 trace_powernv_throttle(chip
->id
,
581 throttle_reason
[chip
->throttle_reason
],
583 } else if (chip
->throttled
) {
584 chip
->throttled
= false;
585 trace_powernv_throttle(chip
->id
,
586 throttle_reason
[chip
->throttle_reason
],
590 /* Check if Psafe_mode_active is set in PMSR. */
592 if (pmsr
& PMSR_PSAFE_ENABLE
) {
594 pr_info("Pstate set to safe frequency\n");
597 /* Check if SPR_EM_DISABLE is set in PMSR */
598 if (pmsr
& PMSR_SPR_EM_DISABLE
) {
600 pr_info("Frequency Control disabled from OS\n");
604 pr_info("PMSR = %16lx\n", pmsr
);
605 pr_warn("CPU Frequency could be throttled\n");
610 * calc_global_pstate - Calculate global pstate
611 * @elapsed_time: Elapsed time in milliseconds
612 * @local_pstate_idx: New local pstate
613 * @highest_lpstate_idx: pstate from which its ramping down
615 * Finds the appropriate global pstate based on the pstate from which its
616 * ramping down and the time elapsed in ramping down. It follows a quadratic
617 * equation which ensures that it reaches ramping down to pmin in 5sec.
619 static inline int calc_global_pstate(unsigned int elapsed_time
,
620 int highest_lpstate_idx
,
621 int local_pstate_idx
)
626 * Using ramp_down_percent we get the percentage of rampdown
627 * that we are expecting to be dropping. Difference between
628 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
629 * number of how many pstates we will drop eventually by the end of
630 * 5 seconds, then just scale it get the number pstates to be dropped.
632 index_diff
= ((int)ramp_down_percent(elapsed_time
) *
633 (powernv_pstate_info
.min
- highest_lpstate_idx
)) / 100;
635 /* Ensure that global pstate is >= to local pstate */
636 if (highest_lpstate_idx
+ index_diff
>= local_pstate_idx
)
637 return local_pstate_idx
;
639 return highest_lpstate_idx
+ index_diff
;
642 static inline void queue_gpstate_timer(struct global_pstate_info
*gpstates
)
644 unsigned int timer_interval
;
647 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
648 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
649 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
650 * seconds of ramp down time.
652 if ((gpstates
->elapsed_time
+ GPSTATE_TIMER_INTERVAL
)
653 > MAX_RAMP_DOWN_TIME
)
654 timer_interval
= MAX_RAMP_DOWN_TIME
- gpstates
->elapsed_time
;
656 timer_interval
= GPSTATE_TIMER_INTERVAL
;
658 mod_timer(&gpstates
->timer
, jiffies
+ msecs_to_jiffies(timer_interval
));
662 * gpstate_timer_handler
664 * @t: Timer context used to fetch global pstate info struct
666 * This handler brings down the global pstate closer to the local pstate
667 * according quadratic equation. Queues a new timer if it is still not equal
670 static void gpstate_timer_handler(struct timer_list
*t
)
672 struct global_pstate_info
*gpstates
= from_timer(gpstates
, t
, timer
);
673 struct cpufreq_policy
*policy
= gpstates
->policy
;
674 int gpstate_idx
, lpstate_idx
;
676 unsigned int time_diff
= jiffies_to_msecs(jiffies
)
677 - gpstates
->last_sampled_time
;
678 struct powernv_smp_call_data freq_data
;
680 if (!spin_trylock(&gpstates
->gpstate_lock
))
683 * If the timer has migrated to the different cpu then bring
684 * it back to one of the policy->cpus
686 if (!cpumask_test_cpu(raw_smp_processor_id(), policy
->cpus
)) {
687 gpstates
->timer
.expires
= jiffies
+ msecs_to_jiffies(1);
688 add_timer_on(&gpstates
->timer
, cpumask_first(policy
->cpus
));
689 spin_unlock(&gpstates
->gpstate_lock
);
694 * If PMCR was last updated was using fast_swtich then
695 * We may have wrong in gpstate->last_lpstate_idx
696 * value. Hence, read from PMCR to get correct data.
698 val
= get_pmspr(SPRN_PMCR
);
699 freq_data
.gpstate_id
= extract_global_pstate(val
);
700 freq_data
.pstate_id
= extract_local_pstate(val
);
701 if (freq_data
.gpstate_id
== freq_data
.pstate_id
) {
702 reset_gpstates(policy
);
703 spin_unlock(&gpstates
->gpstate_lock
);
707 gpstates
->last_sampled_time
+= time_diff
;
708 gpstates
->elapsed_time
+= time_diff
;
710 if (gpstates
->elapsed_time
> MAX_RAMP_DOWN_TIME
) {
711 gpstate_idx
= pstate_to_idx(freq_data
.pstate_id
);
712 lpstate_idx
= gpstate_idx
;
713 reset_gpstates(policy
);
714 gpstates
->highest_lpstate_idx
= gpstate_idx
;
716 lpstate_idx
= pstate_to_idx(freq_data
.pstate_id
);
717 gpstate_idx
= calc_global_pstate(gpstates
->elapsed_time
,
718 gpstates
->highest_lpstate_idx
,
721 freq_data
.gpstate_id
= idx_to_pstate(gpstate_idx
);
722 gpstates
->last_gpstate_idx
= gpstate_idx
;
723 gpstates
->last_lpstate_idx
= lpstate_idx
;
725 * If local pstate is equal to global pstate, rampdown is over
726 * So timer is not required to be queued.
728 if (gpstate_idx
!= gpstates
->last_lpstate_idx
)
729 queue_gpstate_timer(gpstates
);
731 set_pstate(&freq_data
);
732 spin_unlock(&gpstates
->gpstate_lock
);
736 * powernv_cpufreq_target_index: Sets the frequency corresponding to
737 * the cpufreq table entry indexed by new_index on the cpus in the
740 static int powernv_cpufreq_target_index(struct cpufreq_policy
*policy
,
741 unsigned int new_index
)
743 struct powernv_smp_call_data freq_data
;
744 unsigned int cur_msec
, gpstate_idx
;
745 struct global_pstate_info
*gpstates
= policy
->driver_data
;
747 if (unlikely(rebooting
) && new_index
!= get_nominal_index())
751 /* we don't want to be preempted while
752 * checking if the CPU frequency has been throttled
755 powernv_cpufreq_throttle_check(NULL
);
759 cur_msec
= jiffies_to_msecs(get_jiffies_64());
761 freq_data
.pstate_id
= idx_to_pstate(new_index
);
763 freq_data
.gpstate_id
= freq_data
.pstate_id
;
767 spin_lock(&gpstates
->gpstate_lock
);
769 if (!gpstates
->last_sampled_time
) {
770 gpstate_idx
= new_index
;
771 gpstates
->highest_lpstate_idx
= new_index
;
775 if (gpstates
->last_gpstate_idx
< new_index
) {
776 gpstates
->elapsed_time
+= cur_msec
-
777 gpstates
->last_sampled_time
;
780 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
781 * we should be resetting all global pstate related data. Set it
782 * equal to local pstate to start fresh.
784 if (gpstates
->elapsed_time
> MAX_RAMP_DOWN_TIME
) {
785 reset_gpstates(policy
);
786 gpstates
->highest_lpstate_idx
= new_index
;
787 gpstate_idx
= new_index
;
789 /* Elaspsed_time is less than 5 seconds, continue to rampdown */
790 gpstate_idx
= calc_global_pstate(gpstates
->elapsed_time
,
791 gpstates
->highest_lpstate_idx
,
795 reset_gpstates(policy
);
796 gpstates
->highest_lpstate_idx
= new_index
;
797 gpstate_idx
= new_index
;
801 * If local pstate is equal to global pstate, rampdown is over
802 * So timer is not required to be queued.
804 if (gpstate_idx
!= new_index
)
805 queue_gpstate_timer(gpstates
);
807 del_timer_sync(&gpstates
->timer
);
810 freq_data
.gpstate_id
= idx_to_pstate(gpstate_idx
);
811 gpstates
->last_sampled_time
= cur_msec
;
812 gpstates
->last_gpstate_idx
= gpstate_idx
;
813 gpstates
->last_lpstate_idx
= new_index
;
815 spin_unlock(&gpstates
->gpstate_lock
);
819 * Use smp_call_function to send IPI and execute the
820 * mtspr on target CPU. We could do that without IPI
821 * if current CPU is within policy->cpus (core)
823 smp_call_function_any(policy
->cpus
, set_pstate
, &freq_data
, 1);
827 static int powernv_cpufreq_cpu_init(struct cpufreq_policy
*policy
)
830 struct kernfs_node
*kn
;
831 struct global_pstate_info
*gpstates
;
833 base
= cpu_first_thread_sibling(policy
->cpu
);
835 for (i
= 0; i
< threads_per_core
; i
++)
836 cpumask_set_cpu(base
+ i
, policy
->cpus
);
838 kn
= kernfs_find_and_get(policy
->kobj
.sd
, throttle_attr_grp
.name
);
842 ret
= sysfs_create_group(&policy
->kobj
, &throttle_attr_grp
);
844 pr_info("Failed to create throttle stats directory for cpu %d\n",
852 policy
->freq_table
= powernv_freqs
;
853 policy
->fast_switch_possible
= true;
855 if (pvr_version_is(PVR_POWER9
))
858 /* Initialise Gpstate ramp-down timer only on POWER8 */
859 gpstates
= kzalloc(sizeof(*gpstates
), GFP_KERNEL
);
863 policy
->driver_data
= gpstates
;
865 /* initialize timer */
866 gpstates
->policy
= policy
;
867 timer_setup(&gpstates
->timer
, gpstate_timer_handler
,
868 TIMER_PINNED
| TIMER_DEFERRABLE
);
869 gpstates
->timer
.expires
= jiffies
+
870 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL
);
871 spin_lock_init(&gpstates
->gpstate_lock
);
876 static int powernv_cpufreq_cpu_exit(struct cpufreq_policy
*policy
)
878 /* timer is deleted in cpufreq_cpu_stop() */
879 kfree(policy
->driver_data
);
884 static int powernv_cpufreq_reboot_notifier(struct notifier_block
*nb
,
885 unsigned long action
, void *unused
)
888 struct cpufreq_policy
*cpu_policy
;
891 for_each_online_cpu(cpu
) {
892 cpu_policy
= cpufreq_cpu_get(cpu
);
895 powernv_cpufreq_target_index(cpu_policy
, get_nominal_index());
896 cpufreq_cpu_put(cpu_policy
);
902 static struct notifier_block powernv_cpufreq_reboot_nb
= {
903 .notifier_call
= powernv_cpufreq_reboot_notifier
,
906 static void powernv_cpufreq_work_fn(struct work_struct
*work
)
908 struct chip
*chip
= container_of(work
, struct chip
, throttle
);
909 struct cpufreq_policy
*policy
;
914 cpumask_and(&mask
, &chip
->mask
, cpu_online_mask
);
915 smp_call_function_any(&mask
,
916 powernv_cpufreq_throttle_check
, NULL
, 0);
921 chip
->restore
= false;
922 for_each_cpu(cpu
, &mask
) {
925 policy
= cpufreq_cpu_get(cpu
);
928 index
= cpufreq_table_find_index_c(policy
, policy
->cur
);
929 powernv_cpufreq_target_index(policy
, index
);
930 cpumask_andnot(&mask
, &mask
, policy
->cpus
);
931 cpufreq_cpu_put(policy
);
937 static int powernv_cpufreq_occ_msg(struct notifier_block
*nb
,
938 unsigned long msg_type
, void *_msg
)
940 struct opal_msg
*msg
= _msg
;
941 struct opal_occ_msg omsg
;
944 if (msg_type
!= OPAL_MSG_OCC
)
947 omsg
.type
= be64_to_cpu(msg
->params
[0]);
952 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
954 * powernv_cpufreq_throttle_check() is called in
955 * target() callback which can detect the throttle state
956 * for governors like ondemand.
957 * But static governors will not call target() often thus
958 * report throttling here.
962 pr_warn("CPU frequency is throttled for duration\n");
967 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
970 omsg
.chip
= be64_to_cpu(msg
->params
[1]);
971 omsg
.throttle_status
= be64_to_cpu(msg
->params
[2]);
976 pr_info("OCC Active, CPU frequency is no longer throttled\n");
978 for (i
= 0; i
< nr_chips
; i
++) {
979 chips
[i
].restore
= true;
980 schedule_work(&chips
[i
].throttle
);
986 for (i
= 0; i
< nr_chips
; i
++)
987 if (chips
[i
].id
== omsg
.chip
)
990 if (omsg
.throttle_status
>= 0 &&
991 omsg
.throttle_status
<= OCC_MAX_THROTTLE_STATUS
) {
992 chips
[i
].throttle_reason
= omsg
.throttle_status
;
993 chips
[i
].reason
[omsg
.throttle_status
]++;
996 if (!omsg
.throttle_status
)
997 chips
[i
].restore
= true;
999 schedule_work(&chips
[i
].throttle
);
1004 static struct notifier_block powernv_cpufreq_opal_nb
= {
1005 .notifier_call
= powernv_cpufreq_occ_msg
,
1010 static void powernv_cpufreq_stop_cpu(struct cpufreq_policy
*policy
)
1012 struct powernv_smp_call_data freq_data
;
1013 struct global_pstate_info
*gpstates
= policy
->driver_data
;
1015 freq_data
.pstate_id
= idx_to_pstate(powernv_pstate_info
.min
);
1016 freq_data
.gpstate_id
= idx_to_pstate(powernv_pstate_info
.min
);
1017 smp_call_function_single(policy
->cpu
, set_pstate
, &freq_data
, 1);
1019 del_timer_sync(&gpstates
->timer
);
1022 static unsigned int powernv_fast_switch(struct cpufreq_policy
*policy
,
1023 unsigned int target_freq
)
1026 struct powernv_smp_call_data freq_data
;
1028 index
= cpufreq_table_find_index_dl(policy
, target_freq
);
1029 freq_data
.pstate_id
= powernv_freqs
[index
].driver_data
;
1030 freq_data
.gpstate_id
= powernv_freqs
[index
].driver_data
;
1031 set_pstate(&freq_data
);
1033 return powernv_freqs
[index
].frequency
;
1036 static struct cpufreq_driver powernv_cpufreq_driver
= {
1037 .name
= "powernv-cpufreq",
1038 .flags
= CPUFREQ_CONST_LOOPS
,
1039 .init
= powernv_cpufreq_cpu_init
,
1040 .exit
= powernv_cpufreq_cpu_exit
,
1041 .verify
= cpufreq_generic_frequency_table_verify
,
1042 .target_index
= powernv_cpufreq_target_index
,
1043 .fast_switch
= powernv_fast_switch
,
1044 .get
= powernv_cpufreq_get
,
1045 .stop_cpu
= powernv_cpufreq_stop_cpu
,
1046 .attr
= powernv_cpu_freq_attr
,
1049 static int init_chip_info(void)
1052 unsigned int cpu
, i
;
1053 unsigned int prev_chip_id
= UINT_MAX
;
1056 chip
= kcalloc(num_possible_cpus(), sizeof(*chip
), GFP_KERNEL
);
1060 for_each_possible_cpu(cpu
) {
1061 unsigned int id
= cpu_to_chip_id(cpu
);
1063 if (prev_chip_id
!= id
) {
1065 chip
[nr_chips
++] = id
;
1069 chips
= kcalloc(nr_chips
, sizeof(struct chip
), GFP_KERNEL
);
1072 goto free_and_return
;
1075 for (i
= 0; i
< nr_chips
; i
++) {
1076 chips
[i
].id
= chip
[i
];
1077 cpumask_copy(&chips
[i
].mask
, cpumask_of_node(chip
[i
]));
1078 INIT_WORK(&chips
[i
].throttle
, powernv_cpufreq_work_fn
);
1079 for_each_cpu(cpu
, &chips
[i
].mask
)
1080 per_cpu(chip_info
, cpu
) = &chips
[i
];
1088 static inline void clean_chip_info(void)
1092 /* flush any pending work items */
1094 for (i
= 0; i
< nr_chips
; i
++)
1095 cancel_work_sync(&chips
[i
].throttle
);
1099 static inline void unregister_all_notifiers(void)
1101 opal_message_notifier_unregister(OPAL_MSG_OCC
,
1102 &powernv_cpufreq_opal_nb
);
1103 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb
);
1106 static int __init
powernv_cpufreq_init(void)
1110 /* Don't probe on pseries (guest) platforms */
1111 if (!firmware_has_feature(FW_FEATURE_OPAL
))
1114 /* Discover pstates from device tree and init */
1115 rc
= init_powernv_pstates();
1119 /* Populate chip info */
1120 rc
= init_chip_info();
1124 if (powernv_pstate_info
.wof_enabled
)
1125 powernv_cpufreq_driver
.boost_enabled
= true;
1127 powernv_cpu_freq_attr
[SCALING_BOOST_FREQS_ATTR_INDEX
] = NULL
;
1129 rc
= cpufreq_register_driver(&powernv_cpufreq_driver
);
1131 pr_info("Failed to register the cpufreq driver (%d)\n", rc
);
1135 if (powernv_pstate_info
.wof_enabled
)
1136 cpufreq_enable_boost_support();
1138 register_reboot_notifier(&powernv_cpufreq_reboot_nb
);
1139 opal_message_notifier_register(OPAL_MSG_OCC
, &powernv_cpufreq_opal_nb
);
1145 pr_info("Platform driver disabled. System does not support PState control\n");
1148 module_init(powernv_cpufreq_init
);
1150 static void __exit
powernv_cpufreq_exit(void)
1152 cpufreq_unregister_driver(&powernv_cpufreq_driver
);
1153 unregister_all_notifiers();
1156 module_exit(powernv_cpufreq_exit
);
1158 MODULE_LICENSE("GPL");
1159 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");