1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sun4i-ss.h - hardware cryptographic accelerator for Allwinner A20 SoC
5 * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com>
7 * Support AES cipher with 128,192,256 bits keysize.
8 * Support MD5 and SHA1 hash algorithms.
11 * You could find the datasheet in Documentation/arm/sunxi.rst
14 #include <linux/clk.h>
15 #include <linux/crypto.h>
17 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/reset.h>
21 #include <crypto/scatterwalk.h>
22 #include <linux/scatterlist.h>
23 #include <linux/interrupt.h>
24 #include <linux/delay.h>
25 #include <linux/pm_runtime.h>
26 #include <crypto/md5.h>
27 #include <crypto/skcipher.h>
28 #include <crypto/sha1.h>
29 #include <crypto/hash.h>
30 #include <crypto/internal/hash.h>
31 #include <crypto/internal/skcipher.h>
32 #include <crypto/aes.h>
33 #include <crypto/internal/des.h>
34 #include <crypto/internal/rng.h>
35 #include <crypto/rng.h>
60 #define SS_RXFIFO 0x200
61 #define SS_TXFIFO 0x204
63 /* SS_CTL configuration values */
65 /* PRNG generator mode - bit 15 */
66 #define SS_PRNG_ONESHOT (0 << 15)
67 #define SS_PRNG_CONTINUE (1 << 15)
69 /* IV mode for hash */
70 #define SS_IV_ARBITRARY (1 << 14)
72 /* SS operation mode - bits 12-13 */
73 #define SS_ECB (0 << 12)
74 #define SS_CBC (1 << 12)
75 #define SS_CTS (3 << 12)
77 /* Counter width for CNT mode - bits 10-11 */
78 #define SS_CNT_16BITS (0 << 10)
79 #define SS_CNT_32BITS (1 << 10)
80 #define SS_CNT_64BITS (2 << 10)
82 /* Key size for AES - bits 8-9 */
83 #define SS_AES_128BITS (0 << 8)
84 #define SS_AES_192BITS (1 << 8)
85 #define SS_AES_256BITS (2 << 8)
87 /* Operation direction - bit 7 */
88 #define SS_ENCRYPTION (0 << 7)
89 #define SS_DECRYPTION (1 << 7)
91 /* SS Method - bits 4-6 */
92 #define SS_OP_AES (0 << 4)
93 #define SS_OP_DES (1 << 4)
94 #define SS_OP_3DES (2 << 4)
95 #define SS_OP_SHA1 (3 << 4)
96 #define SS_OP_MD5 (4 << 4)
97 #define SS_OP_PRNG (5 << 4)
99 /* Data end bit - bit 2 */
100 #define SS_DATA_END (1 << 2)
102 /* PRNG start bit - bit 1 */
103 #define SS_PRNG_START (1 << 1)
105 /* SS Enable bit - bit 0 */
106 #define SS_DISABLED (0 << 0)
107 #define SS_ENABLED (1 << 0)
109 /* SS_FCSR configuration values */
110 /* RX FIFO status - bit 30 */
111 #define SS_RXFIFO_FREE (1 << 30)
113 /* RX FIFO empty spaces - bits 24-29 */
114 #define SS_RXFIFO_SPACES(val) (((val) >> 24) & 0x3f)
116 /* TX FIFO status - bit 22 */
117 #define SS_TXFIFO_AVAILABLE (1 << 22)
119 /* TX FIFO available spaces - bits 16-21 */
120 #define SS_TXFIFO_SPACES(val) (((val) >> 16) & 0x3f)
123 #define SS_RX_DEFAULT SS_RX_MAX
126 #define SS_RXFIFO_EMP_INT_PENDING (1 << 10)
127 #define SS_TXFIFO_AVA_INT_PENDING (1 << 8)
128 #define SS_RXFIFO_EMP_INT_ENABLE (1 << 2)
129 #define SS_TXFIFO_AVA_INT_ENABLE (1 << 0)
131 #define SS_SEED_LEN 192
132 #define SS_DATA_LEN 160
135 * struct ss_variant - Describe SS hardware variant
136 * @sha1_in_be: The SHA1 digest is given by SS in BE, and so need to be inverted.
142 struct sun4i_ss_ctx
{
143 const struct ss_variant
*variant
;
148 struct reset_control
*reset
;
150 struct resource
*res
;
151 spinlock_t slock
; /* control the use of the device */
152 #ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG
153 u32 seed
[SS_SEED_LEN
/ BITS_PER_LONG
];
157 struct sun4i_ss_alg_template
{
161 struct skcipher_alg crypto
;
162 struct ahash_alg hash
;
165 struct sun4i_ss_ctx
*ss
;
168 struct sun4i_tfm_ctx
{
169 u32 key
[AES_MAX_KEY_SIZE
/ 4];/* divided by sizeof(u32) */
172 struct sun4i_ss_ctx
*ss
;
173 struct crypto_skcipher
*fallback_tfm
;
176 struct sun4i_cipher_req_ctx
{
178 struct skcipher_request fallback_req
; // keep at the end
181 struct sun4i_req_ctx
{
183 u64 byte_count
; /* number of bytes "uploaded" to the device */
184 u32 hash
[5]; /* for storing SS_IVx register */
190 int sun4i_hash_crainit(struct crypto_tfm
*tfm
);
191 void sun4i_hash_craexit(struct crypto_tfm
*tfm
);
192 int sun4i_hash_init(struct ahash_request
*areq
);
193 int sun4i_hash_update(struct ahash_request
*areq
);
194 int sun4i_hash_final(struct ahash_request
*areq
);
195 int sun4i_hash_finup(struct ahash_request
*areq
);
196 int sun4i_hash_digest(struct ahash_request
*areq
);
197 int sun4i_hash_export_md5(struct ahash_request
*areq
, void *out
);
198 int sun4i_hash_import_md5(struct ahash_request
*areq
, const void *in
);
199 int sun4i_hash_export_sha1(struct ahash_request
*areq
, void *out
);
200 int sun4i_hash_import_sha1(struct ahash_request
*areq
, const void *in
);
202 int sun4i_ss_cbc_aes_encrypt(struct skcipher_request
*areq
);
203 int sun4i_ss_cbc_aes_decrypt(struct skcipher_request
*areq
);
204 int sun4i_ss_ecb_aes_encrypt(struct skcipher_request
*areq
);
205 int sun4i_ss_ecb_aes_decrypt(struct skcipher_request
*areq
);
207 int sun4i_ss_cbc_des_encrypt(struct skcipher_request
*areq
);
208 int sun4i_ss_cbc_des_decrypt(struct skcipher_request
*areq
);
209 int sun4i_ss_ecb_des_encrypt(struct skcipher_request
*areq
);
210 int sun4i_ss_ecb_des_decrypt(struct skcipher_request
*areq
);
212 int sun4i_ss_cbc_des3_encrypt(struct skcipher_request
*areq
);
213 int sun4i_ss_cbc_des3_decrypt(struct skcipher_request
*areq
);
214 int sun4i_ss_ecb_des3_encrypt(struct skcipher_request
*areq
);
215 int sun4i_ss_ecb_des3_decrypt(struct skcipher_request
*areq
);
217 int sun4i_ss_cipher_init(struct crypto_tfm
*tfm
);
218 void sun4i_ss_cipher_exit(struct crypto_tfm
*tfm
);
219 int sun4i_ss_aes_setkey(struct crypto_skcipher
*tfm
, const u8
*key
,
220 unsigned int keylen
);
221 int sun4i_ss_des_setkey(struct crypto_skcipher
*tfm
, const u8
*key
,
222 unsigned int keylen
);
223 int sun4i_ss_des3_setkey(struct crypto_skcipher
*tfm
, const u8
*key
,
224 unsigned int keylen
);
225 int sun4i_ss_prng_generate(struct crypto_rng
*tfm
, const u8
*src
,
226 unsigned int slen
, u8
*dst
, unsigned int dlen
);
227 int sun4i_ss_prng_seed(struct crypto_rng
*tfm
, const u8
*seed
, unsigned int slen
);