1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2 /* Copyright(c) 2015 - 2020 Intel Corporation */
3 #include <adf_accel_devices.h>
4 #include <adf_pf2vf_msg.h>
5 #include <adf_common_drv.h>
6 #include <adf_gen2_hw_data.h>
7 #include "adf_c62xvf_hw_data.h"
9 static struct adf_hw_device_class c62xiov_class
= {
10 .name
= ADF_C62XVF_DEVICE_NAME
,
15 static u32
get_accel_mask(struct adf_hw_device_data
*self
)
17 return ADF_C62XIOV_ACCELERATORS_MASK
;
20 static u32
get_ae_mask(struct adf_hw_device_data
*self
)
22 return ADF_C62XIOV_ACCELENGINES_MASK
;
25 static u32
get_num_accels(struct adf_hw_device_data
*self
)
27 return ADF_C62XIOV_MAX_ACCELERATORS
;
30 static u32
get_num_aes(struct adf_hw_device_data
*self
)
32 return ADF_C62XIOV_MAX_ACCELENGINES
;
35 static u32
get_misc_bar_id(struct adf_hw_device_data
*self
)
37 return ADF_C62XIOV_PMISC_BAR
;
40 static u32
get_etr_bar_id(struct adf_hw_device_data
*self
)
42 return ADF_C62XIOV_ETR_BAR
;
45 static enum dev_sku_info
get_sku(struct adf_hw_device_data
*self
)
50 static u32
get_pf2vf_offset(u32 i
)
52 return ADF_C62XIOV_PF2VF_OFFSET
;
55 static u32
get_vintmsk_offset(u32 i
)
57 return ADF_C62XIOV_VINTMSK_OFFSET
;
60 static int adf_vf_int_noop(struct adf_accel_dev
*accel_dev
)
65 static void adf_vf_void_noop(struct adf_accel_dev
*accel_dev
)
69 void adf_init_hw_data_c62xiov(struct adf_hw_device_data
*hw_data
)
71 hw_data
->dev_class
= &c62xiov_class
;
72 hw_data
->num_banks
= ADF_C62XIOV_ETR_MAX_BANKS
;
73 hw_data
->num_rings_per_bank
= ADF_ETR_MAX_RINGS_PER_BANK
;
74 hw_data
->num_accel
= ADF_C62XIOV_MAX_ACCELERATORS
;
75 hw_data
->num_logical_accel
= 1;
76 hw_data
->num_engines
= ADF_C62XIOV_MAX_ACCELENGINES
;
77 hw_data
->tx_rx_gap
= ADF_C62XIOV_RX_RINGS_OFFSET
;
78 hw_data
->tx_rings_mask
= ADF_C62XIOV_TX_RINGS_MASK
;
79 hw_data
->alloc_irq
= adf_vf_isr_resource_alloc
;
80 hw_data
->free_irq
= adf_vf_isr_resource_free
;
81 hw_data
->enable_error_correction
= adf_vf_void_noop
;
82 hw_data
->init_admin_comms
= adf_vf_int_noop
;
83 hw_data
->exit_admin_comms
= adf_vf_void_noop
;
84 hw_data
->send_admin_init
= adf_vf2pf_init
;
85 hw_data
->init_arb
= adf_vf_int_noop
;
86 hw_data
->exit_arb
= adf_vf_void_noop
;
87 hw_data
->disable_iov
= adf_vf2pf_shutdown
;
88 hw_data
->get_accel_mask
= get_accel_mask
;
89 hw_data
->get_ae_mask
= get_ae_mask
;
90 hw_data
->get_num_accels
= get_num_accels
;
91 hw_data
->get_num_aes
= get_num_aes
;
92 hw_data
->get_etr_bar_id
= get_etr_bar_id
;
93 hw_data
->get_misc_bar_id
= get_misc_bar_id
;
94 hw_data
->get_pf2vf_offset
= get_pf2vf_offset
;
95 hw_data
->get_vintmsk_offset
= get_vintmsk_offset
;
96 hw_data
->get_sku
= get_sku
;
97 hw_data
->enable_ints
= adf_vf_void_noop
;
98 hw_data
->enable_vf2pf_comms
= adf_enable_vf2pf_comms
;
99 hw_data
->min_iov_compat_ver
= ADF_PFVF_COMPATIBILITY_VERSION
;
100 hw_data
->dev_class
->instances
++;
101 adf_devmgr_update_class_index(hw_data
);
102 adf_gen2_init_hw_csr_ops(&hw_data
->csr_ops
);
105 void adf_clean_hw_data_c62xiov(struct adf_hw_device_data
*hw_data
)
107 hw_data
->dev_class
->instances
--;
108 adf_devmgr_update_class_index(hw_data
);