1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for FPGA Accelerated Function Unit (AFU) Error Reporting
5 * Copyright 2019 Intel Corporation, Inc.
8 * Wu Hao <hao.wu@linux.intel.com>
9 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
10 * Joseph Grecco <joe.grecco@intel.com>
11 * Enno Luebbers <enno.luebbers@intel.com>
12 * Tim Whisonant <tim.whisonant@intel.com>
13 * Ananda Ravuri <ananda.ravuri@intel.com>
14 * Mitchel Henry <henry.mitchel@intel.com>
17 #include <linux/fpga-dfl.h>
18 #include <linux/uaccess.h>
22 #define PORT_ERROR_MASK 0x8
23 #define PORT_ERROR 0x10
24 #define PORT_FIRST_ERROR 0x18
25 #define PORT_MALFORMED_REQ0 0x20
26 #define PORT_MALFORMED_REQ1 0x28
28 #define ERROR_MASK GENMASK_ULL(63, 0)
30 /* mask or unmask port errors by the error mask register. */
31 static void __afu_port_err_mask(struct device
*dev
, bool mask
)
35 base
= dfl_get_feature_ioaddr_by_id(dev
, PORT_FEATURE_ID_ERROR
);
37 writeq(mask
? ERROR_MASK
: 0, base
+ PORT_ERROR_MASK
);
40 static void afu_port_err_mask(struct device
*dev
, bool mask
)
42 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(dev
);
44 mutex_lock(&pdata
->lock
);
45 __afu_port_err_mask(dev
, mask
);
46 mutex_unlock(&pdata
->lock
);
49 /* clear port errors. */
50 static int afu_port_err_clear(struct device
*dev
, u64 err
)
52 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(dev
);
53 struct platform_device
*pdev
= to_platform_device(dev
);
54 void __iomem
*base_err
, *base_hdr
;
58 base_err
= dfl_get_feature_ioaddr_by_id(dev
, PORT_FEATURE_ID_ERROR
);
59 base_hdr
= dfl_get_feature_ioaddr_by_id(dev
, PORT_FEATURE_ID_HEADER
);
61 mutex_lock(&pdata
->lock
);
66 * - Check for AP6 State
67 * - Halt Port by keeping Port in reset
68 * - Set PORT Error mask to all 1 to mask errors
70 * - Set Port mask to all 0 to enable errors
71 * - All errors start capturing new errors
72 * - Enable Port by pulling the port out of reset
75 /* if device is still in AP6 power state, can not clear any error. */
76 v
= readq(base_hdr
+ PORT_HDR_STS
);
77 if (FIELD_GET(PORT_STS_PWR_STATE
, v
) == PORT_STS_PWR_STATE_AP6
) {
78 dev_err(dev
, "Could not clear errors, device in AP6 state.\n");
82 /* Halt Port by keeping Port in reset */
83 ret
= __afu_port_disable(pdev
);
88 __afu_port_err_mask(dev
, true);
90 /* Clear errors if err input matches with current port errors.*/
91 v
= readq(base_err
+ PORT_ERROR
);
94 writeq(v
, base_err
+ PORT_ERROR
);
96 v
= readq(base_err
+ PORT_FIRST_ERROR
);
97 writeq(v
, base_err
+ PORT_FIRST_ERROR
);
103 __afu_port_err_mask(dev
, false);
105 /* Enable the Port by clear the reset */
106 __afu_port_enable(pdev
);
109 mutex_unlock(&pdata
->lock
);
113 static ssize_t
errors_show(struct device
*dev
, struct device_attribute
*attr
,
116 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(dev
);
120 base
= dfl_get_feature_ioaddr_by_id(dev
, PORT_FEATURE_ID_ERROR
);
122 mutex_lock(&pdata
->lock
);
123 error
= readq(base
+ PORT_ERROR
);
124 mutex_unlock(&pdata
->lock
);
126 return sprintf(buf
, "0x%llx\n", (unsigned long long)error
);
129 static ssize_t
errors_store(struct device
*dev
, struct device_attribute
*attr
,
130 const char *buff
, size_t count
)
135 if (kstrtou64(buff
, 0, &value
))
138 ret
= afu_port_err_clear(dev
, value
);
140 return ret
? ret
: count
;
142 static DEVICE_ATTR_RW(errors
);
144 static ssize_t
first_error_show(struct device
*dev
,
145 struct device_attribute
*attr
, char *buf
)
147 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(dev
);
151 base
= dfl_get_feature_ioaddr_by_id(dev
, PORT_FEATURE_ID_ERROR
);
153 mutex_lock(&pdata
->lock
);
154 error
= readq(base
+ PORT_FIRST_ERROR
);
155 mutex_unlock(&pdata
->lock
);
157 return sprintf(buf
, "0x%llx\n", (unsigned long long)error
);
159 static DEVICE_ATTR_RO(first_error
);
161 static ssize_t
first_malformed_req_show(struct device
*dev
,
162 struct device_attribute
*attr
,
165 struct dfl_feature_platform_data
*pdata
= dev_get_platdata(dev
);
169 base
= dfl_get_feature_ioaddr_by_id(dev
, PORT_FEATURE_ID_ERROR
);
171 mutex_lock(&pdata
->lock
);
172 req0
= readq(base
+ PORT_MALFORMED_REQ0
);
173 req1
= readq(base
+ PORT_MALFORMED_REQ1
);
174 mutex_unlock(&pdata
->lock
);
176 return sprintf(buf
, "0x%016llx%016llx\n",
177 (unsigned long long)req1
, (unsigned long long)req0
);
179 static DEVICE_ATTR_RO(first_malformed_req
);
181 static struct attribute
*port_err_attrs
[] = {
182 &dev_attr_errors
.attr
,
183 &dev_attr_first_error
.attr
,
184 &dev_attr_first_malformed_req
.attr
,
188 static umode_t
port_err_attrs_visible(struct kobject
*kobj
,
189 struct attribute
*attr
, int n
)
191 struct device
*dev
= kobj_to_dev(kobj
);
194 * sysfs entries are visible only if related private feature is
197 if (!dfl_get_feature_by_id(dev
, PORT_FEATURE_ID_ERROR
))
203 const struct attribute_group port_err_group
= {
205 .attrs
= port_err_attrs
,
206 .is_visible
= port_err_attrs_visible
,
209 static int port_err_init(struct platform_device
*pdev
,
210 struct dfl_feature
*feature
)
212 afu_port_err_mask(&pdev
->dev
, false);
217 static void port_err_uinit(struct platform_device
*pdev
,
218 struct dfl_feature
*feature
)
220 afu_port_err_mask(&pdev
->dev
, true);
224 port_err_ioctl(struct platform_device
*pdev
, struct dfl_feature
*feature
,
225 unsigned int cmd
, unsigned long arg
)
228 case DFL_FPGA_PORT_ERR_GET_IRQ_NUM
:
229 return dfl_feature_ioctl_get_num_irqs(pdev
, feature
, arg
);
230 case DFL_FPGA_PORT_ERR_SET_IRQ
:
231 return dfl_feature_ioctl_set_irq(pdev
, feature
, arg
);
233 dev_dbg(&pdev
->dev
, "%x cmd not handled", cmd
);
238 const struct dfl_feature_id port_err_id_table
[] = {
239 {.id
= PORT_FEATURE_ID_ERROR
,},
243 const struct dfl_feature_ops port_err_ops
= {
244 .init
= port_err_init
,
245 .uinit
= port_err_uinit
,
246 .ioctl
= port_err_ioctl
,