1 // SPDX-License-Identifier: GPL-2.0
3 * SAMA5D2 PIOBU GPIO controller
5 * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
7 * Author: Andrei Stefanescu <andrei.stefanescu@microchip.com>
10 #include <linux/bits.h>
11 #include <linux/gpio/driver.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/regmap.h>
21 #define PIOBU_REG_SIZE 4
24 * backup mode protection register for tamper detection
25 * normal mode protection register for tamper detection
26 * wakeup signal generation
28 #define PIOBU_BMPR 0x7C
29 #define PIOBU_NMPR 0x80
30 #define PIOBU_WKPR 0x90
32 #define PIOBU_BASE 0x18 /* PIOBU offset from SECUMOD base register address. */
34 #define PIOBU_DET_OFFSET 16
36 /* In the datasheet this bit is called OUTPUT */
37 #define PIOBU_DIRECTION BIT(8)
38 #define PIOBU_OUT BIT(8)
41 #define PIOBU_SOD BIT(9)
42 #define PIOBU_PDS BIT(10)
44 #define PIOBU_HIGH BIT(9)
47 struct sama5d2_piobu
{
48 struct gpio_chip chip
;
49 struct regmap
*regmap
;
53 * sama5d2_piobu_setup_pin() - prepares a pin for set_direction call
55 * Do not consider pin for tamper detection (normal and backup modes)
56 * Do not consider pin as tamper wakeup interrupt source
58 static int sama5d2_piobu_setup_pin(struct gpio_chip
*chip
, unsigned int pin
)
61 struct sama5d2_piobu
*piobu
= container_of(chip
, struct sama5d2_piobu
,
63 unsigned int mask
= BIT(PIOBU_DET_OFFSET
+ pin
);
65 ret
= regmap_update_bits(piobu
->regmap
, PIOBU_BMPR
, mask
, 0);
69 ret
= regmap_update_bits(piobu
->regmap
, PIOBU_NMPR
, mask
, 0);
73 return regmap_update_bits(piobu
->regmap
, PIOBU_WKPR
, mask
, 0);
77 * sama5d2_piobu_write_value() - writes value & mask at the pin's PIOBU register
79 static int sama5d2_piobu_write_value(struct gpio_chip
*chip
, unsigned int pin
,
80 unsigned int mask
, unsigned int value
)
83 struct sama5d2_piobu
*piobu
= container_of(chip
, struct sama5d2_piobu
,
86 reg
= PIOBU_BASE
+ pin
* PIOBU_REG_SIZE
;
88 return regmap_update_bits(piobu
->regmap
, reg
, mask
, value
);
92 * sama5d2_piobu_read_value() - read the value with masking from the pin's PIOBU
95 static int sama5d2_piobu_read_value(struct gpio_chip
*chip
, unsigned int pin
,
98 struct sama5d2_piobu
*piobu
= container_of(chip
, struct sama5d2_piobu
,
100 unsigned int val
, reg
;
103 reg
= PIOBU_BASE
+ pin
* PIOBU_REG_SIZE
;
104 ret
= regmap_read(piobu
->regmap
, reg
, &val
);
112 * sama5d2_piobu_get_direction() - gpiochip get_direction
114 static int sama5d2_piobu_get_direction(struct gpio_chip
*chip
,
117 int ret
= sama5d2_piobu_read_value(chip
, pin
, PIOBU_DIRECTION
);
122 return (ret
== PIOBU_IN
) ? GPIO_LINE_DIRECTION_IN
:
123 GPIO_LINE_DIRECTION_OUT
;
127 * sama5d2_piobu_direction_input() - gpiochip direction_input
129 static int sama5d2_piobu_direction_input(struct gpio_chip
*chip
,
132 return sama5d2_piobu_write_value(chip
, pin
, PIOBU_DIRECTION
, PIOBU_IN
);
136 * sama5d2_piobu_direction_output() - gpiochip direction_output
138 static int sama5d2_piobu_direction_output(struct gpio_chip
*chip
,
139 unsigned int pin
, int value
)
141 unsigned int val
= PIOBU_OUT
;
146 return sama5d2_piobu_write_value(chip
, pin
, PIOBU_DIRECTION
| PIOBU_SOD
,
151 * sama5d2_piobu_get() - gpiochip get
153 static int sama5d2_piobu_get(struct gpio_chip
*chip
, unsigned int pin
)
155 /* if pin is input, read value from PDS else read from SOD */
156 int ret
= sama5d2_piobu_get_direction(chip
, pin
);
158 if (ret
== GPIO_LINE_DIRECTION_IN
)
159 ret
= sama5d2_piobu_read_value(chip
, pin
, PIOBU_PDS
);
160 else if (ret
== GPIO_LINE_DIRECTION_OUT
)
161 ret
= sama5d2_piobu_read_value(chip
, pin
, PIOBU_SOD
);
170 * sama5d2_piobu_set() - gpiochip set
172 static void sama5d2_piobu_set(struct gpio_chip
*chip
, unsigned int pin
,
180 sama5d2_piobu_write_value(chip
, pin
, PIOBU_SOD
, value
);
183 static int sama5d2_piobu_probe(struct platform_device
*pdev
)
185 struct sama5d2_piobu
*piobu
;
188 piobu
= devm_kzalloc(&pdev
->dev
, sizeof(*piobu
), GFP_KERNEL
);
192 platform_set_drvdata(pdev
, piobu
);
193 piobu
->chip
.label
= pdev
->name
;
194 piobu
->chip
.parent
= &pdev
->dev
;
195 piobu
->chip
.of_node
= pdev
->dev
.of_node
;
196 piobu
->chip
.owner
= THIS_MODULE
,
197 piobu
->chip
.get_direction
= sama5d2_piobu_get_direction
,
198 piobu
->chip
.direction_input
= sama5d2_piobu_direction_input
,
199 piobu
->chip
.direction_output
= sama5d2_piobu_direction_output
,
200 piobu
->chip
.get
= sama5d2_piobu_get
,
201 piobu
->chip
.set
= sama5d2_piobu_set
,
202 piobu
->chip
.base
= -1,
203 piobu
->chip
.ngpio
= PIOBU_NUM
,
204 piobu
->chip
.can_sleep
= 0,
206 piobu
->regmap
= syscon_node_to_regmap(pdev
->dev
.of_node
);
207 if (IS_ERR(piobu
->regmap
)) {
208 dev_err(&pdev
->dev
, "Failed to get syscon regmap %ld\n",
209 PTR_ERR(piobu
->regmap
));
210 return PTR_ERR(piobu
->regmap
);
213 ret
= devm_gpiochip_add_data(&pdev
->dev
, &piobu
->chip
, piobu
);
215 dev_err(&pdev
->dev
, "Failed to add gpiochip %d\n", ret
);
219 for (i
= 0; i
< PIOBU_NUM
; ++i
) {
220 ret
= sama5d2_piobu_setup_pin(&piobu
->chip
, i
);
222 dev_err(&pdev
->dev
, "Failed to setup pin: %d %d\n",
231 static const struct of_device_id sama5d2_piobu_ids
[] = {
232 { .compatible
= "atmel,sama5d2-secumod" },
235 MODULE_DEVICE_TABLE(of
, sama5d2_piobu_ids
);
237 static struct platform_driver sama5d2_piobu_driver
= {
239 .name
= "sama5d2-piobu",
240 .of_match_table
= of_match_ptr(sama5d2_piobu_ids
)
242 .probe
= sama5d2_piobu_probe
,
245 module_platform_driver(sama5d2_piobu_driver
);
247 MODULE_LICENSE("GPL v2");
248 MODULE_DESCRIPTION("SAMA5D2 PIOBU controller driver");
249 MODULE_AUTHOR("Andrei Stefanescu <andrei.stefanescu@microchip.com>");